1/* 2 * File: arch/blackfin/mach-bf533/boards/cm_bf533.c 3 * Based on: arch/blackfin/mach-bf533/boards/ezkit.c 4 * Author: Aidan Williams <aidan@nicta.com.au> Copyright 2005 5 * 6 * Created: 2005 7 * Description: Board description file 8 * 9 * Modified: 10 * Copyright 2004-2006 Analog Devices Inc. 11 * 12 * Bugs: Enter bugs at http://blackfin.uclinux.org/ 13 * 14 * This program is free software; you can redistribute it and/or modify 15 * it under the terms of the GNU General Public License as published by 16 * the Free Software Foundation; either version 2 of the License, or 17 * (at your option) any later version. 18 * 19 * This program is distributed in the hope that it will be useful, 20 * but WITHOUT ANY WARRANTY; without even the implied warranty of 21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 22 * GNU General Public License for more details. 23 * 24 * You should have received a copy of the GNU General Public License 25 * along with this program; if not, see the file COPYING, or write 26 * to the Free Software Foundation, Inc., 27 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA 28 */ 29 30#include <linux/device.h> 31#include <linux/platform_device.h> 32#include <linux/mtd/mtd.h> 33#include <linux/mtd/partitions.h> 34#include <linux/spi/spi.h> 35#include <linux/spi/flash.h> 36#include <linux/usb_isp1362.h> 37#include <asm/irq.h> 38#include <asm/bfin5xx_spi.h> 39 40/* 41 * Name the Board for the /proc/cpuinfo 42 */ 43char *bfin_board_name = "Bluetechnix CM BF533"; 44 45#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) 46/* all SPI peripherals info goes here */ 47 48static struct mtd_partition bfin_spi_flash_partitions[] = { 49 { 50 .name = "bootloader", 51 .size = 0x00020000, 52 .offset = 0, 53 .mask_flags = MTD_CAP_ROM 54 },{ 55 .name = "kernel", 56 .size = 0xe0000, 57 .offset = 0x20000 58 },{ 59 .name = "file system", 60 .size = 0x700000, 61 .offset = 0x00100000, 62 } 63}; 64 65static struct flash_platform_data bfin_spi_flash_data = { 66 .name = "m25p80", 67 .parts = bfin_spi_flash_partitions, 68 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions), 69 .type = "m25p64", 70}; 71 72/* SPI flash chip (m25p64) */ 73static struct bfin5xx_spi_chip spi_flash_chip_info = { 74 .enable_dma = 0, /* use dma transfer with this chip*/ 75 .bits_per_word = 8, 76}; 77 78/* SPI ADC chip */ 79static struct bfin5xx_spi_chip spi_adc_chip_info = { 80 .enable_dma = 1, /* use dma transfer with this chip*/ 81 .bits_per_word = 16, 82}; 83 84#if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE) 85static struct bfin5xx_spi_chip ad1836_spi_chip_info = { 86 .enable_dma = 0, 87 .bits_per_word = 16, 88}; 89#endif 90 91static struct spi_board_info bfin_spi_board_info[] __initdata = { 92 { 93 /* the modalias must be the same as spi device driver name */ 94 .modalias = "m25p80", /* Name of spi_driver for this device */ 95 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ 96 .bus_num = 1, /* Framework bus number */ 97 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/ 98 .platform_data = &bfin_spi_flash_data, 99 .controller_data = &spi_flash_chip_info, 100 .mode = SPI_MODE_3, 101 },{ 102 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */ 103 .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */ 104 .bus_num = 1, /* Framework bus number */ 105 .chip_select = 2, /* Framework chip select. */ 106 .platform_data = NULL, /* No spi_driver specific config */ 107 .controller_data = &spi_adc_chip_info, 108 }, 109#if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE) 110 { 111 .modalias = "ad1836-spi", 112 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ 113 .bus_num = 1, 114 .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT, 115 .controller_data = &ad1836_spi_chip_info, 116 }, 117#endif 118}; 119 120/* SPI controller data */ 121static struct bfin5xx_spi_master spi_bfin_master_info = { 122 .num_chipselect = 8, 123 .enable_dma = 1, /* master has the ability to do dma transfer */ 124}; 125 126static struct platform_device spi_bfin_master_device = { 127 .name = "bfin-spi-master", 128 .id = 1, /* Bus number */ 129 .dev = { 130 .platform_data = &spi_bfin_master_info, /* Passed to driver */ 131 }, 132}; 133#endif /* spi master and devices */ 134 135#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE) 136static struct platform_device rtc_device = { 137 .name = "rtc-bfin", 138 .id = -1, 139}; 140#endif 141 142#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) 143static struct resource smc91x_resources[] = { 144 { 145 .start = 0x20200300, 146 .end = 0x20200300 + 16, 147 .flags = IORESOURCE_MEM, 148 },{ 149 .start = IRQ_PF0, 150 .end = IRQ_PF0, 151 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, 152 }, 153}; 154static struct platform_device smc91x_device = { 155 .name = "smc91x", 156 .id = 0, 157 .num_resources = ARRAY_SIZE(smc91x_resources), 158 .resource = smc91x_resources, 159}; 160#endif 161 162#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) 163static struct resource bfin_uart_resources[] = { 164 { 165 .start = 0xFFC00400, 166 .end = 0xFFC004FF, 167 .flags = IORESOURCE_MEM, 168 }, 169}; 170 171static struct platform_device bfin_uart_device = { 172 .name = "bfin-uart", 173 .id = 1, 174 .num_resources = ARRAY_SIZE(bfin_uart_resources), 175 .resource = bfin_uart_resources, 176}; 177#endif 178 179#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) 180static struct platform_device bfin_sport0_uart_device = { 181 .name = "bfin-sport-uart", 182 .id = 0, 183}; 184 185static struct platform_device bfin_sport1_uart_device = { 186 .name = "bfin-sport-uart", 187 .id = 1, 188}; 189#endif 190 191#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) 192static struct resource isp1362_hcd_resources[] = { 193 { 194 .start = 0x20308000, 195 .end = 0x20308000, 196 .flags = IORESOURCE_MEM, 197 },{ 198 .start = 0x20308004, 199 .end = 0x20308004, 200 .flags = IORESOURCE_MEM, 201 },{ 202 .start = IRQ_PF4, 203 .end = IRQ_PF4, 204 .flags = IORESOURCE_IRQ, 205 }, 206}; 207 208static struct isp1362_platform_data isp1362_priv = { 209 .sel15Kres = 1, 210 .clknotstop = 0, 211 .oc_enable = 0, 212 .int_act_high = 0, 213 .int_edge_triggered = 0, 214 .remote_wakeup_connected = 0, 215 .no_power_switching = 1, 216 .power_switching_mode = 0, 217}; 218 219static struct platform_device isp1362_hcd_device = { 220 .name = "isp1362-hcd", 221 .id = 0, 222 .dev = { 223 .platform_data = &isp1362_priv, 224 }, 225 .num_resources = ARRAY_SIZE(isp1362_hcd_resources), 226 .resource = isp1362_hcd_resources, 227}; 228#endif 229 230static struct platform_device *cm_bf533_devices[] __initdata = { 231#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) 232 &bfin_uart_device, 233#endif 234 235#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) 236 &bfin_sport0_uart_device, 237 &bfin_sport1_uart_device, 238#endif 239 240#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE) 241 &rtc_device, 242#endif 243 244#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) 245 &isp1362_hcd_device, 246#endif 247 248#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) 249 &smc91x_device, 250#endif 251 252#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) 253 &spi_bfin_master_device, 254#endif 255}; 256 257static int __init cm_bf533_init(void) 258{ 259 printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__); 260 platform_add_devices(cm_bf533_devices, ARRAY_SIZE(cm_bf533_devices)); 261#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) 262 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info)); 263#endif 264 return 0; 265} 266 267arch_initcall(cm_bf533_init); 268