1/* linux/arch/arm/plat-s3c24xx/time.c 2 * 3 * Copyright (C) 2003-2005 Simtec Electronics 4 * Ben Dooks, <ben@simtec.co.uk> 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, write to the Free Software 18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 19 */ 20 21#include <linux/kernel.h> 22#include <linux/sched.h> 23#include <linux/init.h> 24#include <linux/interrupt.h> 25#include <linux/irq.h> 26#include <linux/err.h> 27#include <linux/clk.h> 28 29#include <asm/system.h> 30#include <asm/leds.h> 31#include <asm/mach-types.h> 32 33#include <asm/io.h> 34#include <asm/irq.h> 35#include <asm/arch/map.h> 36#include <asm/arch/regs-timer.h> 37#include <asm/arch/regs-irq.h> 38#include <asm/mach/time.h> 39 40#include <asm/plat-s3c24xx/clock.h> 41#include <asm/plat-s3c24xx/cpu.h> 42 43static unsigned long timer_startval; 44static unsigned long timer_usec_ticks; 45 46#define TIMER_USEC_SHIFT 16 47 48/* we use the shifted arithmetic to work out the ratio of timer ticks 49 * to usecs, as often the peripheral clock is not a nice even multiple 50 * of 1MHz. 51 * 52 * shift of 14 and 15 are too low for the 12MHz, 16 seems to be ok 53 * for the current HZ value of 200 without producing overflows. 54 * 55 * Original patch by Dimitry Andric, updated by Ben Dooks 56*/ 57 58 59/* timer_mask_usec_ticks 60 * 61 * given a clock and divisor, make the value to pass into timer_ticks_to_usec 62 * to scale the ticks into usecs 63*/ 64 65static inline unsigned long 66timer_mask_usec_ticks(unsigned long scaler, unsigned long pclk) 67{ 68 unsigned long den = pclk / 1000; 69 70 return ((1000 << TIMER_USEC_SHIFT) * scaler + (den >> 1)) / den; 71} 72 73/* timer_ticks_to_usec 74 * 75 * convert timer ticks to usec. 76*/ 77 78static inline unsigned long timer_ticks_to_usec(unsigned long ticks) 79{ 80 unsigned long res; 81 82 res = ticks * timer_usec_ticks; 83 res += 1 << (TIMER_USEC_SHIFT - 4); /* round up slightly */ 84 85 return res >> TIMER_USEC_SHIFT; 86} 87 88/*** 89 * Returns microsecond since last clock interrupt. Note that interrupts 90 * will have been disabled by do_gettimeoffset() 91 * IRQs are disabled before entering here from do_gettimeofday() 92 */ 93 94#define SRCPND_TIMER4 (1<<(IRQ_TIMER4 - IRQ_EINT0)) 95 96static unsigned long s3c2410_gettimeoffset (void) 97{ 98 unsigned long tdone; 99 unsigned long irqpend; 100 unsigned long tval; 101 102 /* work out how many ticks have gone since last timer interrupt */ 103 104 tval = __raw_readl(S3C2410_TCNTO(4)); 105 tdone = timer_startval - tval; 106 107 /* check to see if there is an interrupt pending */ 108 109 irqpend = __raw_readl(S3C2410_SRCPND); 110 if (irqpend & SRCPND_TIMER4) { 111 /* re-read the timer, and try and fix up for the missed 112 * interrupt. Note, the interrupt may go off before the 113 * timer has re-loaded from wrapping. 114 */ 115 116 tval = __raw_readl(S3C2410_TCNTO(4)); 117 tdone = timer_startval - tval; 118 119 if (tval != 0) 120 tdone += timer_startval; 121 } 122 123 return timer_ticks_to_usec(tdone); 124} 125 126 127/* 128 * IRQ handler for the timer 129 */ 130static irqreturn_t 131s3c2410_timer_interrupt(int irq, void *dev_id) 132{ 133 write_seqlock(&xtime_lock); 134 timer_tick(); 135 write_sequnlock(&xtime_lock); 136 return IRQ_HANDLED; 137} 138 139static struct irqaction s3c2410_timer_irq = { 140 .name = "S3C2410 Timer Tick", 141 .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, 142 .handler = s3c2410_timer_interrupt, 143}; 144 145#define use_tclk1_12() ( \ 146 machine_is_bast() || \ 147 machine_is_vr1000() || \ 148 machine_is_anubis() || \ 149 machine_is_osiris() ) 150 151/* 152 * Set up timer interrupt, and return the current time in seconds. 153 * 154 * Currently we only use timer4, as it is the only timer which has no 155 * other function that can be exploited externally 156 */ 157static void s3c2410_timer_setup (void) 158{ 159 unsigned long tcon; 160 unsigned long tcnt; 161 unsigned long tcfg1; 162 unsigned long tcfg0; 163 164 tcnt = 0xffff; /* default value for tcnt */ 165 166 /* read the current timer configuration bits */ 167 168 tcon = __raw_readl(S3C2410_TCON); 169 tcfg1 = __raw_readl(S3C2410_TCFG1); 170 tcfg0 = __raw_readl(S3C2410_TCFG0); 171 172 /* configure the system for whichever machine is in use */ 173 174 if (use_tclk1_12()) { 175 /* timer is at 12MHz, scaler is 1 */ 176 timer_usec_ticks = timer_mask_usec_ticks(1, 12000000); 177 tcnt = 12000000 / HZ; 178 179 tcfg1 &= ~S3C2410_TCFG1_MUX4_MASK; 180 tcfg1 |= S3C2410_TCFG1_MUX4_TCLK1; 181 } else { 182 unsigned long pclk; 183 struct clk *clk; 184 185 /* for the h1940 (and others), we use the pclk from the core 186 * to generate the timer values. since values around 50 to 187 * 70MHz are not values we can directly generate the timer 188 * value from, we need to pre-scale and divide before using it. 189 * 190 * for instance, using 50.7MHz and dividing by 6 gives 8.45MHz 191 * (8.45 ticks per usec) 192 */ 193 194 /* this is used as default if no other timer can be found */ 195 196 clk = clk_get(NULL, "timers"); 197 if (IS_ERR(clk)) 198 panic("failed to get clock for system timer"); 199 200 clk_enable(clk); 201 202 pclk = clk_get_rate(clk); 203 204 /* configure clock tick */ 205 206 timer_usec_ticks = timer_mask_usec_ticks(6, pclk); 207 208 tcfg1 &= ~S3C2410_TCFG1_MUX4_MASK; 209 tcfg1 |= S3C2410_TCFG1_MUX4_DIV2; 210 211 tcfg0 &= ~S3C2410_TCFG_PRESCALER1_MASK; 212 tcfg0 |= ((6 - 1) / 2) << S3C2410_TCFG_PRESCALER1_SHIFT; 213 214 tcnt = (pclk / 6) / HZ; 215 } 216 217 /* timers reload after counting zero, so reduce the count by 1 */ 218 219 tcnt--; 220 221 printk("timer tcon=%08lx, tcnt %04lx, tcfg %08lx,%08lx, usec %08lx\n", 222 tcon, tcnt, tcfg0, tcfg1, timer_usec_ticks); 223 224 /* check to see if timer is within 16bit range... */ 225 if (tcnt > 0xffff) { 226 panic("setup_timer: HZ is too small, cannot configure timer!"); 227 return; 228 } 229 230 __raw_writel(tcfg1, S3C2410_TCFG1); 231 __raw_writel(tcfg0, S3C2410_TCFG0); 232 233 timer_startval = tcnt; 234 __raw_writel(tcnt, S3C2410_TCNTB(4)); 235 236 /* ensure timer is stopped... */ 237 238 tcon &= ~(7<<20); 239 tcon |= S3C2410_TCON_T4RELOAD; 240 tcon |= S3C2410_TCON_T4MANUALUPD; 241 242 __raw_writel(tcon, S3C2410_TCON); 243 __raw_writel(tcnt, S3C2410_TCNTB(4)); 244 __raw_writel(tcnt, S3C2410_TCMPB(4)); 245 246 /* start the timer running */ 247 tcon |= S3C2410_TCON_T4START; 248 tcon &= ~S3C2410_TCON_T4MANUALUPD; 249 __raw_writel(tcon, S3C2410_TCON); 250} 251 252static void __init s3c2410_timer_init (void) 253{ 254 s3c2410_timer_setup(); 255 setup_irq(IRQ_TIMER4, &s3c2410_timer_irq); 256} 257 258struct sys_timer s3c24xx_timer = { 259 .init = s3c2410_timer_init, 260 .offset = s3c2410_gettimeoffset, 261 .resume = s3c2410_timer_setup 262}; 263