1/* hppa1.1 mul_1 -- Multiply a limb vector with a limb and store 2 * the result in a second limb vector. 3 * 4 * Copyright (C) 1992, 1993, 1994, 1998, 5 * 2001, 2002 Free Software Foundation, Inc. 6 * 7 * This file is part of Libgcrypt. 8 * 9 * Libgcrypt is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU Lesser General Public License as 11 * published by the Free Software Foundation; either version 2.1 of 12 * the License, or (at your option) any later version. 13 * 14 * Libgcrypt is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU Lesser General Public License for more details. 18 * 19 * You should have received a copy of the GNU Lesser General Public 20 * License along with this program; if not, write to the Free Software 21 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA 22 * 23 * Note: This code is heavily based on the GNU MP Library. 24 * Actually it's the same code with only minor changes in the 25 * way the data is stored; this is to support the abstraction 26 * of an optional secure memory allocation which may be used 27 * to avoid revealing of sensitive data due to paging etc. 28 */ 29 30 31/******************* 32 * mpi_limb_t 33 * _gcry_mpih_mul_1( mpi_ptr_t res_ptr, (r26) 34 * mpi_ptr_t s1_ptr, (r25) 35 * mpi_size_t s1_size, (r24) 36 * mpi_limb_t s2_limb) (r23) 37 * 38 * 39 * 40 * This runs at 9 cycles/limb on a PA7000. With the used instructions, it can 41 * not become faster due to data cache contention after a store. On the 42 * PA7100 it runs at 7 cycles/limb, and that can not be improved either, since 43 * only the xmpyu does not need the integer pipeline, so the only dual-issue 44 * we will get are addc+xmpyu. Unrolling would not help either CPU. 45 * 46 * We could use fldds to read two limbs at a time from the S1 array, and that 47 * could bring down the times to 8.5 and 6.5 cycles/limb for the PA7000 and 48 * PA7100, respectively. We don't do that since it does not seem worth the 49 * (alignment) troubles... 50 * 51 * At least the PA7100 is rumored to be able to deal with cache-misses 52 * without stalling instruction issue. If this is true, and the cache is 53 * actually also lockup-free, we should use a deeper software pipeline, and 54 * load from S1 very early! (The loads and stores to -12(sp) will surely be 55 * in the cache.) 56 */ 57 58 .level 1.1 59 60 .code 61 .export _gcry_mpih_mul_1 62 .label _gcry_mpih_mul_1 63 .proc 64 .callinfo frame=64,no_calls 65 .entry 66 67 ldo 64(%r30),%r30 68 fldws,ma 4(%r25),%fr5 69 stw %r23,-16(%r30) ; move s2_limb ... 70 addib,= -1,%r24,L$just_one_limb 71 fldws -16(%r30),%fr4 ; ... into fr4 72 add %r0,%r0,%r0 ; clear carry 73 xmpyu %fr4,%fr5,%fr6 74 fldws,ma 4(%r25),%fr7 75 fstds %fr6,-16(%r30) 76 xmpyu %fr4,%fr7,%fr8 77 ldw -12(%r30),%r19 ; least significant limb in product 78 ldw -16(%r30),%r28 79 80 fstds %fr8,-16(%r30) 81 addib,= -1,%r24,L$end 82 ldw -12(%r30),%r1 83 84; Main loop 85 .label L$loop 86 fldws,ma 4(%r25),%fr5 87 stws,ma %r19,4(%r26) 88 addc %r28,%r1,%r19 89 xmpyu %fr4,%fr5,%fr6 90 ldw -16(%r30),%r28 91 fstds %fr6,-16(%r30) 92 addib,<> -1,%r24,L$loop 93 ldw -12(%r30),%r1 94 95 .label L$end 96 stws,ma %r19,4(%r26) 97 addc %r28,%r1,%r19 98 ldw -16(%r30),%r28 99 stws,ma %r19,4(%r26) 100 addc %r0,%r28,%r28 101 bv 0(%r2) 102 ldo -64(%r30),%r30 103 104 .label L$just_one_limb 105 xmpyu %fr4,%fr5,%fr6 106 fstds %fr6,-16(%r30) 107 ldw -16(%r30),%r28 108 ldo -64(%r30),%r30 109 bv 0(%r2) 110 fstws %fr6R,0(%r26) 111 112 .exit 113 .procend 114 115 116