1/*
2 *  Copyright (C) 2006-2008 Gabor Juhos <juhosg@openwrt.org>
3 *
4 *  This program is free software; you can redistribute  it and/or modify it
5 *  under  the terms of  the GNU General  Public License as published by the
6 *  Free Software Foundation;  either version 2 of the  License, or (at your
7 *  option) any later version.
8 *
9 */
10
11#ifndef _MYLOADER_H_
12#define _MYLOADER_H_
13
14/*
15 * Firmware file format:
16 *
17 *	<header>
18 *	[<block descriptor 0>]
19 *	...
20 *	[<block descriptor n>]
21 *	<null block descriptor>
22 *	[<block data 0>]
23 *	...
24 *	[<block data n>]
25 *
26 *
27 */
28
29/* Myloader specific magic numbers */
30#define MYLO_MAGIC_FIRMWARE	0x4C594D00
31#define MYLO_MAGIC_20021103	0x20021103
32#define MYLO_MAGIC_20021107	0x20021107
33
34#define MYLO_MAGIC_SYS_PARAMS	MYLO_MAGIC_20021107
35#define MYLO_MAGIC_PARTITIONS	MYLO_MAGIC_20021103
36#define MYLO_MAGIC_BOARD_PARAMS	MYLO_MAGIC_20021103
37
38/*
39 * Addresses of the data structures provided by MyLoader
40 */
41#define MYLO_MIPS_SYS_PARAMS	0x80000800	/* System Parameters */
42#define MYLO_MIPS_BOARD_PARAMS	0x80000A00	/* Board Parameters */
43#define MYLO_MIPS_PARTITIONS	0x80000C00	/* Partition Table */
44#define MYLO_MIPS_BOOT_PARAMS	0x80000E00	/* Boot Parameters */
45
46/* Vendor ID's (seems to be same as the PCI vendor ID's) */
47#define VENID_COMPEX		0x11F6
48
49/* Devices based on the ADM5120 */
50#define DEVID_COMPEX_NP27G	0x0078
51#define DEVID_COMPEX_NP28G	0x044C
52#define DEVID_COMPEX_NP28GHS	0x044E
53#define DEVID_COMPEX_WP54Gv1C	0x0514
54#define DEVID_COMPEX_WP54G	0x0515
55#define DEVID_COMPEX_WP54AG	0x0546
56#define DEVID_COMPEX_WPP54AG	0x0550
57#define DEVID_COMPEX_WPP54G	0x0555
58
59/* Devices based on the Atheros AR2317 */
60#define DEVID_COMPEX_NP25G	0x05e6
61#define DEVID_COMPEX_WPE53G	0x05dc
62
63/* Devices based on the Atheros AR71xx */
64#define DEVID_COMPEX_WP543	0x0640
65#define DEVID_COMPEX_WPE72	0x0672
66
67/* Devices based on the IXP422 */
68#define DEVID_COMPEX_WP18	0x047E
69#define DEVID_COMPEX_NP18A	0x0489
70
71/* Other devices */
72#define DEVID_COMPEX_NP26G8M	0x03E8
73#define DEVID_COMPEX_NP26G16M	0x03E9
74
75struct mylo_fw_header {
76	uint32_t	magic;	/* must be MYLO_MAGIC_FIRMWARE */
77	uint32_t	crc;	/* CRC of the whole firmware */
78	uint32_t	res0;	/* unknown/unused */
79	uint32_t	res1;	/* unknown/unused */
80	uint16_t	vid;	/* vendor ID */
81	uint16_t	did;	/* device ID */
82	uint16_t	svid;	/* sub vendor ID */
83	uint16_t	sdid;	/* sub device ID */
84	uint32_t	rev;	/* device revision */
85	uint32_t	fwhi;	/* FIXME: firmware version high? */
86	uint32_t	fwlo;	/* FIXME: firmware version low? */
87	uint32_t	flags;	/* firmware flags */
88};
89
90#define FW_FLAG_BOARD_PARAMS_WP	0x01 /* board parameters are write protected */
91#define FW_FLAG_BOOT_SECTOR_WE	0x02 /* enable of write boot sectors (below 64K) */
92
93struct mylo_fw_blockdesc {
94	uint32_t	type;	/* block type */
95	uint32_t	addr;	/* relative address to flash start */
96	uint32_t	dlen;	/* size of block data in bytes */
97	uint32_t	blen;	/* total size of block in bytes */
98};
99
100#define FW_DESC_TYPE_UNUSED	0
101#define FW_DESC_TYPE_USED	1
102
103struct mylo_partition {
104	uint16_t	flags;	/* partition flags */
105	uint16_t	type;	/* type of the partition */
106	uint32_t	addr;	/* relative address of the partition from the
107				   flash start */
108	uint32_t	size;	/* size of the partition in bytes */
109	uint32_t	param;	/* if this is the active partition, the
110				   MyLoader load code to this address */
111};
112
113#define PARTITION_FLAG_ACTIVE	0x8000 /* this is the active partition,
114					* MyLoader loads firmware from here */
115#define PARTITION_FLAG_ISRAM	0x2000 /* FIXME: this is a RAM partition? */
116#define PARTIIION_FLAG_RAMLOAD	0x1000 /* FIXME: load this partition into the RAM? */
117#define PARTITION_FLAG_PRELOAD	0x0800 /* the partition data preloaded to RAM
118					* before decompression */
119#define PARTITION_FLAG_LZMA	0x0100 /* the partition data compressed with LZMA */
120#define PARTITION_FLAG_HAVEHDR  0x0002 /* the partition data have a header */
121
122#define PARTITION_TYPE_FREE	0
123#define PARTITION_TYPE_USED	1
124
125#define MYLO_MAX_PARTITIONS	8	/* maximum number of partitions in the
126					   partition table */
127
128struct mylo_partition_table {
129	uint32_t	magic;	/* must be MYLO_MAGIC_PARTITIONS */
130	uint32_t	res0;	/* unknown/unused */
131	uint32_t	res1;	/* unknown/unused */
132	uint32_t 	res2;	/* unknown/unused */
133	struct mylo_partition partitions[MYLO_MAX_PARTITIONS];
134};
135
136struct mylo_partition_header {
137	uint32_t	len;	/* length of the partition data */
138	uint32_t	crc;	/* CRC value of the partition data */
139};
140
141struct mylo_system_params {
142	uint32_t	magic;	/* must be MYLO_MAGIC_SYS_PARAMS */
143	uint32_t	res0;
144	uint32_t	res1;
145	uint32_t	mylo_ver;
146	uint16_t	vid;	/* Vendor ID */
147	uint16_t	did;	/* Device ID */
148	uint16_t	svid;	/* Sub Vendor ID */
149	uint16_t	sdid;	/* Sub Device ID */
150	uint32_t	rev;	/* device revision */
151	uint32_t	fwhi;
152	uint32_t	fwlo;
153	uint32_t	tftp_addr;
154	uint32_t	prog_start;
155	uint32_t	flash_size;	/* Size of boot FLASH in bytes */
156	uint32_t	dram_size;	/* Size of onboard RAM in bytes */
157};
158
159
160struct mylo_eth_addr {
161	uint8_t	mac[6];
162	uint8_t	csum[2];
163};
164
165#define MYLO_ETHADDR_COUNT	8	/* maximum number of ethernet address
166					   in the board parameters */
167
168struct mylo_board_params {
169	uint32_t	magic;	/* must be MYLO_MAGIC_BOARD_PARAMS */
170	uint32_t	res0;
171	uint32_t	res1;
172	uint32_t	res2;
173	struct mylo_eth_addr addr[MYLO_ETHADDR_COUNT];
174};
175
176#endif /* _MYLOADER_H_*/
177