1/*
2 * arch/ubicom32/include/asm/pci.h
3 *   Definitions of PCI operations for Ubicom32 architecture.
4 *
5 * (C) Copyright 2009, Ubicom, Inc.
6 *
7 * This file is part of the Ubicom32 Linux Kernel Port.
8 *
9 * The Ubicom32 Linux Kernel Port is free software: you can redistribute
10 * it and/or modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation, either version 2 of the
12 * License, or (at your option) any later version.
13 *
14 * The Ubicom32 Linux Kernel Port is distributed in the hope that it
15 * will be useful, but WITHOUT ANY WARRANTY; without even the implied
16 * warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See
17 * the GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with the Ubicom32 Linux Kernel Port.  If not,
21 * see <http://www.gnu.org/licenses/>.
22 *
23 * Ubicom32 implementation derived from (with many thanks):
24 *   arch/m68knommu
25 *   arch/blackfin
26 *   arch/parisc
27 */
28#ifndef _ASM_UBICOM32_PCI_H
29#define _ASM_UBICOM32_PCI_H
30
31#include <asm/io.h>
32
33/* The PCI address space does equal the physical memory
34 * address space.  The networking and block device layers use
35 * this boolean for bounce buffer decisions.
36 */
37#define PCI_DMA_BUS_IS_PHYS	(1)
38
39
40
41/*
42 * Perform a master read/write to the PCI bus.
43 * These functions return a PCI_RESP_xxx code.
44 */
45extern u8 pci_read_u32(u8 pci_cmd, u32 address, u32 *data);
46extern u8 pci_write_u32(u8 pci_cmd, u32 address, u32 data);
47extern u8 pci_read_u16(u8 pci_cmd, u32 address, u16 *data);
48extern u8 pci_write_u16(u8 pci_cmd, u32 address, u16 data);
49extern u8 pci_read_u8(u8 pci_cmd, u32 address, u8 *data);
50extern u8 pci_write_u8(u8 pci_cmd, u32 address, u8 data);
51
52
53#define PCIBIOS_MIN_IO          0x100
54#define PCIBIOS_MIN_MEM         0x10000000
55
56#define pcibios_assign_all_busses()	0
57#define pcibios_scan_all_fns(a, b)	0
58extern void pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
59	struct resource *res);
60
61extern void pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
62	struct pci_bus_region *region);
63
64struct pci_sys_data;
65struct pci_bus;
66
67struct hw_pci {
68        struct list_head buses;
69        int             nr_controllers;
70        int             (*setup)(int nr, struct pci_sys_data *);
71        struct pci_bus *(*scan)(int nr, struct pci_sys_data *);
72        void            (*preinit)(void);
73        void            (*postinit)(void);
74        u8              (*swizzle)(struct pci_dev *dev, u8 *pin);
75        int             (*map_irq)(struct pci_dev *dev, u8 slot, u8 pin);
76};
77
78/*
79 * Per-controller structure
80 */
81struct pci_sys_data {
82        struct list_head node;
83        int             busnr;          /* primary bus number                   */
84        u64             mem_offset;     /* bus->cpu memory mapping offset       */
85        unsigned long   io_offset;      /* bus->cpu IO mapping offset           */
86        struct pci_bus  *bus;           /* PCI bus                              */
87        struct resource *resource[3];   /* Primary PCI bus resources            */
88                                        /* Bridge swizzling                     */
89        u8              (*swizzle)(struct pci_dev *, u8 *);
90                                        /* IRQ mapping                          */
91        int             (*map_irq)(struct pci_dev *, u8, u8);
92        struct hw_pci   *hw;
93};
94
95static  inline struct resource *
96pcibios_select_root(struct pci_dev *pdev, struct resource *res)
97{
98        struct resource *root = NULL;
99
100        if (res->flags & IORESOURCE_IO)
101                root = &ioport_resource;
102        if (res->flags & IORESOURCE_MEM)
103                root = &iomem_resource;
104
105        return root;
106}
107
108static inline void pcibios_set_master(struct pci_dev *dev)
109{
110        /* No special bus mastering setup handling */
111}
112#define HAVE_ARCH_PCI_SET_DMA_MAX_SEGMENT_SIZE 1
113#define HAVE_ARCH_PCI_SET_DMA_SEGMENT_BOUNDARY 1
114
115#ifdef CONFIG_PCI
116static inline void * pci_alloc_consistent(struct pci_dev *hwdev, size_t size,
117                     dma_addr_t *dma_handle)
118{
119    void *vaddr = kmalloc(size, GFP_KERNEL);
120    if(vaddr != NULL) {
121        *dma_handle = virt_to_phys(vaddr);
122    }
123    return vaddr;
124}
125
126static  inline int pci_dma_supported(struct pci_dev *hwdev, dma_addr_t mask)
127{
128	return 1;
129}
130
131static  inline void pci_free_consistent(struct pci_dev *hwdev, size_t size,
132	void *cpu_addr, dma_addr_t dma_handle)
133{
134	kfree(cpu_addr);
135	return;
136}
137
138static inline dma_addr_t pci_map_single(struct pci_dev *hwdev, void *ptr,
139	size_t size, int direction)
140{
141	 return virt_to_phys(ptr);
142}
143
144static inline void pci_unmap_single(struct pci_dev *hwdev, dma_addr_t dma_addr,
145	size_t size, int direction)
146{
147	 return;
148}
149
150static inline dma_addr_t
151pci_map_page(struct pci_dev *hwdev, struct page *page,
152             unsigned long offset, size_t size, int direction)
153{
154	 return pci_map_single(hwdev, page_address(page) + offset, size, (int)direction);
155}
156
157static inline void
158pci_unmap_page(struct pci_dev *hwdev, dma_addr_t dma_address,
159               size_t size, int direction)
160{
161	pci_unmap_single(hwdev, dma_address, size, direction);
162}
163
164static inline int
165pci_map_sg(struct pci_dev *hwdev, struct scatterlist *sg,
166           int nents, int direction)
167{
168        return nents;
169}
170
171static inline void
172pci_unmap_sg(struct pci_dev *hwdev, struct scatterlist *sg,
173             int nents, int direction)
174{
175}
176
177static inline void
178pci_dma_sync_sg_for_cpu(struct pci_dev *hwdev, struct scatterlist *sg,
179                int nelems, int direction)
180{
181}
182
183static inline void
184pci_dma_sync_sg_for_device(struct pci_dev *hwdev, struct scatterlist *sg,
185                int nelems, int direction)
186{
187}
188
189static inline void
190pci_dma_sync_single_for_cpu(struct pci_dev *hwdev, dma_addr_t dma_handle,
191                    size_t size, int direction)
192{
193}
194
195static inline void
196pci_dma_sync_single_for_device(struct pci_dev *hwdev, dma_addr_t dma_handle,
197                    size_t size, int direction)
198{
199}
200
201static inline int
202pci_dma_mapping_error(struct pci_dev *hwdev, dma_addr_t dma_addr)
203{
204        return dma_addr == 0;
205}
206extern void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long max);
207extern void pci_iounmap(struct pci_dev *dev, void __iomem *);
208#endif
209
210#endif /* _ASM_UBICOM32_PCI_H */
211