1/******************************************************************************* 2Copyright (C) Marvell International Ltd. and its affiliates 3 4This software file (the "File") is owned and distributed by Marvell 5International Ltd. and/or its affiliates ("Marvell") under the following 6alternative licensing terms. Once you have made an election to distribute the 7File under one of the following license alternatives, please (i) delete this 8introductory statement regarding license alternatives, (ii) delete the two 9license alternatives that you have not elected to use and (iii) preserve the 10Marvell copyright notice above. 11 12******************************************************************************** 13Marvell Commercial License Option 14 15If you received this File from Marvell and you have entered into a commercial 16license agreement (a "Commercial License") with Marvell, the File is licensed 17to you under the terms of the applicable Commercial License. 18 19******************************************************************************** 20Marvell GPL License Option 21 22If you received this File from Marvell, you may opt to use, redistribute and/or 23modify this File in accordance with the terms and conditions of the General 24Public License Version 2, June 1991 (the "GPL License"), a copy of which is 25available along with the File in the license.txt file or by writing to the Free 26Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 27on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 28 29THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 30WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 31DISCLAIMED. The GPL License provides additional details about this warranty 32disclaimer. 33******************************************************************************** 34Marvell BSD License Option 35 36If you received this File from Marvell, you may opt to use, redistribute and/or 37modify this File under the following licensing terms. 38Redistribution and use in source and binary forms, with or without modification, 39are permitted provided that the following conditions are met: 40 41 * Redistributions of source code must retain the above copyright notice, 42 this list of conditions and the following disclaimer. 43 44 * Redistributions in binary form must reproduce the above copyright 45 notice, this list of conditions and the following disclaimer in the 46 documentation and/or other materials provided with the distribution. 47 48 * Neither the name of Marvell nor the names of its contributors may be 49 used to endorse or promote products derived from this software without 50 specific prior written permission. 51 52THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 53ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 54WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 55DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 56ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 57(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 58LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 59ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 60(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 61SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 62 63*******************************************************************************/ 64 65 66#ifndef __INCPCIH 67#define __INCPCIH 68 69#include "mvCommon.h" 70#include "mvOs.h" 71#include "ctrlEnv/mvCtrlEnvSpec.h" 72#include "pci/mvPciRegs.h" 73 74 75/* NOTE not supported in this driver: 76 77 Built In Self Test (BIST) 78 Vital Product Data (VPD) 79 Message Signaled Interrupt (MSI) 80 Power Management 81 Compact PCI Hot Swap 82 Header retarget 83 84Registers not supported: 851) PCI DLL Status and Control (PCI0 0x1D20, PCI1 0x1DA0) 862) PCI/MPP Pads Calibration (CI0/MPP[31:16] 0x1D1C, PCI1/MPP[15:0] 0X1D9C) 87*/ 88 89/* defines */ 90/* The number of supported PCI interfaces depend on Marvell controller */ 91/* device number. This device number ID is located on the PCI unit */ 92/* configuration header. This creates a loop where calling PCI */ 93/* configuration read/write routine results a call to get PCI configuration */ 94/* information etc. This macro defines a default PCI interface. This PCI */ 95/* interface is sure to exist. */ 96#define PCI_DEFAULT_IF 0 97 98 99/* typedefs */ 100/* The Marvell controller supports both conventional PCI and PCI-X. */ 101/* This enumeration describes the PCI type. */ 102typedef enum _mvPciType 103{ 104 MV_PCI_CONV, /* Conventional PCI */ 105 MV_PCIX /* PCI-X */ 106}MV_PCI_TYPE; 107 108typedef enum _mvPciMod 109{ 110 MV_PCI_MOD_HOST, 111 MV_PCI_MOD_DEVICE 112}MV_PCI_MOD; 113 114 115/* The Marvell controller supports both PCI width of 32 and 64 bit. */ 116/* This enumerator describes PCI width */ 117typedef enum _mvPciWidth 118{ 119 MV_PCI_32, /* PCI width 32bit */ 120 MV_PCI_64 /* PCI width 64bit */ 121}MV_PCI_WIDTH; 122 123/* This structure describes the PCI unit configured type, speed and width. */ 124typedef struct _mvPciMode 125{ 126 MV_PCI_TYPE pciType; /* PCI type */ 127 MV_U32 pciSpeed; /* Assuming PCI base clock on board is 33MHz */ 128 MV_PCI_WIDTH pciWidth; /* PCI bus width */ 129}MV_PCI_MODE; 130 131/* mvPciInit - Initialize PCI interfaces*/ 132MV_VOID mvPciHalInit(MV_U32 pciIf, MV_PCI_MOD pciIfmod); 133 134/* mvPciCommandSet - Set PCI comman register value.*/ 135MV_STATUS mvPciCommandSet(MV_U32 pciIf, MV_U32 command); 136 137/* mvPciModeGet - Get PCI interface mode.*/ 138MV_STATUS mvPciModeGet(MV_U32 pciIf, MV_PCI_MODE *pPciMode); 139 140/* mvPciRetrySet - Set PCI retry counters*/ 141MV_STATUS mvPciRetrySet(MV_U32 pciIf, MV_U32 counter); 142 143/* mvPciDiscardTimerSet - Set PCI discard timer*/ 144MV_STATUS mvPciDiscardTimerSet(MV_U32 pciIf, MV_U32 pClkCycles); 145 146/* mvPciArbEnable - PCI arbiter enable/disable*/ 147MV_STATUS mvPciArbEnable(MV_U32 pciIf, MV_BOOL enable); 148 149/* mvPciArbParkDis - Disable arbiter parking on agent */ 150MV_STATUS mvPciArbParkDis(MV_U32 pciIf, MV_U32 pciAgentMask); 151 152/* mvPciArbBrokDetectSet - Set PCI arbiter broken detection */ 153MV_STATUS mvPciArbBrokDetectSet(MV_U32 pciIf, MV_U32 pClkCycles); 154 155/* mvPciConfigRead - Read from configuration space */ 156MV_U32 mvPciConfigRead (MV_U32 pciIf, MV_U32 bus, MV_U32 dev, 157 MV_U32 func,MV_U32 regOff); 158 159/* mvPciConfigWrite - Write to configuration space */ 160MV_STATUS mvPciConfigWrite(MV_U32 pciIf, MV_U32 bus, MV_U32 dev, 161 MV_U32 func, MV_U32 regOff, MV_U32 data); 162 163/* mvPciMasterEnable - Enable/disale PCI interface master transactions.*/ 164MV_STATUS mvPciMasterEnable(MV_U32 pciIf, MV_BOOL enable); 165 166/* mvPciSlaveEnable - Enable/disale PCI interface slave transactions.*/ 167MV_STATUS mvPciSlaveEnable(MV_U32 pciIf, MV_U32 bus, MV_U32 dev,MV_BOOL enable); 168 169/* mvPciLocalBusNumSet - Set PCI interface local bus number.*/ 170MV_STATUS mvPciLocalBusNumSet(MV_U32 pciIf, MV_U32 busNum); 171 172/* mvPciLocalBusNumGet - Get PCI interface local bus number.*/ 173MV_U32 mvPciLocalBusNumGet(MV_U32 pciIf); 174 175/* mvPciLocalDevNumSet - Set PCI interface local device number.*/ 176MV_STATUS mvPciLocalDevNumSet(MV_U32 pciIf, MV_U32 devNum); 177 178/* mvPciLocalDevNumGet - Get PCI interface local device number.*/ 179MV_U32 mvPciLocalDevNumGet(MV_U32 pciIf); 180 181 182#endif /* #ifndef __INCPCIH */ 183 184 185 186