1/* 2 * ADM5120 specific CPU feature overrides 3 * 4 * Copyright (C) 2007-2008 Gabor Juhos <juhosg@openwrt.org> 5 * 6 * This file was derived from: include/asm-mips/cpu-features.h 7 * Copyright (C) 2003, 2004 Ralf Baechle 8 * Copyright (C) 2004 Maciej W. Rozycki 9 * 10 * This program is free software; you can redistribute it and/or modify it 11 * under the terms of the GNU General Public License version 2 as published 12 * by the Free Software Foundation. 13 * 14 */ 15#ifndef __ASM_MACH_ADM5120_CPU_FEATURE_OVERRIDES_H 16#define __ASM_MACH_ADM5120_CPU_FEATURE_OVERRIDES_H 17 18/* 19 * The ADM5120 SOC has a built-in MIPS 4Kc core. 20 */ 21#define cpu_has_tlb 1 22#define cpu_has_4kex 1 23#define cpu_has_3k_cache 0 24#define cpu_has_4k_cache 1 25#define cpu_has_tx39_cache 0 26#define cpu_has_sb1_cache 0 27#define cpu_has_fpu 0 28#define cpu_has_32fpr 0 29#define cpu_has_counter 1 30#define cpu_has_watch 1 31#define cpu_has_divec 1 32/* #define cpu_has_vce ? */ 33/* #define cpu_has_cache_cdex_p ? */ 34/* #define cpu_has_cache_cdex_s ? */ 35#define cpu_has_prefetch 1 36/* #define cpu_has_mcheck ? */ 37#define cpu_has_ejtag 1 38#define cpu_has_llsc 1 39 40#define cpu_has_mips16 0 41#define cpu_has_mdmx 0 42#define cpu_has_mips3d 0 43#define cpu_has_smartmips 0 44 45/* #define cpu_has_vtag_icache ? */ 46/* #define cpu_has_dc_aliases ? */ 47/* #define cpu_has_ic_fills_f_dc ? */ 48/* #define cpu_has_pindexed_dcache ? */ 49 50/* #define cpu_icache_snoops_remote_store ? */ 51 52#define cpu_has_mips32r1 1 53#define cpu_has_mips32r2 0 54#define cpu_has_mips64r1 0 55#define cpu_has_mips64r2 0 56 57#define cpu_has_dsp 0 58#define cpu_has_mipsmt 0 59 60/* #define cpu_has_nofpuex ? */ 61#define cpu_has_64bits 0 62#define cpu_has_64bit_zero_reg 0 63#define cpu_has_64bit_gp_regs 0 64#define cpu_has_64bit_addresses 0 65 66/* #define cpu_has_inclusive_pcaches ? */ 67 68#define cpu_dcache_line_size() 16 69#define cpu_icache_line_size() 16 70 71#endif /* __ASM_MACH_ADM5120_CPU_FEATURE_OVERRIDES_H */ 72