1 2 3#include <linux/module.h> 4#include <linux/gfp.h> 5#include <linux/init.h> 6#include <linux/platform_device.h> 7#include <linux/dma-mapping.h> 8#include <sound/core.h> 9#include <sound/pcm.h> 10#include <sound/pcm_params.h> 11#include <sound/soc.h> 12#include <asm/dmabrg.h> 13 14 15/* registers and bits */ 16#define BRGATXSAR 0x00 17#define BRGARXDAR 0x04 18#define BRGATXTCR 0x08 19#define BRGARXTCR 0x0C 20#define BRGACR 0x10 21#define BRGATXTCNT 0x14 22#define BRGARXTCNT 0x18 23 24#define ACR_RAR (1 << 18) 25#define ACR_RDS (1 << 17) 26#define ACR_RDE (1 << 16) 27#define ACR_TAR (1 << 2) 28#define ACR_TDS (1 << 1) 29#define ACR_TDE (1 << 0) 30 31/* receiver/transmitter data alignment */ 32#define ACR_RAM_NONE (0 << 24) 33#define ACR_RAM_4BYTE (1 << 24) 34#define ACR_RAM_2WORD (2 << 24) 35#define ACR_TAM_NONE (0 << 8) 36#define ACR_TAM_4BYTE (1 << 8) 37#define ACR_TAM_2WORD (2 << 8) 38 39 40struct camelot_pcm { 41 unsigned long mmio; /* DMABRG audio channel control reg MMIO */ 42 unsigned int txid; /* ID of first DMABRG IRQ for this unit */ 43 44 struct snd_pcm_substream *tx_ss; 45 unsigned long tx_period_size; 46 unsigned int tx_period; 47 48 struct snd_pcm_substream *rx_ss; 49 unsigned long rx_period_size; 50 unsigned int rx_period; 51 52} cam_pcm_data[2] = { 53 { 54 .mmio = 0xFE3C0040, 55 .txid = DMABRGIRQ_A0TXF, 56 }, 57 { 58 .mmio = 0xFE3C0060, 59 .txid = DMABRGIRQ_A1TXF, 60 }, 61}; 62 63#define BRGREG(x) (*(unsigned long *)(cam->mmio + (x))) 64 65/* 66 * set a minimum of 16kb per period, to avoid interrupt-"storm" and 67 * resulting skipping. In general, the bigger the minimum size, the 68 * better for overall system performance. (The SH7760 is a puny CPU 69 * with a slow SDRAM interface and poor internal bus bandwidth, 70 * *especially* when the LCDC is active). The minimum for the DMAC 71 * is 8 bytes; 16kbytes are enough to get skip-free playback of a 72 * 44kHz/16bit/stereo MP3 on a lightly loaded system, and maintain 73 * reasonable responsiveness in MPlayer. 74 */ 75#define DMABRG_PERIOD_MIN 16 * 1024 76#define DMABRG_PERIOD_MAX 0x03fffffc 77#define DMABRG_PREALLOC_BUFFER 32 * 1024 78#define DMABRG_PREALLOC_BUFFER_MAX 32 * 1024 79 80/* support everything the SSI supports */ 81#define DMABRG_RATES \ 82 SNDRV_PCM_RATE_8000_192000 83 84#define DMABRG_FMTS \ 85 (SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U8 | \ 86 SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_U16_LE | \ 87 SNDRV_PCM_FMTBIT_S20_3LE | SNDRV_PCM_FMTBIT_U20_3LE | \ 88 SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_U24_3LE | \ 89 SNDRV_PCM_FMTBIT_S32_LE | SNDRV_PCM_FMTBIT_U32_LE) 90 91static struct snd_pcm_hardware camelot_pcm_hardware = { 92 .info = (SNDRV_PCM_INFO_MMAP | 93 SNDRV_PCM_INFO_INTERLEAVED | 94 SNDRV_PCM_INFO_BLOCK_TRANSFER | 95 SNDRV_PCM_INFO_MMAP_VALID | 96 SNDRV_PCM_INFO_BATCH), 97 .formats = DMABRG_FMTS, 98 .rates = DMABRG_RATES, 99 .rate_min = 8000, 100 .rate_max = 192000, 101 .channels_min = 2, 102 .channels_max = 8, /* max of the SSI */ 103 .buffer_bytes_max = DMABRG_PERIOD_MAX, 104 .period_bytes_min = DMABRG_PERIOD_MIN, 105 .period_bytes_max = DMABRG_PERIOD_MAX / 2, 106 .periods_min = 2, 107 .periods_max = 2, 108 .fifo_size = 128, 109}; 110 111static void camelot_txdma(void *data) 112{ 113 struct camelot_pcm *cam = data; 114 cam->tx_period ^= 1; 115 snd_pcm_period_elapsed(cam->tx_ss); 116} 117 118static void camelot_rxdma(void *data) 119{ 120 struct camelot_pcm *cam = data; 121 cam->rx_period ^= 1; 122 snd_pcm_period_elapsed(cam->rx_ss); 123} 124 125static int camelot_pcm_open(struct snd_pcm_substream *substream) 126{ 127 struct snd_soc_pcm_runtime *rtd = substream->private_data; 128 struct camelot_pcm *cam = &cam_pcm_data[rtd->dai->cpu_dai->id]; 129 int recv = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ? 0:1; 130 int ret, dmairq; 131 132 snd_soc_set_runtime_hwparams(substream, &camelot_pcm_hardware); 133 134 /* DMABRG buffer half/full events */ 135 dmairq = (recv) ? cam->txid + 2 : cam->txid; 136 if (recv) { 137 cam->rx_ss = substream; 138 ret = dmabrg_request_irq(dmairq, camelot_rxdma, cam); 139 if (unlikely(ret)) { 140 pr_debug("audio unit %d irqs already taken!\n", 141 rtd->dai->cpu_dai->id); 142 return -EBUSY; 143 } 144 (void)dmabrg_request_irq(dmairq + 1,camelot_rxdma, cam); 145 } else { 146 cam->tx_ss = substream; 147 ret = dmabrg_request_irq(dmairq, camelot_txdma, cam); 148 if (unlikely(ret)) { 149 pr_debug("audio unit %d irqs already taken!\n", 150 rtd->dai->cpu_dai->id); 151 return -EBUSY; 152 } 153 (void)dmabrg_request_irq(dmairq + 1, camelot_txdma, cam); 154 } 155 return 0; 156} 157 158static int camelot_pcm_close(struct snd_pcm_substream *substream) 159{ 160 struct snd_soc_pcm_runtime *rtd = substream->private_data; 161 struct camelot_pcm *cam = &cam_pcm_data[rtd->dai->cpu_dai->id]; 162 int recv = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ? 0:1; 163 int dmairq; 164 165 dmairq = (recv) ? cam->txid + 2 : cam->txid; 166 167 if (recv) 168 cam->rx_ss = NULL; 169 else 170 cam->tx_ss = NULL; 171 172 dmabrg_free_irq(dmairq + 1); 173 dmabrg_free_irq(dmairq); 174 175 return 0; 176} 177 178static int camelot_hw_params(struct snd_pcm_substream *substream, 179 struct snd_pcm_hw_params *hw_params) 180{ 181 struct snd_soc_pcm_runtime *rtd = substream->private_data; 182 struct camelot_pcm *cam = &cam_pcm_data[rtd->dai->cpu_dai->id]; 183 int recv = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ? 0:1; 184 int ret; 185 186 ret = snd_pcm_lib_malloc_pages(substream, 187 params_buffer_bytes(hw_params)); 188 if (ret < 0) 189 return ret; 190 191 if (recv) { 192 cam->rx_period_size = params_period_bytes(hw_params); 193 cam->rx_period = 0; 194 } else { 195 cam->tx_period_size = params_period_bytes(hw_params); 196 cam->tx_period = 0; 197 } 198 return 0; 199} 200 201static int camelot_hw_free(struct snd_pcm_substream *substream) 202{ 203 return snd_pcm_lib_free_pages(substream); 204} 205 206static int camelot_prepare(struct snd_pcm_substream *substream) 207{ 208 struct snd_pcm_runtime *runtime = substream->runtime; 209 struct snd_soc_pcm_runtime *rtd = substream->private_data; 210 struct camelot_pcm *cam = &cam_pcm_data[rtd->dai->cpu_dai->id]; 211 212 pr_debug("PCM data: addr 0x%08ulx len %d\n", 213 (u32)runtime->dma_addr, runtime->dma_bytes); 214 215 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { 216 BRGREG(BRGATXSAR) = (unsigned long)runtime->dma_area; 217 BRGREG(BRGATXTCR) = runtime->dma_bytes; 218 } else { 219 BRGREG(BRGARXDAR) = (unsigned long)runtime->dma_area; 220 BRGREG(BRGARXTCR) = runtime->dma_bytes; 221 } 222 223 return 0; 224} 225 226static inline void dmabrg_play_dma_start(struct camelot_pcm *cam) 227{ 228 unsigned long acr = BRGREG(BRGACR) & ~(ACR_TDS | ACR_RDS); 229 /* start DMABRG engine: XFER start, auto-addr-reload */ 230 BRGREG(BRGACR) = acr | ACR_TDE | ACR_TAR | ACR_TAM_2WORD; 231} 232 233static inline void dmabrg_play_dma_stop(struct camelot_pcm *cam) 234{ 235 unsigned long acr = BRGREG(BRGACR) & ~(ACR_TDS | ACR_RDS); 236 /* forcibly terminate data transmission */ 237 BRGREG(BRGACR) = acr | ACR_TDS; 238} 239 240static inline void dmabrg_rec_dma_start(struct camelot_pcm *cam) 241{ 242 unsigned long acr = BRGREG(BRGACR) & ~(ACR_TDS | ACR_RDS); 243 /* start DMABRG engine: recv start, auto-reload */ 244 BRGREG(BRGACR) = acr | ACR_RDE | ACR_RAR | ACR_RAM_2WORD; 245} 246 247static inline void dmabrg_rec_dma_stop(struct camelot_pcm *cam) 248{ 249 unsigned long acr = BRGREG(BRGACR) & ~(ACR_TDS | ACR_RDS); 250 /* forcibly terminate data receiver */ 251 BRGREG(BRGACR) = acr | ACR_RDS; 252} 253 254static int camelot_trigger(struct snd_pcm_substream *substream, int cmd) 255{ 256 struct snd_soc_pcm_runtime *rtd = substream->private_data; 257 struct camelot_pcm *cam = &cam_pcm_data[rtd->dai->cpu_dai->id]; 258 int recv = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ? 0:1; 259 260 switch (cmd) { 261 case SNDRV_PCM_TRIGGER_START: 262 if (recv) 263 dmabrg_rec_dma_start(cam); 264 else 265 dmabrg_play_dma_start(cam); 266 break; 267 case SNDRV_PCM_TRIGGER_STOP: 268 if (recv) 269 dmabrg_rec_dma_stop(cam); 270 else 271 dmabrg_play_dma_stop(cam); 272 break; 273 default: 274 return -EINVAL; 275 } 276 277 return 0; 278} 279 280static snd_pcm_uframes_t camelot_pos(struct snd_pcm_substream *substream) 281{ 282 struct snd_pcm_runtime *runtime = substream->runtime; 283 struct snd_soc_pcm_runtime *rtd = substream->private_data; 284 struct camelot_pcm *cam = &cam_pcm_data[rtd->dai->cpu_dai->id]; 285 int recv = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ? 0:1; 286 unsigned long pos; 287 288 /* cannot use the DMABRG pointer register: under load, by the 289 * time ALSA comes around to read the register, it is already 290 * far ahead (or worse, already done with the fragment) of the 291 * position at the time the IRQ was triggered, which results in 292 * fast-playback sound in my test application (ScummVM) 293 */ 294 if (recv) 295 pos = cam->rx_period ? cam->rx_period_size : 0; 296 else 297 pos = cam->tx_period ? cam->tx_period_size : 0; 298 299 return bytes_to_frames(runtime, pos); 300} 301 302static struct snd_pcm_ops camelot_pcm_ops = { 303 .open = camelot_pcm_open, 304 .close = camelot_pcm_close, 305 .ioctl = snd_pcm_lib_ioctl, 306 .hw_params = camelot_hw_params, 307 .hw_free = camelot_hw_free, 308 .prepare = camelot_prepare, 309 .trigger = camelot_trigger, 310 .pointer = camelot_pos, 311}; 312 313static void camelot_pcm_free(struct snd_pcm *pcm) 314{ 315 snd_pcm_lib_preallocate_free_for_all(pcm); 316} 317 318static int camelot_pcm_new(struct snd_card *card, 319 struct snd_soc_dai *dai, 320 struct snd_pcm *pcm) 321{ 322 /* dont use SNDRV_DMA_TYPE_DEV, since it will oops the SH kernel 323 * in MMAP mode (i.e. aplay -M) 324 */ 325 snd_pcm_lib_preallocate_pages_for_all(pcm, 326 SNDRV_DMA_TYPE_CONTINUOUS, 327 snd_dma_continuous_data(GFP_KERNEL), 328 DMABRG_PREALLOC_BUFFER, DMABRG_PREALLOC_BUFFER_MAX); 329 330 return 0; 331} 332 333struct snd_soc_platform sh7760_soc_platform = { 334 .name = "sh7760-pcm", 335 .pcm_ops = &camelot_pcm_ops, 336 .pcm_new = camelot_pcm_new, 337 .pcm_free = camelot_pcm_free, 338}; 339EXPORT_SYMBOL_GPL(sh7760_soc_platform); 340 341static int __init sh7760_soc_platform_init(void) 342{ 343 return snd_soc_register_platform(&sh7760_soc_platform); 344} 345module_init(sh7760_soc_platform_init); 346 347static void __exit sh7760_soc_platform_exit(void) 348{ 349 snd_soc_unregister_platform(&sh7760_soc_platform); 350} 351module_exit(sh7760_soc_platform_exit); 352 353MODULE_LICENSE("GPL"); 354MODULE_DESCRIPTION("SH7760 Audio DMA (DMABRG) driver"); 355MODULE_AUTHOR("Manuel Lauss <mano@roarinelk.homelinux.net>"); 356