• Home
  • History
  • Annotate
  • Line#
  • Navigate
  • Raw
  • Download
  • only in /netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/sound/soc/codecs/
1/*
2 * wm8940.h -- WM8940 Soc Audio driver
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9#ifndef _WM8940_H
10#define _WM8940_H
11
12struct wm8940_setup_data {
13	/* Vref to analogue output resistance */
14#define WM8940_VROI_1K 0
15#define WM8940_VROI_30K 1
16	unsigned int vroi:1;
17};
18extern struct snd_soc_dai wm8940_dai;
19extern struct snd_soc_codec_device soc_codec_dev_wm8940;
20
21/* WM8940 register space */
22#define WM8940_SOFTRESET	0x00
23#define WM8940_POWER1		0x01
24#define WM8940_POWER2		0x02
25#define WM8940_POWER3		0x03
26#define WM8940_IFACE		0x04
27#define WM8940_COMPANDINGCTL	0x05
28#define WM8940_CLOCK		0x06
29#define WM8940_ADDCNTRL		0x07
30#define WM8940_GPIO		0x08
31#define WM8940_CTLINT		0x09
32#define WM8940_DAC		0x0A
33#define WM8940_DACVOL		0x0B
34
35#define WM8940_ADC		0x0E
36#define WM8940_ADCVOL		0x0F
37#define WM8940_NOTCH1		0x10
38#define WM8940_NOTCH2		0x11
39#define WM8940_NOTCH3		0x12
40#define WM8940_NOTCH4		0x13
41#define WM8940_NOTCH5		0x14
42#define WM8940_NOTCH6		0x15
43#define WM8940_NOTCH7		0x16
44#define WM8940_NOTCH8		0x17
45#define WM8940_DACLIM1		0x18
46#define WM8940_DACLIM2		0x19
47
48#define WM8940_ALC1		0x20
49#define WM8940_ALC2		0x21
50#define WM8940_ALC3		0x22
51#define WM8940_NOISEGATE	0x23
52#define WM8940_PLLN		0x24
53#define WM8940_PLLK1		0x25
54#define WM8940_PLLK2		0x26
55#define WM8940_PLLK3		0x27
56
57#define WM8940_ALC4		0x2A
58
59#define WM8940_INPUTCTL		0x2C
60#define WM8940_PGAGAIN		0x2D
61
62#define WM8940_ADCBOOST		0x2F
63
64#define WM8940_OUTPUTCTL	0x31
65#define WM8940_SPKMIX		0x32
66
67#define WM8940_SPKVOL		0x36
68
69#define WM8940_MONOMIX		0x38
70
71#define WM8940_CACHEREGNUM  0x57
72
73
74/* Clock divider Id's */
75#define WM8940_BCLKDIV 0
76#define WM8940_MCLKDIV 1
77#define WM8940_OPCLKDIV 2
78
79/* MCLK clock dividers */
80#define WM8940_MCLKDIV_1	0
81#define WM8940_MCLKDIV_1_5	1
82#define WM8940_MCLKDIV_2	2
83#define WM8940_MCLKDIV_3	3
84#define WM8940_MCLKDIV_4	4
85#define WM8940_MCLKDIV_6	5
86#define WM8940_MCLKDIV_8	6
87#define WM8940_MCLKDIV_12	7
88
89/* BCLK clock dividers */
90#define WM8940_BCLKDIV_1 0
91#define WM8940_BCLKDIV_2 1
92#define WM8940_BCLKDIV_4 2
93#define WM8940_BCLKDIV_8 3
94#define WM8940_BCLKDIV_16 4
95#define WM8940_BCLKDIV_32 5
96
97/* PLL Out Dividers */
98#define WM8940_OPCLKDIV_1 0
99#define WM8940_OPCLKDIV_2 1
100#define WM8940_OPCLKDIV_3 2
101#define WM8940_OPCLKDIV_4 3
102
103#endif /* _WM8940_H */
104