1/* 2 * Copyright (c) by Jaroslav Kysela <perex@perex.cz> 3 * Routines for control of YMF724/740/744/754 chips 4 * 5 * This program is free software; you can redistribute it and/or modify 6 * it under the terms of the GNU General Public License as published by 7 * the Free Software Foundation; either version 2 of the License, or 8 * (at your option) any later version. 9 * 10 * This program is distributed in the hope that it will be useful, 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * GNU General Public License for more details. 14 * 15 * You should have received a copy of the GNU General Public License 16 * along with this program; if not, write to the Free Software 17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 18 * 19 */ 20 21#include <linux/delay.h> 22#include <linux/firmware.h> 23#include <linux/init.h> 24#include <linux/interrupt.h> 25#include <linux/pci.h> 26#include <linux/sched.h> 27#include <linux/slab.h> 28#include <linux/vmalloc.h> 29#include <linux/mutex.h> 30 31#include <sound/core.h> 32#include <sound/control.h> 33#include <sound/info.h> 34#include <sound/tlv.h> 35#include <sound/ymfpci.h> 36#include <sound/asoundef.h> 37#include <sound/mpu401.h> 38 39#include <asm/io.h> 40#include <asm/byteorder.h> 41 42/* 43 * common I/O routines 44 */ 45 46static void snd_ymfpci_irq_wait(struct snd_ymfpci *chip); 47 48static inline u8 snd_ymfpci_readb(struct snd_ymfpci *chip, u32 offset) 49{ 50 return readb(chip->reg_area_virt + offset); 51} 52 53static inline void snd_ymfpci_writeb(struct snd_ymfpci *chip, u32 offset, u8 val) 54{ 55 writeb(val, chip->reg_area_virt + offset); 56} 57 58static inline u16 snd_ymfpci_readw(struct snd_ymfpci *chip, u32 offset) 59{ 60 return readw(chip->reg_area_virt + offset); 61} 62 63static inline void snd_ymfpci_writew(struct snd_ymfpci *chip, u32 offset, u16 val) 64{ 65 writew(val, chip->reg_area_virt + offset); 66} 67 68static inline u32 snd_ymfpci_readl(struct snd_ymfpci *chip, u32 offset) 69{ 70 return readl(chip->reg_area_virt + offset); 71} 72 73static inline void snd_ymfpci_writel(struct snd_ymfpci *chip, u32 offset, u32 val) 74{ 75 writel(val, chip->reg_area_virt + offset); 76} 77 78static int snd_ymfpci_codec_ready(struct snd_ymfpci *chip, int secondary) 79{ 80 unsigned long end_time; 81 u32 reg = secondary ? YDSXGR_SECSTATUSADR : YDSXGR_PRISTATUSADR; 82 83 end_time = jiffies + msecs_to_jiffies(750); 84 do { 85 if ((snd_ymfpci_readw(chip, reg) & 0x8000) == 0) 86 return 0; 87 schedule_timeout_uninterruptible(1); 88 } while (time_before(jiffies, end_time)); 89 snd_printk(KERN_ERR "codec_ready: codec %i is not ready [0x%x]\n", secondary, snd_ymfpci_readw(chip, reg)); 90 return -EBUSY; 91} 92 93static void snd_ymfpci_codec_write(struct snd_ac97 *ac97, u16 reg, u16 val) 94{ 95 struct snd_ymfpci *chip = ac97->private_data; 96 u32 cmd; 97 98 snd_ymfpci_codec_ready(chip, 0); 99 cmd = ((YDSXG_AC97WRITECMD | reg) << 16) | val; 100 snd_ymfpci_writel(chip, YDSXGR_AC97CMDDATA, cmd); 101} 102 103static u16 snd_ymfpci_codec_read(struct snd_ac97 *ac97, u16 reg) 104{ 105 struct snd_ymfpci *chip = ac97->private_data; 106 107 if (snd_ymfpci_codec_ready(chip, 0)) 108 return ~0; 109 snd_ymfpci_writew(chip, YDSXGR_AC97CMDADR, YDSXG_AC97READCMD | reg); 110 if (snd_ymfpci_codec_ready(chip, 0)) 111 return ~0; 112 if (chip->device_id == PCI_DEVICE_ID_YAMAHA_744 && chip->rev < 2) { 113 int i; 114 for (i = 0; i < 600; i++) 115 snd_ymfpci_readw(chip, YDSXGR_PRISTATUSDATA); 116 } 117 return snd_ymfpci_readw(chip, YDSXGR_PRISTATUSDATA); 118} 119 120/* 121 * Misc routines 122 */ 123 124static u32 snd_ymfpci_calc_delta(u32 rate) 125{ 126 switch (rate) { 127 case 8000: return 0x02aaab00; 128 case 11025: return 0x03accd00; 129 case 16000: return 0x05555500; 130 case 22050: return 0x07599a00; 131 case 32000: return 0x0aaaab00; 132 case 44100: return 0x0eb33300; 133 default: return ((rate << 16) / 375) << 5; 134 } 135} 136 137static u32 def_rate[8] = { 138 100, 2000, 8000, 11025, 16000, 22050, 32000, 48000 139}; 140 141static u32 snd_ymfpci_calc_lpfK(u32 rate) 142{ 143 u32 i; 144 static u32 val[8] = { 145 0x00570000, 0x06AA0000, 0x18B20000, 0x20930000, 146 0x2B9A0000, 0x35A10000, 0x3EAA0000, 0x40000000 147 }; 148 149 if (rate == 44100) 150 return 0x40000000; 151 for (i = 0; i < 8; i++) 152 if (rate <= def_rate[i]) 153 return val[i]; 154 return val[0]; 155} 156 157static u32 snd_ymfpci_calc_lpfQ(u32 rate) 158{ 159 u32 i; 160 static u32 val[8] = { 161 0x35280000, 0x34A70000, 0x32020000, 0x31770000, 162 0x31390000, 0x31C90000, 0x33D00000, 0x40000000 163 }; 164 165 if (rate == 44100) 166 return 0x370A0000; 167 for (i = 0; i < 8; i++) 168 if (rate <= def_rate[i]) 169 return val[i]; 170 return val[0]; 171} 172 173/* 174 * Hardware start management 175 */ 176 177static void snd_ymfpci_hw_start(struct snd_ymfpci *chip) 178{ 179 unsigned long flags; 180 181 spin_lock_irqsave(&chip->reg_lock, flags); 182 if (chip->start_count++ > 0) 183 goto __end; 184 snd_ymfpci_writel(chip, YDSXGR_MODE, 185 snd_ymfpci_readl(chip, YDSXGR_MODE) | 3); 186 chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT) & 1; 187 __end: 188 spin_unlock_irqrestore(&chip->reg_lock, flags); 189} 190 191static void snd_ymfpci_hw_stop(struct snd_ymfpci *chip) 192{ 193 unsigned long flags; 194 long timeout = 1000; 195 196 spin_lock_irqsave(&chip->reg_lock, flags); 197 if (--chip->start_count > 0) 198 goto __end; 199 snd_ymfpci_writel(chip, YDSXGR_MODE, 200 snd_ymfpci_readl(chip, YDSXGR_MODE) & ~3); 201 while (timeout-- > 0) { 202 if ((snd_ymfpci_readl(chip, YDSXGR_STATUS) & 2) == 0) 203 break; 204 } 205 if (atomic_read(&chip->interrupt_sleep_count)) { 206 atomic_set(&chip->interrupt_sleep_count, 0); 207 wake_up(&chip->interrupt_sleep); 208 } 209 __end: 210 spin_unlock_irqrestore(&chip->reg_lock, flags); 211} 212 213/* 214 * Playback voice management 215 */ 216 217static int voice_alloc(struct snd_ymfpci *chip, 218 enum snd_ymfpci_voice_type type, int pair, 219 struct snd_ymfpci_voice **rvoice) 220{ 221 struct snd_ymfpci_voice *voice, *voice2; 222 int idx; 223 224 *rvoice = NULL; 225 for (idx = 0; idx < YDSXG_PLAYBACK_VOICES; idx += pair ? 2 : 1) { 226 voice = &chip->voices[idx]; 227 voice2 = pair ? &chip->voices[idx+1] : NULL; 228 if (voice->use || (voice2 && voice2->use)) 229 continue; 230 voice->use = 1; 231 if (voice2) 232 voice2->use = 1; 233 switch (type) { 234 case YMFPCI_PCM: 235 voice->pcm = 1; 236 if (voice2) 237 voice2->pcm = 1; 238 break; 239 case YMFPCI_SYNTH: 240 voice->synth = 1; 241 break; 242 case YMFPCI_MIDI: 243 voice->midi = 1; 244 break; 245 } 246 snd_ymfpci_hw_start(chip); 247 if (voice2) 248 snd_ymfpci_hw_start(chip); 249 *rvoice = voice; 250 return 0; 251 } 252 return -ENOMEM; 253} 254 255static int snd_ymfpci_voice_alloc(struct snd_ymfpci *chip, 256 enum snd_ymfpci_voice_type type, int pair, 257 struct snd_ymfpci_voice **rvoice) 258{ 259 unsigned long flags; 260 int result; 261 262 if (snd_BUG_ON(!rvoice)) 263 return -EINVAL; 264 if (snd_BUG_ON(pair && type != YMFPCI_PCM)) 265 return -EINVAL; 266 267 spin_lock_irqsave(&chip->voice_lock, flags); 268 for (;;) { 269 result = voice_alloc(chip, type, pair, rvoice); 270 if (result == 0 || type != YMFPCI_PCM) 271 break; 272 /* TODO: synth/midi voice deallocation */ 273 break; 274 } 275 spin_unlock_irqrestore(&chip->voice_lock, flags); 276 return result; 277} 278 279static int snd_ymfpci_voice_free(struct snd_ymfpci *chip, struct snd_ymfpci_voice *pvoice) 280{ 281 unsigned long flags; 282 283 if (snd_BUG_ON(!pvoice)) 284 return -EINVAL; 285 snd_ymfpci_hw_stop(chip); 286 spin_lock_irqsave(&chip->voice_lock, flags); 287 if (pvoice->number == chip->src441_used) { 288 chip->src441_used = -1; 289 pvoice->ypcm->use_441_slot = 0; 290 } 291 pvoice->use = pvoice->pcm = pvoice->synth = pvoice->midi = 0; 292 pvoice->ypcm = NULL; 293 pvoice->interrupt = NULL; 294 spin_unlock_irqrestore(&chip->voice_lock, flags); 295 return 0; 296} 297 298/* 299 * PCM part 300 */ 301 302static void snd_ymfpci_pcm_interrupt(struct snd_ymfpci *chip, struct snd_ymfpci_voice *voice) 303{ 304 struct snd_ymfpci_pcm *ypcm; 305 u32 pos, delta; 306 307 if ((ypcm = voice->ypcm) == NULL) 308 return; 309 if (ypcm->substream == NULL) 310 return; 311 spin_lock(&chip->reg_lock); 312 if (ypcm->running) { 313 pos = le32_to_cpu(voice->bank[chip->active_bank].start); 314 if (pos < ypcm->last_pos) 315 delta = pos + (ypcm->buffer_size - ypcm->last_pos); 316 else 317 delta = pos - ypcm->last_pos; 318 ypcm->period_pos += delta; 319 ypcm->last_pos = pos; 320 if (ypcm->period_pos >= ypcm->period_size) { 321 /* 322 printk(KERN_DEBUG 323 "done - active_bank = 0x%x, start = 0x%x\n", 324 chip->active_bank, 325 voice->bank[chip->active_bank].start); 326 */ 327 ypcm->period_pos %= ypcm->period_size; 328 spin_unlock(&chip->reg_lock); 329 snd_pcm_period_elapsed(ypcm->substream); 330 spin_lock(&chip->reg_lock); 331 } 332 333 if (unlikely(ypcm->update_pcm_vol)) { 334 unsigned int subs = ypcm->substream->number; 335 unsigned int next_bank = 1 - chip->active_bank; 336 struct snd_ymfpci_playback_bank *bank; 337 u32 volume; 338 339 bank = &voice->bank[next_bank]; 340 volume = cpu_to_le32(chip->pcm_mixer[subs].left << 15); 341 bank->left_gain_end = volume; 342 if (ypcm->output_rear) 343 bank->eff2_gain_end = volume; 344 if (ypcm->voices[1]) 345 bank = &ypcm->voices[1]->bank[next_bank]; 346 volume = cpu_to_le32(chip->pcm_mixer[subs].right << 15); 347 bank->right_gain_end = volume; 348 if (ypcm->output_rear) 349 bank->eff3_gain_end = volume; 350 ypcm->update_pcm_vol--; 351 } 352 } 353 spin_unlock(&chip->reg_lock); 354} 355 356static void snd_ymfpci_pcm_capture_interrupt(struct snd_pcm_substream *substream) 357{ 358 struct snd_pcm_runtime *runtime = substream->runtime; 359 struct snd_ymfpci_pcm *ypcm = runtime->private_data; 360 struct snd_ymfpci *chip = ypcm->chip; 361 u32 pos, delta; 362 363 spin_lock(&chip->reg_lock); 364 if (ypcm->running) { 365 pos = le32_to_cpu(chip->bank_capture[ypcm->capture_bank_number][chip->active_bank]->start) >> ypcm->shift; 366 if (pos < ypcm->last_pos) 367 delta = pos + (ypcm->buffer_size - ypcm->last_pos); 368 else 369 delta = pos - ypcm->last_pos; 370 ypcm->period_pos += delta; 371 ypcm->last_pos = pos; 372 if (ypcm->period_pos >= ypcm->period_size) { 373 ypcm->period_pos %= ypcm->period_size; 374 /* 375 printk(KERN_DEBUG 376 "done - active_bank = 0x%x, start = 0x%x\n", 377 chip->active_bank, 378 voice->bank[chip->active_bank].start); 379 */ 380 spin_unlock(&chip->reg_lock); 381 snd_pcm_period_elapsed(substream); 382 spin_lock(&chip->reg_lock); 383 } 384 } 385 spin_unlock(&chip->reg_lock); 386} 387 388static int snd_ymfpci_playback_trigger(struct snd_pcm_substream *substream, 389 int cmd) 390{ 391 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); 392 struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data; 393 struct snd_kcontrol *kctl = NULL; 394 int result = 0; 395 396 spin_lock(&chip->reg_lock); 397 if (ypcm->voices[0] == NULL) { 398 result = -EINVAL; 399 goto __unlock; 400 } 401 switch (cmd) { 402 case SNDRV_PCM_TRIGGER_START: 403 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: 404 case SNDRV_PCM_TRIGGER_RESUME: 405 chip->ctrl_playback[ypcm->voices[0]->number + 1] = cpu_to_le32(ypcm->voices[0]->bank_addr); 406 if (ypcm->voices[1] != NULL && !ypcm->use_441_slot) 407 chip->ctrl_playback[ypcm->voices[1]->number + 1] = cpu_to_le32(ypcm->voices[1]->bank_addr); 408 ypcm->running = 1; 409 break; 410 case SNDRV_PCM_TRIGGER_STOP: 411 if (substream->pcm == chip->pcm && !ypcm->use_441_slot) { 412 kctl = chip->pcm_mixer[substream->number].ctl; 413 kctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE; 414 } 415 /* fall through */ 416 case SNDRV_PCM_TRIGGER_PAUSE_PUSH: 417 case SNDRV_PCM_TRIGGER_SUSPEND: 418 chip->ctrl_playback[ypcm->voices[0]->number + 1] = 0; 419 if (ypcm->voices[1] != NULL && !ypcm->use_441_slot) 420 chip->ctrl_playback[ypcm->voices[1]->number + 1] = 0; 421 ypcm->running = 0; 422 break; 423 default: 424 result = -EINVAL; 425 break; 426 } 427 __unlock: 428 spin_unlock(&chip->reg_lock); 429 if (kctl) 430 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_INFO, &kctl->id); 431 return result; 432} 433static int snd_ymfpci_capture_trigger(struct snd_pcm_substream *substream, 434 int cmd) 435{ 436 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); 437 struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data; 438 int result = 0; 439 u32 tmp; 440 441 spin_lock(&chip->reg_lock); 442 switch (cmd) { 443 case SNDRV_PCM_TRIGGER_START: 444 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: 445 case SNDRV_PCM_TRIGGER_RESUME: 446 tmp = snd_ymfpci_readl(chip, YDSXGR_MAPOFREC) | (1 << ypcm->capture_bank_number); 447 snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, tmp); 448 ypcm->running = 1; 449 break; 450 case SNDRV_PCM_TRIGGER_STOP: 451 case SNDRV_PCM_TRIGGER_PAUSE_PUSH: 452 case SNDRV_PCM_TRIGGER_SUSPEND: 453 tmp = snd_ymfpci_readl(chip, YDSXGR_MAPOFREC) & ~(1 << ypcm->capture_bank_number); 454 snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, tmp); 455 ypcm->running = 0; 456 break; 457 default: 458 result = -EINVAL; 459 break; 460 } 461 spin_unlock(&chip->reg_lock); 462 return result; 463} 464 465static int snd_ymfpci_pcm_voice_alloc(struct snd_ymfpci_pcm *ypcm, int voices) 466{ 467 int err; 468 469 if (ypcm->voices[1] != NULL && voices < 2) { 470 snd_ymfpci_voice_free(ypcm->chip, ypcm->voices[1]); 471 ypcm->voices[1] = NULL; 472 } 473 if (voices == 1 && ypcm->voices[0] != NULL) 474 return 0; /* already allocated */ 475 if (voices == 2 && ypcm->voices[0] != NULL && ypcm->voices[1] != NULL) 476 return 0; /* already allocated */ 477 if (voices > 1) { 478 if (ypcm->voices[0] != NULL && ypcm->voices[1] == NULL) { 479 snd_ymfpci_voice_free(ypcm->chip, ypcm->voices[0]); 480 ypcm->voices[0] = NULL; 481 } 482 } 483 err = snd_ymfpci_voice_alloc(ypcm->chip, YMFPCI_PCM, voices > 1, &ypcm->voices[0]); 484 if (err < 0) 485 return err; 486 ypcm->voices[0]->ypcm = ypcm; 487 ypcm->voices[0]->interrupt = snd_ymfpci_pcm_interrupt; 488 if (voices > 1) { 489 ypcm->voices[1] = &ypcm->chip->voices[ypcm->voices[0]->number + 1]; 490 ypcm->voices[1]->ypcm = ypcm; 491 } 492 return 0; 493} 494 495static void snd_ymfpci_pcm_init_voice(struct snd_ymfpci_pcm *ypcm, unsigned int voiceidx, 496 struct snd_pcm_runtime *runtime, 497 int has_pcm_volume) 498{ 499 struct snd_ymfpci_voice *voice = ypcm->voices[voiceidx]; 500 u32 format; 501 u32 delta = snd_ymfpci_calc_delta(runtime->rate); 502 u32 lpfQ = snd_ymfpci_calc_lpfQ(runtime->rate); 503 u32 lpfK = snd_ymfpci_calc_lpfK(runtime->rate); 504 struct snd_ymfpci_playback_bank *bank; 505 unsigned int nbank; 506 u32 vol_left, vol_right; 507 u8 use_left, use_right; 508 unsigned long flags; 509 510 if (snd_BUG_ON(!voice)) 511 return; 512 if (runtime->channels == 1) { 513 use_left = 1; 514 use_right = 1; 515 } else { 516 use_left = (voiceidx & 1) == 0; 517 use_right = !use_left; 518 } 519 if (has_pcm_volume) { 520 vol_left = cpu_to_le32(ypcm->chip->pcm_mixer 521 [ypcm->substream->number].left << 15); 522 vol_right = cpu_to_le32(ypcm->chip->pcm_mixer 523 [ypcm->substream->number].right << 15); 524 } else { 525 vol_left = cpu_to_le32(0x40000000); 526 vol_right = cpu_to_le32(0x40000000); 527 } 528 spin_lock_irqsave(&ypcm->chip->voice_lock, flags); 529 format = runtime->channels == 2 ? 0x00010000 : 0; 530 if (snd_pcm_format_width(runtime->format) == 8) 531 format |= 0x80000000; 532 else if (ypcm->chip->device_id == PCI_DEVICE_ID_YAMAHA_754 && 533 runtime->rate == 44100 && runtime->channels == 2 && 534 voiceidx == 0 && (ypcm->chip->src441_used == -1 || 535 ypcm->chip->src441_used == voice->number)) { 536 ypcm->chip->src441_used = voice->number; 537 ypcm->use_441_slot = 1; 538 format |= 0x10000000; 539 } 540 if (ypcm->chip->src441_used == voice->number && 541 (format & 0x10000000) == 0) { 542 ypcm->chip->src441_used = -1; 543 ypcm->use_441_slot = 0; 544 } 545 if (runtime->channels == 2 && (voiceidx & 1) != 0) 546 format |= 1; 547 spin_unlock_irqrestore(&ypcm->chip->voice_lock, flags); 548 for (nbank = 0; nbank < 2; nbank++) { 549 bank = &voice->bank[nbank]; 550 memset(bank, 0, sizeof(*bank)); 551 bank->format = cpu_to_le32(format); 552 bank->base = cpu_to_le32(runtime->dma_addr); 553 bank->loop_end = cpu_to_le32(ypcm->buffer_size); 554 bank->lpfQ = cpu_to_le32(lpfQ); 555 bank->delta = 556 bank->delta_end = cpu_to_le32(delta); 557 bank->lpfK = 558 bank->lpfK_end = cpu_to_le32(lpfK); 559 bank->eg_gain = 560 bank->eg_gain_end = cpu_to_le32(0x40000000); 561 562 if (ypcm->output_front) { 563 if (use_left) { 564 bank->left_gain = 565 bank->left_gain_end = vol_left; 566 } 567 if (use_right) { 568 bank->right_gain = 569 bank->right_gain_end = vol_right; 570 } 571 } 572 if (ypcm->output_rear) { 573 if (!ypcm->swap_rear) { 574 if (use_left) { 575 bank->eff2_gain = 576 bank->eff2_gain_end = vol_left; 577 } 578 if (use_right) { 579 bank->eff3_gain = 580 bank->eff3_gain_end = vol_right; 581 } 582 } else { 583 /* The SPDIF out channels seem to be swapped, so we have 584 * to swap them here, too. The rear analog out channels 585 * will be wrong, but otherwise AC3 would not work. 586 */ 587 if (use_left) { 588 bank->eff3_gain = 589 bank->eff3_gain_end = vol_left; 590 } 591 if (use_right) { 592 bank->eff2_gain = 593 bank->eff2_gain_end = vol_right; 594 } 595 } 596 } 597 } 598} 599 600static int __devinit snd_ymfpci_ac3_init(struct snd_ymfpci *chip) 601{ 602 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci), 603 4096, &chip->ac3_tmp_base) < 0) 604 return -ENOMEM; 605 606 chip->bank_effect[3][0]->base = 607 chip->bank_effect[3][1]->base = cpu_to_le32(chip->ac3_tmp_base.addr); 608 chip->bank_effect[3][0]->loop_end = 609 chip->bank_effect[3][1]->loop_end = cpu_to_le32(1024); 610 chip->bank_effect[4][0]->base = 611 chip->bank_effect[4][1]->base = cpu_to_le32(chip->ac3_tmp_base.addr + 2048); 612 chip->bank_effect[4][0]->loop_end = 613 chip->bank_effect[4][1]->loop_end = cpu_to_le32(1024); 614 615 spin_lock_irq(&chip->reg_lock); 616 snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT, 617 snd_ymfpci_readl(chip, YDSXGR_MAPOFEFFECT) | 3 << 3); 618 spin_unlock_irq(&chip->reg_lock); 619 return 0; 620} 621 622static int snd_ymfpci_ac3_done(struct snd_ymfpci *chip) 623{ 624 spin_lock_irq(&chip->reg_lock); 625 snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT, 626 snd_ymfpci_readl(chip, YDSXGR_MAPOFEFFECT) & ~(3 << 3)); 627 spin_unlock_irq(&chip->reg_lock); 628 // snd_ymfpci_irq_wait(chip); 629 if (chip->ac3_tmp_base.area) { 630 snd_dma_free_pages(&chip->ac3_tmp_base); 631 chip->ac3_tmp_base.area = NULL; 632 } 633 return 0; 634} 635 636static int snd_ymfpci_playback_hw_params(struct snd_pcm_substream *substream, 637 struct snd_pcm_hw_params *hw_params) 638{ 639 struct snd_pcm_runtime *runtime = substream->runtime; 640 struct snd_ymfpci_pcm *ypcm = runtime->private_data; 641 int err; 642 643 if ((err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params))) < 0) 644 return err; 645 if ((err = snd_ymfpci_pcm_voice_alloc(ypcm, params_channels(hw_params))) < 0) 646 return err; 647 return 0; 648} 649 650static int snd_ymfpci_playback_hw_free(struct snd_pcm_substream *substream) 651{ 652 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); 653 struct snd_pcm_runtime *runtime = substream->runtime; 654 struct snd_ymfpci_pcm *ypcm; 655 656 if (runtime->private_data == NULL) 657 return 0; 658 ypcm = runtime->private_data; 659 660 /* wait, until the PCI operations are not finished */ 661 snd_ymfpci_irq_wait(chip); 662 snd_pcm_lib_free_pages(substream); 663 if (ypcm->voices[1]) { 664 snd_ymfpci_voice_free(chip, ypcm->voices[1]); 665 ypcm->voices[1] = NULL; 666 } 667 if (ypcm->voices[0]) { 668 snd_ymfpci_voice_free(chip, ypcm->voices[0]); 669 ypcm->voices[0] = NULL; 670 } 671 return 0; 672} 673 674static int snd_ymfpci_playback_prepare(struct snd_pcm_substream *substream) 675{ 676 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); 677 struct snd_pcm_runtime *runtime = substream->runtime; 678 struct snd_ymfpci_pcm *ypcm = runtime->private_data; 679 struct snd_kcontrol *kctl; 680 unsigned int nvoice; 681 682 ypcm->period_size = runtime->period_size; 683 ypcm->buffer_size = runtime->buffer_size; 684 ypcm->period_pos = 0; 685 ypcm->last_pos = 0; 686 for (nvoice = 0; nvoice < runtime->channels; nvoice++) 687 snd_ymfpci_pcm_init_voice(ypcm, nvoice, runtime, 688 substream->pcm == chip->pcm); 689 690 if (substream->pcm == chip->pcm && !ypcm->use_441_slot) { 691 kctl = chip->pcm_mixer[substream->number].ctl; 692 kctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE; 693 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_INFO, &kctl->id); 694 } 695 return 0; 696} 697 698static int snd_ymfpci_capture_hw_params(struct snd_pcm_substream *substream, 699 struct snd_pcm_hw_params *hw_params) 700{ 701 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params)); 702} 703 704static int snd_ymfpci_capture_hw_free(struct snd_pcm_substream *substream) 705{ 706 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); 707 708 /* wait, until the PCI operations are not finished */ 709 snd_ymfpci_irq_wait(chip); 710 return snd_pcm_lib_free_pages(substream); 711} 712 713static int snd_ymfpci_capture_prepare(struct snd_pcm_substream *substream) 714{ 715 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); 716 struct snd_pcm_runtime *runtime = substream->runtime; 717 struct snd_ymfpci_pcm *ypcm = runtime->private_data; 718 struct snd_ymfpci_capture_bank * bank; 719 int nbank; 720 u32 rate, format; 721 722 ypcm->period_size = runtime->period_size; 723 ypcm->buffer_size = runtime->buffer_size; 724 ypcm->period_pos = 0; 725 ypcm->last_pos = 0; 726 ypcm->shift = 0; 727 rate = ((48000 * 4096) / runtime->rate) - 1; 728 format = 0; 729 if (runtime->channels == 2) { 730 format |= 2; 731 ypcm->shift++; 732 } 733 if (snd_pcm_format_width(runtime->format) == 8) 734 format |= 1; 735 else 736 ypcm->shift++; 737 switch (ypcm->capture_bank_number) { 738 case 0: 739 snd_ymfpci_writel(chip, YDSXGR_RECFORMAT, format); 740 snd_ymfpci_writel(chip, YDSXGR_RECSLOTSR, rate); 741 break; 742 case 1: 743 snd_ymfpci_writel(chip, YDSXGR_ADCFORMAT, format); 744 snd_ymfpci_writel(chip, YDSXGR_ADCSLOTSR, rate); 745 break; 746 } 747 for (nbank = 0; nbank < 2; nbank++) { 748 bank = chip->bank_capture[ypcm->capture_bank_number][nbank]; 749 bank->base = cpu_to_le32(runtime->dma_addr); 750 bank->loop_end = cpu_to_le32(ypcm->buffer_size << ypcm->shift); 751 bank->start = 0; 752 bank->num_of_loops = 0; 753 } 754 return 0; 755} 756 757static snd_pcm_uframes_t snd_ymfpci_playback_pointer(struct snd_pcm_substream *substream) 758{ 759 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); 760 struct snd_pcm_runtime *runtime = substream->runtime; 761 struct snd_ymfpci_pcm *ypcm = runtime->private_data; 762 struct snd_ymfpci_voice *voice = ypcm->voices[0]; 763 764 if (!(ypcm->running && voice)) 765 return 0; 766 return le32_to_cpu(voice->bank[chip->active_bank].start); 767} 768 769static snd_pcm_uframes_t snd_ymfpci_capture_pointer(struct snd_pcm_substream *substream) 770{ 771 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); 772 struct snd_pcm_runtime *runtime = substream->runtime; 773 struct snd_ymfpci_pcm *ypcm = runtime->private_data; 774 775 if (!ypcm->running) 776 return 0; 777 return le32_to_cpu(chip->bank_capture[ypcm->capture_bank_number][chip->active_bank]->start) >> ypcm->shift; 778} 779 780static void snd_ymfpci_irq_wait(struct snd_ymfpci *chip) 781{ 782 wait_queue_t wait; 783 int loops = 4; 784 785 while (loops-- > 0) { 786 if ((snd_ymfpci_readl(chip, YDSXGR_MODE) & 3) == 0) 787 continue; 788 init_waitqueue_entry(&wait, current); 789 add_wait_queue(&chip->interrupt_sleep, &wait); 790 atomic_inc(&chip->interrupt_sleep_count); 791 schedule_timeout_uninterruptible(msecs_to_jiffies(50)); 792 remove_wait_queue(&chip->interrupt_sleep, &wait); 793 } 794} 795 796static irqreturn_t snd_ymfpci_interrupt(int irq, void *dev_id) 797{ 798 struct snd_ymfpci *chip = dev_id; 799 u32 status, nvoice, mode; 800 struct snd_ymfpci_voice *voice; 801 802 status = snd_ymfpci_readl(chip, YDSXGR_STATUS); 803 if (status & 0x80000000) { 804 chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT) & 1; 805 spin_lock(&chip->voice_lock); 806 for (nvoice = 0; nvoice < YDSXG_PLAYBACK_VOICES; nvoice++) { 807 voice = &chip->voices[nvoice]; 808 if (voice->interrupt) 809 voice->interrupt(chip, voice); 810 } 811 for (nvoice = 0; nvoice < YDSXG_CAPTURE_VOICES; nvoice++) { 812 if (chip->capture_substream[nvoice]) 813 snd_ymfpci_pcm_capture_interrupt(chip->capture_substream[nvoice]); 814 } 815 spin_unlock(&chip->voice_lock); 816 spin_lock(&chip->reg_lock); 817 snd_ymfpci_writel(chip, YDSXGR_STATUS, 0x80000000); 818 mode = snd_ymfpci_readl(chip, YDSXGR_MODE) | 2; 819 snd_ymfpci_writel(chip, YDSXGR_MODE, mode); 820 spin_unlock(&chip->reg_lock); 821 822 if (atomic_read(&chip->interrupt_sleep_count)) { 823 atomic_set(&chip->interrupt_sleep_count, 0); 824 wake_up(&chip->interrupt_sleep); 825 } 826 } 827 828 status = snd_ymfpci_readw(chip, YDSXGR_INTFLAG); 829 if (status & 1) { 830 if (chip->timer) 831 snd_timer_interrupt(chip->timer, chip->timer_ticks); 832 } 833 snd_ymfpci_writew(chip, YDSXGR_INTFLAG, status); 834 835 if (chip->rawmidi) 836 snd_mpu401_uart_interrupt(irq, chip->rawmidi->private_data); 837 return IRQ_HANDLED; 838} 839 840static struct snd_pcm_hardware snd_ymfpci_playback = 841{ 842 .info = (SNDRV_PCM_INFO_MMAP | 843 SNDRV_PCM_INFO_MMAP_VALID | 844 SNDRV_PCM_INFO_INTERLEAVED | 845 SNDRV_PCM_INFO_BLOCK_TRANSFER | 846 SNDRV_PCM_INFO_PAUSE | 847 SNDRV_PCM_INFO_RESUME), 848 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE, 849 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000, 850 .rate_min = 8000, 851 .rate_max = 48000, 852 .channels_min = 1, 853 .channels_max = 2, 854 .buffer_bytes_max = 256 * 1024, 855 .period_bytes_min = 64, 856 .period_bytes_max = 256 * 1024, 857 .periods_min = 3, 858 .periods_max = 1024, 859 .fifo_size = 0, 860}; 861 862static struct snd_pcm_hardware snd_ymfpci_capture = 863{ 864 .info = (SNDRV_PCM_INFO_MMAP | 865 SNDRV_PCM_INFO_MMAP_VALID | 866 SNDRV_PCM_INFO_INTERLEAVED | 867 SNDRV_PCM_INFO_BLOCK_TRANSFER | 868 SNDRV_PCM_INFO_PAUSE | 869 SNDRV_PCM_INFO_RESUME), 870 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE, 871 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000, 872 .rate_min = 8000, 873 .rate_max = 48000, 874 .channels_min = 1, 875 .channels_max = 2, 876 .buffer_bytes_max = 256 * 1024, 877 .period_bytes_min = 64, 878 .period_bytes_max = 256 * 1024, 879 .periods_min = 3, 880 .periods_max = 1024, 881 .fifo_size = 0, 882}; 883 884static void snd_ymfpci_pcm_free_substream(struct snd_pcm_runtime *runtime) 885{ 886 kfree(runtime->private_data); 887} 888 889static int snd_ymfpci_playback_open_1(struct snd_pcm_substream *substream) 890{ 891 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); 892 struct snd_pcm_runtime *runtime = substream->runtime; 893 struct snd_ymfpci_pcm *ypcm; 894 895 ypcm = kzalloc(sizeof(*ypcm), GFP_KERNEL); 896 if (ypcm == NULL) 897 return -ENOMEM; 898 ypcm->chip = chip; 899 ypcm->type = PLAYBACK_VOICE; 900 ypcm->substream = substream; 901 runtime->hw = snd_ymfpci_playback; 902 runtime->private_data = ypcm; 903 runtime->private_free = snd_ymfpci_pcm_free_substream; 904 snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_PERIOD_TIME, 5333, UINT_MAX); 905 return 0; 906} 907 908/* call with spinlock held */ 909static void ymfpci_open_extension(struct snd_ymfpci *chip) 910{ 911 if (! chip->rear_opened) { 912 if (! chip->spdif_opened) /* set AC3 */ 913 snd_ymfpci_writel(chip, YDSXGR_MODE, 914 snd_ymfpci_readl(chip, YDSXGR_MODE) | (1 << 30)); 915 /* enable second codec (4CHEN) */ 916 snd_ymfpci_writew(chip, YDSXGR_SECCONFIG, 917 (snd_ymfpci_readw(chip, YDSXGR_SECCONFIG) & ~0x0330) | 0x0010); 918 } 919} 920 921/* call with spinlock held */ 922static void ymfpci_close_extension(struct snd_ymfpci *chip) 923{ 924 if (! chip->rear_opened) { 925 if (! chip->spdif_opened) 926 snd_ymfpci_writel(chip, YDSXGR_MODE, 927 snd_ymfpci_readl(chip, YDSXGR_MODE) & ~(1 << 30)); 928 snd_ymfpci_writew(chip, YDSXGR_SECCONFIG, 929 (snd_ymfpci_readw(chip, YDSXGR_SECCONFIG) & ~0x0330) & ~0x0010); 930 } 931} 932 933static int snd_ymfpci_playback_open(struct snd_pcm_substream *substream) 934{ 935 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); 936 struct snd_pcm_runtime *runtime = substream->runtime; 937 struct snd_ymfpci_pcm *ypcm; 938 int err; 939 940 if ((err = snd_ymfpci_playback_open_1(substream)) < 0) 941 return err; 942 ypcm = runtime->private_data; 943 ypcm->output_front = 1; 944 ypcm->output_rear = chip->mode_dup4ch ? 1 : 0; 945 ypcm->swap_rear = 0; 946 spin_lock_irq(&chip->reg_lock); 947 if (ypcm->output_rear) { 948 ymfpci_open_extension(chip); 949 chip->rear_opened++; 950 } 951 spin_unlock_irq(&chip->reg_lock); 952 return 0; 953} 954 955static int snd_ymfpci_playback_spdif_open(struct snd_pcm_substream *substream) 956{ 957 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); 958 struct snd_pcm_runtime *runtime = substream->runtime; 959 struct snd_ymfpci_pcm *ypcm; 960 int err; 961 962 if ((err = snd_ymfpci_playback_open_1(substream)) < 0) 963 return err; 964 ypcm = runtime->private_data; 965 ypcm->output_front = 0; 966 ypcm->output_rear = 1; 967 ypcm->swap_rear = 1; 968 spin_lock_irq(&chip->reg_lock); 969 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL, 970 snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) | 2); 971 ymfpci_open_extension(chip); 972 chip->spdif_pcm_bits = chip->spdif_bits; 973 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_pcm_bits); 974 chip->spdif_opened++; 975 spin_unlock_irq(&chip->reg_lock); 976 977 chip->spdif_pcm_ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE; 978 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE | 979 SNDRV_CTL_EVENT_MASK_INFO, &chip->spdif_pcm_ctl->id); 980 return 0; 981} 982 983static int snd_ymfpci_playback_4ch_open(struct snd_pcm_substream *substream) 984{ 985 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); 986 struct snd_pcm_runtime *runtime = substream->runtime; 987 struct snd_ymfpci_pcm *ypcm; 988 int err; 989 990 if ((err = snd_ymfpci_playback_open_1(substream)) < 0) 991 return err; 992 ypcm = runtime->private_data; 993 ypcm->output_front = 0; 994 ypcm->output_rear = 1; 995 ypcm->swap_rear = 0; 996 spin_lock_irq(&chip->reg_lock); 997 ymfpci_open_extension(chip); 998 chip->rear_opened++; 999 spin_unlock_irq(&chip->reg_lock); 1000 return 0; 1001} 1002 1003static int snd_ymfpci_capture_open(struct snd_pcm_substream *substream, 1004 u32 capture_bank_number) 1005{ 1006 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); 1007 struct snd_pcm_runtime *runtime = substream->runtime; 1008 struct snd_ymfpci_pcm *ypcm; 1009 1010 ypcm = kzalloc(sizeof(*ypcm), GFP_KERNEL); 1011 if (ypcm == NULL) 1012 return -ENOMEM; 1013 ypcm->chip = chip; 1014 ypcm->type = capture_bank_number + CAPTURE_REC; 1015 ypcm->substream = substream; 1016 ypcm->capture_bank_number = capture_bank_number; 1017 chip->capture_substream[capture_bank_number] = substream; 1018 runtime->hw = snd_ymfpci_capture; 1019 snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_PERIOD_TIME, 5333, UINT_MAX); 1020 runtime->private_data = ypcm; 1021 runtime->private_free = snd_ymfpci_pcm_free_substream; 1022 snd_ymfpci_hw_start(chip); 1023 return 0; 1024} 1025 1026static int snd_ymfpci_capture_rec_open(struct snd_pcm_substream *substream) 1027{ 1028 return snd_ymfpci_capture_open(substream, 0); 1029} 1030 1031static int snd_ymfpci_capture_ac97_open(struct snd_pcm_substream *substream) 1032{ 1033 return snd_ymfpci_capture_open(substream, 1); 1034} 1035 1036static int snd_ymfpci_playback_close_1(struct snd_pcm_substream *substream) 1037{ 1038 return 0; 1039} 1040 1041static int snd_ymfpci_playback_close(struct snd_pcm_substream *substream) 1042{ 1043 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); 1044 struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data; 1045 1046 spin_lock_irq(&chip->reg_lock); 1047 if (ypcm->output_rear && chip->rear_opened > 0) { 1048 chip->rear_opened--; 1049 ymfpci_close_extension(chip); 1050 } 1051 spin_unlock_irq(&chip->reg_lock); 1052 return snd_ymfpci_playback_close_1(substream); 1053} 1054 1055static int snd_ymfpci_playback_spdif_close(struct snd_pcm_substream *substream) 1056{ 1057 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); 1058 1059 spin_lock_irq(&chip->reg_lock); 1060 chip->spdif_opened = 0; 1061 ymfpci_close_extension(chip); 1062 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL, 1063 snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & ~2); 1064 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits); 1065 spin_unlock_irq(&chip->reg_lock); 1066 chip->spdif_pcm_ctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE; 1067 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE | 1068 SNDRV_CTL_EVENT_MASK_INFO, &chip->spdif_pcm_ctl->id); 1069 return snd_ymfpci_playback_close_1(substream); 1070} 1071 1072static int snd_ymfpci_playback_4ch_close(struct snd_pcm_substream *substream) 1073{ 1074 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); 1075 1076 spin_lock_irq(&chip->reg_lock); 1077 if (chip->rear_opened > 0) { 1078 chip->rear_opened--; 1079 ymfpci_close_extension(chip); 1080 } 1081 spin_unlock_irq(&chip->reg_lock); 1082 return snd_ymfpci_playback_close_1(substream); 1083} 1084 1085static int snd_ymfpci_capture_close(struct snd_pcm_substream *substream) 1086{ 1087 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); 1088 struct snd_pcm_runtime *runtime = substream->runtime; 1089 struct snd_ymfpci_pcm *ypcm = runtime->private_data; 1090 1091 if (ypcm != NULL) { 1092 chip->capture_substream[ypcm->capture_bank_number] = NULL; 1093 snd_ymfpci_hw_stop(chip); 1094 } 1095 return 0; 1096} 1097 1098static struct snd_pcm_ops snd_ymfpci_playback_ops = { 1099 .open = snd_ymfpci_playback_open, 1100 .close = snd_ymfpci_playback_close, 1101 .ioctl = snd_pcm_lib_ioctl, 1102 .hw_params = snd_ymfpci_playback_hw_params, 1103 .hw_free = snd_ymfpci_playback_hw_free, 1104 .prepare = snd_ymfpci_playback_prepare, 1105 .trigger = snd_ymfpci_playback_trigger, 1106 .pointer = snd_ymfpci_playback_pointer, 1107}; 1108 1109static struct snd_pcm_ops snd_ymfpci_capture_rec_ops = { 1110 .open = snd_ymfpci_capture_rec_open, 1111 .close = snd_ymfpci_capture_close, 1112 .ioctl = snd_pcm_lib_ioctl, 1113 .hw_params = snd_ymfpci_capture_hw_params, 1114 .hw_free = snd_ymfpci_capture_hw_free, 1115 .prepare = snd_ymfpci_capture_prepare, 1116 .trigger = snd_ymfpci_capture_trigger, 1117 .pointer = snd_ymfpci_capture_pointer, 1118}; 1119 1120int __devinit snd_ymfpci_pcm(struct snd_ymfpci *chip, int device, struct snd_pcm ** rpcm) 1121{ 1122 struct snd_pcm *pcm; 1123 int err; 1124 1125 if (rpcm) 1126 *rpcm = NULL; 1127 if ((err = snd_pcm_new(chip->card, "YMFPCI", device, 32, 1, &pcm)) < 0) 1128 return err; 1129 pcm->private_data = chip; 1130 1131 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ymfpci_playback_ops); 1132 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ymfpci_capture_rec_ops); 1133 1134 /* global setup */ 1135 pcm->info_flags = 0; 1136 strcpy(pcm->name, "YMFPCI"); 1137 chip->pcm = pcm; 1138 1139 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, 1140 snd_dma_pci_data(chip->pci), 64*1024, 256*1024); 1141 1142 if (rpcm) 1143 *rpcm = pcm; 1144 return 0; 1145} 1146 1147static struct snd_pcm_ops snd_ymfpci_capture_ac97_ops = { 1148 .open = snd_ymfpci_capture_ac97_open, 1149 .close = snd_ymfpci_capture_close, 1150 .ioctl = snd_pcm_lib_ioctl, 1151 .hw_params = snd_ymfpci_capture_hw_params, 1152 .hw_free = snd_ymfpci_capture_hw_free, 1153 .prepare = snd_ymfpci_capture_prepare, 1154 .trigger = snd_ymfpci_capture_trigger, 1155 .pointer = snd_ymfpci_capture_pointer, 1156}; 1157 1158int __devinit snd_ymfpci_pcm2(struct snd_ymfpci *chip, int device, struct snd_pcm ** rpcm) 1159{ 1160 struct snd_pcm *pcm; 1161 int err; 1162 1163 if (rpcm) 1164 *rpcm = NULL; 1165 if ((err = snd_pcm_new(chip->card, "YMFPCI - PCM2", device, 0, 1, &pcm)) < 0) 1166 return err; 1167 pcm->private_data = chip; 1168 1169 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ymfpci_capture_ac97_ops); 1170 1171 /* global setup */ 1172 pcm->info_flags = 0; 1173 sprintf(pcm->name, "YMFPCI - %s", 1174 chip->device_id == PCI_DEVICE_ID_YAMAHA_754 ? "Direct Recording" : "AC'97"); 1175 chip->pcm2 = pcm; 1176 1177 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, 1178 snd_dma_pci_data(chip->pci), 64*1024, 256*1024); 1179 1180 if (rpcm) 1181 *rpcm = pcm; 1182 return 0; 1183} 1184 1185static struct snd_pcm_ops snd_ymfpci_playback_spdif_ops = { 1186 .open = snd_ymfpci_playback_spdif_open, 1187 .close = snd_ymfpci_playback_spdif_close, 1188 .ioctl = snd_pcm_lib_ioctl, 1189 .hw_params = snd_ymfpci_playback_hw_params, 1190 .hw_free = snd_ymfpci_playback_hw_free, 1191 .prepare = snd_ymfpci_playback_prepare, 1192 .trigger = snd_ymfpci_playback_trigger, 1193 .pointer = snd_ymfpci_playback_pointer, 1194}; 1195 1196int __devinit snd_ymfpci_pcm_spdif(struct snd_ymfpci *chip, int device, struct snd_pcm ** rpcm) 1197{ 1198 struct snd_pcm *pcm; 1199 int err; 1200 1201 if (rpcm) 1202 *rpcm = NULL; 1203 if ((err = snd_pcm_new(chip->card, "YMFPCI - IEC958", device, 1, 0, &pcm)) < 0) 1204 return err; 1205 pcm->private_data = chip; 1206 1207 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ymfpci_playback_spdif_ops); 1208 1209 /* global setup */ 1210 pcm->info_flags = 0; 1211 strcpy(pcm->name, "YMFPCI - IEC958"); 1212 chip->pcm_spdif = pcm; 1213 1214 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, 1215 snd_dma_pci_data(chip->pci), 64*1024, 256*1024); 1216 1217 if (rpcm) 1218 *rpcm = pcm; 1219 return 0; 1220} 1221 1222static struct snd_pcm_ops snd_ymfpci_playback_4ch_ops = { 1223 .open = snd_ymfpci_playback_4ch_open, 1224 .close = snd_ymfpci_playback_4ch_close, 1225 .ioctl = snd_pcm_lib_ioctl, 1226 .hw_params = snd_ymfpci_playback_hw_params, 1227 .hw_free = snd_ymfpci_playback_hw_free, 1228 .prepare = snd_ymfpci_playback_prepare, 1229 .trigger = snd_ymfpci_playback_trigger, 1230 .pointer = snd_ymfpci_playback_pointer, 1231}; 1232 1233int __devinit snd_ymfpci_pcm_4ch(struct snd_ymfpci *chip, int device, struct snd_pcm ** rpcm) 1234{ 1235 struct snd_pcm *pcm; 1236 int err; 1237 1238 if (rpcm) 1239 *rpcm = NULL; 1240 if ((err = snd_pcm_new(chip->card, "YMFPCI - Rear", device, 1, 0, &pcm)) < 0) 1241 return err; 1242 pcm->private_data = chip; 1243 1244 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ymfpci_playback_4ch_ops); 1245 1246 /* global setup */ 1247 pcm->info_flags = 0; 1248 strcpy(pcm->name, "YMFPCI - Rear PCM"); 1249 chip->pcm_4ch = pcm; 1250 1251 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, 1252 snd_dma_pci_data(chip->pci), 64*1024, 256*1024); 1253 1254 if (rpcm) 1255 *rpcm = pcm; 1256 return 0; 1257} 1258 1259static int snd_ymfpci_spdif_default_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 1260{ 1261 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; 1262 uinfo->count = 1; 1263 return 0; 1264} 1265 1266static int snd_ymfpci_spdif_default_get(struct snd_kcontrol *kcontrol, 1267 struct snd_ctl_elem_value *ucontrol) 1268{ 1269 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); 1270 1271 spin_lock_irq(&chip->reg_lock); 1272 ucontrol->value.iec958.status[0] = (chip->spdif_bits >> 0) & 0xff; 1273 ucontrol->value.iec958.status[1] = (chip->spdif_bits >> 8) & 0xff; 1274 ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS_48000; 1275 spin_unlock_irq(&chip->reg_lock); 1276 return 0; 1277} 1278 1279static int snd_ymfpci_spdif_default_put(struct snd_kcontrol *kcontrol, 1280 struct snd_ctl_elem_value *ucontrol) 1281{ 1282 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); 1283 unsigned int val; 1284 int change; 1285 1286 val = ((ucontrol->value.iec958.status[0] & 0x3e) << 0) | 1287 (ucontrol->value.iec958.status[1] << 8); 1288 spin_lock_irq(&chip->reg_lock); 1289 change = chip->spdif_bits != val; 1290 chip->spdif_bits = val; 1291 if ((snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & 1) && chip->pcm_spdif == NULL) 1292 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits); 1293 spin_unlock_irq(&chip->reg_lock); 1294 return change; 1295} 1296 1297static struct snd_kcontrol_new snd_ymfpci_spdif_default __devinitdata = 1298{ 1299 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 1300 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT), 1301 .info = snd_ymfpci_spdif_default_info, 1302 .get = snd_ymfpci_spdif_default_get, 1303 .put = snd_ymfpci_spdif_default_put 1304}; 1305 1306static int snd_ymfpci_spdif_mask_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 1307{ 1308 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; 1309 uinfo->count = 1; 1310 return 0; 1311} 1312 1313static int snd_ymfpci_spdif_mask_get(struct snd_kcontrol *kcontrol, 1314 struct snd_ctl_elem_value *ucontrol) 1315{ 1316 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); 1317 1318 spin_lock_irq(&chip->reg_lock); 1319 ucontrol->value.iec958.status[0] = 0x3e; 1320 ucontrol->value.iec958.status[1] = 0xff; 1321 spin_unlock_irq(&chip->reg_lock); 1322 return 0; 1323} 1324 1325static struct snd_kcontrol_new snd_ymfpci_spdif_mask __devinitdata = 1326{ 1327 .access = SNDRV_CTL_ELEM_ACCESS_READ, 1328 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 1329 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK), 1330 .info = snd_ymfpci_spdif_mask_info, 1331 .get = snd_ymfpci_spdif_mask_get, 1332}; 1333 1334static int snd_ymfpci_spdif_stream_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 1335{ 1336 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; 1337 uinfo->count = 1; 1338 return 0; 1339} 1340 1341static int snd_ymfpci_spdif_stream_get(struct snd_kcontrol *kcontrol, 1342 struct snd_ctl_elem_value *ucontrol) 1343{ 1344 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); 1345 1346 spin_lock_irq(&chip->reg_lock); 1347 ucontrol->value.iec958.status[0] = (chip->spdif_pcm_bits >> 0) & 0xff; 1348 ucontrol->value.iec958.status[1] = (chip->spdif_pcm_bits >> 8) & 0xff; 1349 ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS_48000; 1350 spin_unlock_irq(&chip->reg_lock); 1351 return 0; 1352} 1353 1354static int snd_ymfpci_spdif_stream_put(struct snd_kcontrol *kcontrol, 1355 struct snd_ctl_elem_value *ucontrol) 1356{ 1357 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); 1358 unsigned int val; 1359 int change; 1360 1361 val = ((ucontrol->value.iec958.status[0] & 0x3e) << 0) | 1362 (ucontrol->value.iec958.status[1] << 8); 1363 spin_lock_irq(&chip->reg_lock); 1364 change = chip->spdif_pcm_bits != val; 1365 chip->spdif_pcm_bits = val; 1366 if ((snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & 2)) 1367 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_pcm_bits); 1368 spin_unlock_irq(&chip->reg_lock); 1369 return change; 1370} 1371 1372static struct snd_kcontrol_new snd_ymfpci_spdif_stream __devinitdata = 1373{ 1374 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_INACTIVE, 1375 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 1376 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM), 1377 .info = snd_ymfpci_spdif_stream_info, 1378 .get = snd_ymfpci_spdif_stream_get, 1379 .put = snd_ymfpci_spdif_stream_put 1380}; 1381 1382static int snd_ymfpci_drec_source_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *info) 1383{ 1384 static char *texts[3] = {"AC'97", "IEC958", "ZV Port"}; 1385 1386 info->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; 1387 info->count = 1; 1388 info->value.enumerated.items = 3; 1389 if (info->value.enumerated.item > 2) 1390 info->value.enumerated.item = 2; 1391 strcpy(info->value.enumerated.name, texts[info->value.enumerated.item]); 1392 return 0; 1393} 1394 1395static int snd_ymfpci_drec_source_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *value) 1396{ 1397 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); 1398 u16 reg; 1399 1400 spin_lock_irq(&chip->reg_lock); 1401 reg = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL); 1402 spin_unlock_irq(&chip->reg_lock); 1403 if (!(reg & 0x100)) 1404 value->value.enumerated.item[0] = 0; 1405 else 1406 value->value.enumerated.item[0] = 1 + ((reg & 0x200) != 0); 1407 return 0; 1408} 1409 1410static int snd_ymfpci_drec_source_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *value) 1411{ 1412 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); 1413 u16 reg, old_reg; 1414 1415 spin_lock_irq(&chip->reg_lock); 1416 old_reg = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL); 1417 if (value->value.enumerated.item[0] == 0) 1418 reg = old_reg & ~0x100; 1419 else 1420 reg = (old_reg & ~0x300) | 0x100 | ((value->value.enumerated.item[0] == 2) << 9); 1421 snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, reg); 1422 spin_unlock_irq(&chip->reg_lock); 1423 return reg != old_reg; 1424} 1425 1426static struct snd_kcontrol_new snd_ymfpci_drec_source __devinitdata = { 1427 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, 1428 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1429 .name = "Direct Recording Source", 1430 .info = snd_ymfpci_drec_source_info, 1431 .get = snd_ymfpci_drec_source_get, 1432 .put = snd_ymfpci_drec_source_put 1433}; 1434 1435/* 1436 * Mixer controls 1437 */ 1438 1439#define YMFPCI_SINGLE(xname, xindex, reg, shift) \ 1440{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \ 1441 .info = snd_ymfpci_info_single, \ 1442 .get = snd_ymfpci_get_single, .put = snd_ymfpci_put_single, \ 1443 .private_value = ((reg) | ((shift) << 16)) } 1444 1445#define snd_ymfpci_info_single snd_ctl_boolean_mono_info 1446 1447static int snd_ymfpci_get_single(struct snd_kcontrol *kcontrol, 1448 struct snd_ctl_elem_value *ucontrol) 1449{ 1450 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); 1451 int reg = kcontrol->private_value & 0xffff; 1452 unsigned int shift = (kcontrol->private_value >> 16) & 0xff; 1453 unsigned int mask = 1; 1454 1455 switch (reg) { 1456 case YDSXGR_SPDIFOUTCTRL: break; 1457 case YDSXGR_SPDIFINCTRL: break; 1458 default: return -EINVAL; 1459 } 1460 ucontrol->value.integer.value[0] = 1461 (snd_ymfpci_readl(chip, reg) >> shift) & mask; 1462 return 0; 1463} 1464 1465static int snd_ymfpci_put_single(struct snd_kcontrol *kcontrol, 1466 struct snd_ctl_elem_value *ucontrol) 1467{ 1468 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); 1469 int reg = kcontrol->private_value & 0xffff; 1470 unsigned int shift = (kcontrol->private_value >> 16) & 0xff; 1471 unsigned int mask = 1; 1472 int change; 1473 unsigned int val, oval; 1474 1475 switch (reg) { 1476 case YDSXGR_SPDIFOUTCTRL: break; 1477 case YDSXGR_SPDIFINCTRL: break; 1478 default: return -EINVAL; 1479 } 1480 val = (ucontrol->value.integer.value[0] & mask); 1481 val <<= shift; 1482 spin_lock_irq(&chip->reg_lock); 1483 oval = snd_ymfpci_readl(chip, reg); 1484 val = (oval & ~(mask << shift)) | val; 1485 change = val != oval; 1486 snd_ymfpci_writel(chip, reg, val); 1487 spin_unlock_irq(&chip->reg_lock); 1488 return change; 1489} 1490 1491static const DECLARE_TLV_DB_LINEAR(db_scale_native, TLV_DB_GAIN_MUTE, 0); 1492 1493#define YMFPCI_DOUBLE(xname, xindex, reg) \ 1494{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \ 1495 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ, \ 1496 .info = snd_ymfpci_info_double, \ 1497 .get = snd_ymfpci_get_double, .put = snd_ymfpci_put_double, \ 1498 .private_value = reg, \ 1499 .tlv = { .p = db_scale_native } } 1500 1501static int snd_ymfpci_info_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 1502{ 1503 unsigned int reg = kcontrol->private_value; 1504 1505 if (reg < 0x80 || reg >= 0xc0) 1506 return -EINVAL; 1507 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; 1508 uinfo->count = 2; 1509 uinfo->value.integer.min = 0; 1510 uinfo->value.integer.max = 16383; 1511 return 0; 1512} 1513 1514static int snd_ymfpci_get_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1515{ 1516 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); 1517 unsigned int reg = kcontrol->private_value; 1518 unsigned int shift_left = 0, shift_right = 16, mask = 16383; 1519 unsigned int val; 1520 1521 if (reg < 0x80 || reg >= 0xc0) 1522 return -EINVAL; 1523 spin_lock_irq(&chip->reg_lock); 1524 val = snd_ymfpci_readl(chip, reg); 1525 spin_unlock_irq(&chip->reg_lock); 1526 ucontrol->value.integer.value[0] = (val >> shift_left) & mask; 1527 ucontrol->value.integer.value[1] = (val >> shift_right) & mask; 1528 return 0; 1529} 1530 1531static int snd_ymfpci_put_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1532{ 1533 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); 1534 unsigned int reg = kcontrol->private_value; 1535 unsigned int shift_left = 0, shift_right = 16, mask = 16383; 1536 int change; 1537 unsigned int val1, val2, oval; 1538 1539 if (reg < 0x80 || reg >= 0xc0) 1540 return -EINVAL; 1541 val1 = ucontrol->value.integer.value[0] & mask; 1542 val2 = ucontrol->value.integer.value[1] & mask; 1543 val1 <<= shift_left; 1544 val2 <<= shift_right; 1545 spin_lock_irq(&chip->reg_lock); 1546 oval = snd_ymfpci_readl(chip, reg); 1547 val1 = (oval & ~((mask << shift_left) | (mask << shift_right))) | val1 | val2; 1548 change = val1 != oval; 1549 snd_ymfpci_writel(chip, reg, val1); 1550 spin_unlock_irq(&chip->reg_lock); 1551 return change; 1552} 1553 1554static int snd_ymfpci_put_nativedacvol(struct snd_kcontrol *kcontrol, 1555 struct snd_ctl_elem_value *ucontrol) 1556{ 1557 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); 1558 unsigned int reg = YDSXGR_NATIVEDACOUTVOL; 1559 unsigned int reg2 = YDSXGR_BUF441OUTVOL; 1560 int change; 1561 unsigned int value, oval; 1562 1563 value = ucontrol->value.integer.value[0] & 0x3fff; 1564 value |= (ucontrol->value.integer.value[1] & 0x3fff) << 16; 1565 spin_lock_irq(&chip->reg_lock); 1566 oval = snd_ymfpci_readl(chip, reg); 1567 change = value != oval; 1568 snd_ymfpci_writel(chip, reg, value); 1569 snd_ymfpci_writel(chip, reg2, value); 1570 spin_unlock_irq(&chip->reg_lock); 1571 return change; 1572} 1573 1574/* 1575 * 4ch duplication 1576 */ 1577#define snd_ymfpci_info_dup4ch snd_ctl_boolean_mono_info 1578 1579static int snd_ymfpci_get_dup4ch(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1580{ 1581 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); 1582 ucontrol->value.integer.value[0] = chip->mode_dup4ch; 1583 return 0; 1584} 1585 1586static int snd_ymfpci_put_dup4ch(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1587{ 1588 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); 1589 int change; 1590 change = (ucontrol->value.integer.value[0] != chip->mode_dup4ch); 1591 if (change) 1592 chip->mode_dup4ch = !!ucontrol->value.integer.value[0]; 1593 return change; 1594} 1595 1596 1597static struct snd_kcontrol_new snd_ymfpci_controls[] __devinitdata = { 1598{ 1599 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1600 .name = "Wave Playback Volume", 1601 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | 1602 SNDRV_CTL_ELEM_ACCESS_TLV_READ, 1603 .info = snd_ymfpci_info_double, 1604 .get = snd_ymfpci_get_double, 1605 .put = snd_ymfpci_put_nativedacvol, 1606 .private_value = YDSXGR_NATIVEDACOUTVOL, 1607 .tlv = { .p = db_scale_native }, 1608}, 1609YMFPCI_DOUBLE("Wave Capture Volume", 0, YDSXGR_NATIVEDACLOOPVOL), 1610YMFPCI_DOUBLE("Digital Capture Volume", 0, YDSXGR_NATIVEDACINVOL), 1611YMFPCI_DOUBLE("Digital Capture Volume", 1, YDSXGR_NATIVEADCINVOL), 1612YMFPCI_DOUBLE("ADC Playback Volume", 0, YDSXGR_PRIADCOUTVOL), 1613YMFPCI_DOUBLE("ADC Capture Volume", 0, YDSXGR_PRIADCLOOPVOL), 1614YMFPCI_DOUBLE("ADC Playback Volume", 1, YDSXGR_SECADCOUTVOL), 1615YMFPCI_DOUBLE("ADC Capture Volume", 1, YDSXGR_SECADCLOOPVOL), 1616YMFPCI_DOUBLE("FM Legacy Volume", 0, YDSXGR_LEGACYOUTVOL), 1617YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("AC97 ", PLAYBACK,VOLUME), 0, YDSXGR_ZVOUTVOL), 1618YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("", CAPTURE,VOLUME), 0, YDSXGR_ZVLOOPVOL), 1619YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("AC97 ",PLAYBACK,VOLUME), 1, YDSXGR_SPDIFOUTVOL), 1620YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,VOLUME), 1, YDSXGR_SPDIFLOOPVOL), 1621YMFPCI_SINGLE(SNDRV_CTL_NAME_IEC958("",PLAYBACK,SWITCH), 0, YDSXGR_SPDIFOUTCTRL, 0), 1622YMFPCI_SINGLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,SWITCH), 0, YDSXGR_SPDIFINCTRL, 0), 1623YMFPCI_SINGLE(SNDRV_CTL_NAME_IEC958("Loop",NONE,NONE), 0, YDSXGR_SPDIFINCTRL, 4), 1624{ 1625 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1626 .name = "4ch Duplication", 1627 .info = snd_ymfpci_info_dup4ch, 1628 .get = snd_ymfpci_get_dup4ch, 1629 .put = snd_ymfpci_put_dup4ch, 1630}, 1631}; 1632 1633 1634/* 1635 * GPIO 1636 */ 1637 1638static int snd_ymfpci_get_gpio_out(struct snd_ymfpci *chip, int pin) 1639{ 1640 u16 reg, mode; 1641 unsigned long flags; 1642 1643 spin_lock_irqsave(&chip->reg_lock, flags); 1644 reg = snd_ymfpci_readw(chip, YDSXGR_GPIOFUNCENABLE); 1645 reg &= ~(1 << (pin + 8)); 1646 reg |= (1 << pin); 1647 snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg); 1648 /* set the level mode for input line */ 1649 mode = snd_ymfpci_readw(chip, YDSXGR_GPIOTYPECONFIG); 1650 mode &= ~(3 << (pin * 2)); 1651 snd_ymfpci_writew(chip, YDSXGR_GPIOTYPECONFIG, mode); 1652 snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg | (1 << (pin + 8))); 1653 mode = snd_ymfpci_readw(chip, YDSXGR_GPIOINSTATUS); 1654 spin_unlock_irqrestore(&chip->reg_lock, flags); 1655 return (mode >> pin) & 1; 1656} 1657 1658static int snd_ymfpci_set_gpio_out(struct snd_ymfpci *chip, int pin, int enable) 1659{ 1660 u16 reg; 1661 unsigned long flags; 1662 1663 spin_lock_irqsave(&chip->reg_lock, flags); 1664 reg = snd_ymfpci_readw(chip, YDSXGR_GPIOFUNCENABLE); 1665 reg &= ~(1 << pin); 1666 reg &= ~(1 << (pin + 8)); 1667 snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg); 1668 snd_ymfpci_writew(chip, YDSXGR_GPIOOUTCTRL, enable << pin); 1669 snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg | (1 << (pin + 8))); 1670 spin_unlock_irqrestore(&chip->reg_lock, flags); 1671 1672 return 0; 1673} 1674 1675#define snd_ymfpci_gpio_sw_info snd_ctl_boolean_mono_info 1676 1677static int snd_ymfpci_gpio_sw_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1678{ 1679 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); 1680 int pin = (int)kcontrol->private_value; 1681 ucontrol->value.integer.value[0] = snd_ymfpci_get_gpio_out(chip, pin); 1682 return 0; 1683} 1684 1685static int snd_ymfpci_gpio_sw_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1686{ 1687 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); 1688 int pin = (int)kcontrol->private_value; 1689 1690 if (snd_ymfpci_get_gpio_out(chip, pin) != ucontrol->value.integer.value[0]) { 1691 snd_ymfpci_set_gpio_out(chip, pin, !!ucontrol->value.integer.value[0]); 1692 ucontrol->value.integer.value[0] = snd_ymfpci_get_gpio_out(chip, pin); 1693 return 1; 1694 } 1695 return 0; 1696} 1697 1698static struct snd_kcontrol_new snd_ymfpci_rear_shared __devinitdata = { 1699 .name = "Shared Rear/Line-In Switch", 1700 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1701 .info = snd_ymfpci_gpio_sw_info, 1702 .get = snd_ymfpci_gpio_sw_get, 1703 .put = snd_ymfpci_gpio_sw_put, 1704 .private_value = 2, 1705}; 1706 1707/* 1708 * PCM voice volume 1709 */ 1710 1711static int snd_ymfpci_pcm_vol_info(struct snd_kcontrol *kcontrol, 1712 struct snd_ctl_elem_info *uinfo) 1713{ 1714 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; 1715 uinfo->count = 2; 1716 uinfo->value.integer.min = 0; 1717 uinfo->value.integer.max = 0x8000; 1718 return 0; 1719} 1720 1721static int snd_ymfpci_pcm_vol_get(struct snd_kcontrol *kcontrol, 1722 struct snd_ctl_elem_value *ucontrol) 1723{ 1724 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); 1725 unsigned int subs = kcontrol->id.subdevice; 1726 1727 ucontrol->value.integer.value[0] = chip->pcm_mixer[subs].left; 1728 ucontrol->value.integer.value[1] = chip->pcm_mixer[subs].right; 1729 return 0; 1730} 1731 1732static int snd_ymfpci_pcm_vol_put(struct snd_kcontrol *kcontrol, 1733 struct snd_ctl_elem_value *ucontrol) 1734{ 1735 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); 1736 unsigned int subs = kcontrol->id.subdevice; 1737 struct snd_pcm_substream *substream; 1738 unsigned long flags; 1739 1740 if (ucontrol->value.integer.value[0] != chip->pcm_mixer[subs].left || 1741 ucontrol->value.integer.value[1] != chip->pcm_mixer[subs].right) { 1742 chip->pcm_mixer[subs].left = ucontrol->value.integer.value[0]; 1743 chip->pcm_mixer[subs].right = ucontrol->value.integer.value[1]; 1744 if (chip->pcm_mixer[subs].left > 0x8000) 1745 chip->pcm_mixer[subs].left = 0x8000; 1746 if (chip->pcm_mixer[subs].right > 0x8000) 1747 chip->pcm_mixer[subs].right = 0x8000; 1748 1749 substream = (struct snd_pcm_substream *)kcontrol->private_value; 1750 spin_lock_irqsave(&chip->voice_lock, flags); 1751 if (substream->runtime && substream->runtime->private_data) { 1752 struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data; 1753 if (!ypcm->use_441_slot) 1754 ypcm->update_pcm_vol = 2; 1755 } 1756 spin_unlock_irqrestore(&chip->voice_lock, flags); 1757 return 1; 1758 } 1759 return 0; 1760} 1761 1762static struct snd_kcontrol_new snd_ymfpci_pcm_volume __devinitdata = { 1763 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 1764 .name = "PCM Playback Volume", 1765 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | 1766 SNDRV_CTL_ELEM_ACCESS_INACTIVE, 1767 .info = snd_ymfpci_pcm_vol_info, 1768 .get = snd_ymfpci_pcm_vol_get, 1769 .put = snd_ymfpci_pcm_vol_put, 1770}; 1771 1772 1773/* 1774 * Mixer routines 1775 */ 1776 1777static void snd_ymfpci_mixer_free_ac97_bus(struct snd_ac97_bus *bus) 1778{ 1779 struct snd_ymfpci *chip = bus->private_data; 1780 chip->ac97_bus = NULL; 1781} 1782 1783static void snd_ymfpci_mixer_free_ac97(struct snd_ac97 *ac97) 1784{ 1785 struct snd_ymfpci *chip = ac97->private_data; 1786 chip->ac97 = NULL; 1787} 1788 1789int __devinit snd_ymfpci_mixer(struct snd_ymfpci *chip, int rear_switch) 1790{ 1791 struct snd_ac97_template ac97; 1792 struct snd_kcontrol *kctl; 1793 struct snd_pcm_substream *substream; 1794 unsigned int idx; 1795 int err; 1796 static struct snd_ac97_bus_ops ops = { 1797 .write = snd_ymfpci_codec_write, 1798 .read = snd_ymfpci_codec_read, 1799 }; 1800 1801 if ((err = snd_ac97_bus(chip->card, 0, &ops, chip, &chip->ac97_bus)) < 0) 1802 return err; 1803 chip->ac97_bus->private_free = snd_ymfpci_mixer_free_ac97_bus; 1804 chip->ac97_bus->no_vra = 1; /* YMFPCI doesn't need VRA */ 1805 1806 memset(&ac97, 0, sizeof(ac97)); 1807 ac97.private_data = chip; 1808 ac97.private_free = snd_ymfpci_mixer_free_ac97; 1809 if ((err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97)) < 0) 1810 return err; 1811 1812 /* to be sure */ 1813 snd_ac97_update_bits(chip->ac97, AC97_EXTENDED_STATUS, 1814 AC97_EA_VRA|AC97_EA_VRM, 0); 1815 1816 for (idx = 0; idx < ARRAY_SIZE(snd_ymfpci_controls); idx++) { 1817 if ((err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_ymfpci_controls[idx], chip))) < 0) 1818 return err; 1819 } 1820 1821 /* add S/PDIF control */ 1822 if (snd_BUG_ON(!chip->pcm_spdif)) 1823 return -ENXIO; 1824 if ((err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_spdif_default, chip))) < 0) 1825 return err; 1826 kctl->id.device = chip->pcm_spdif->device; 1827 if ((err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_spdif_mask, chip))) < 0) 1828 return err; 1829 kctl->id.device = chip->pcm_spdif->device; 1830 if ((err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_spdif_stream, chip))) < 0) 1831 return err; 1832 kctl->id.device = chip->pcm_spdif->device; 1833 chip->spdif_pcm_ctl = kctl; 1834 1835 /* direct recording source */ 1836 if (chip->device_id == PCI_DEVICE_ID_YAMAHA_754 && 1837 (err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_drec_source, chip))) < 0) 1838 return err; 1839 1840 /* 1841 * shared rear/line-in 1842 */ 1843 if (rear_switch) { 1844 if ((err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_ymfpci_rear_shared, chip))) < 0) 1845 return err; 1846 } 1847 1848 /* per-voice volume */ 1849 substream = chip->pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream; 1850 for (idx = 0; idx < 32; ++idx) { 1851 kctl = snd_ctl_new1(&snd_ymfpci_pcm_volume, chip); 1852 if (!kctl) 1853 return -ENOMEM; 1854 kctl->id.device = chip->pcm->device; 1855 kctl->id.subdevice = idx; 1856 kctl->private_value = (unsigned long)substream; 1857 if ((err = snd_ctl_add(chip->card, kctl)) < 0) 1858 return err; 1859 chip->pcm_mixer[idx].left = 0x8000; 1860 chip->pcm_mixer[idx].right = 0x8000; 1861 chip->pcm_mixer[idx].ctl = kctl; 1862 substream = substream->next; 1863 } 1864 1865 return 0; 1866} 1867 1868 1869/* 1870 * timer 1871 */ 1872 1873static int snd_ymfpci_timer_start(struct snd_timer *timer) 1874{ 1875 struct snd_ymfpci *chip; 1876 unsigned long flags; 1877 unsigned int count; 1878 1879 chip = snd_timer_chip(timer); 1880 spin_lock_irqsave(&chip->reg_lock, flags); 1881 if (timer->sticks > 1) { 1882 chip->timer_ticks = timer->sticks; 1883 count = timer->sticks - 1; 1884 } else { 1885 /* 1886 * Divisor 1 is not allowed; fake it by using divisor 2 and 1887 * counting two ticks for each interrupt. 1888 */ 1889 chip->timer_ticks = 2; 1890 count = 2 - 1; 1891 } 1892 snd_ymfpci_writew(chip, YDSXGR_TIMERCOUNT, count); 1893 snd_ymfpci_writeb(chip, YDSXGR_TIMERCTRL, 0x03); 1894 spin_unlock_irqrestore(&chip->reg_lock, flags); 1895 return 0; 1896} 1897 1898static int snd_ymfpci_timer_stop(struct snd_timer *timer) 1899{ 1900 struct snd_ymfpci *chip; 1901 unsigned long flags; 1902 1903 chip = snd_timer_chip(timer); 1904 spin_lock_irqsave(&chip->reg_lock, flags); 1905 snd_ymfpci_writeb(chip, YDSXGR_TIMERCTRL, 0x00); 1906 spin_unlock_irqrestore(&chip->reg_lock, flags); 1907 return 0; 1908} 1909 1910static int snd_ymfpci_timer_precise_resolution(struct snd_timer *timer, 1911 unsigned long *num, unsigned long *den) 1912{ 1913 *num = 1; 1914 *den = 96000; 1915 return 0; 1916} 1917 1918static struct snd_timer_hardware snd_ymfpci_timer_hw = { 1919 .flags = SNDRV_TIMER_HW_AUTO, 1920 .resolution = 10417, /* 1 / 96 kHz = 10.41666...us */ 1921 .ticks = 0x10000, 1922 .start = snd_ymfpci_timer_start, 1923 .stop = snd_ymfpci_timer_stop, 1924 .precise_resolution = snd_ymfpci_timer_precise_resolution, 1925}; 1926 1927int __devinit snd_ymfpci_timer(struct snd_ymfpci *chip, int device) 1928{ 1929 struct snd_timer *timer = NULL; 1930 struct snd_timer_id tid; 1931 int err; 1932 1933 tid.dev_class = SNDRV_TIMER_CLASS_CARD; 1934 tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE; 1935 tid.card = chip->card->number; 1936 tid.device = device; 1937 tid.subdevice = 0; 1938 if ((err = snd_timer_new(chip->card, "YMFPCI", &tid, &timer)) >= 0) { 1939 strcpy(timer->name, "YMFPCI timer"); 1940 timer->private_data = chip; 1941 timer->hw = snd_ymfpci_timer_hw; 1942 } 1943 chip->timer = timer; 1944 return err; 1945} 1946 1947 1948/* 1949 * proc interface 1950 */ 1951 1952static void snd_ymfpci_proc_read(struct snd_info_entry *entry, 1953 struct snd_info_buffer *buffer) 1954{ 1955 struct snd_ymfpci *chip = entry->private_data; 1956 int i; 1957 1958 snd_iprintf(buffer, "YMFPCI\n\n"); 1959 for (i = 0; i <= YDSXGR_WORKBASE; i += 4) 1960 snd_iprintf(buffer, "%04x: %04x\n", i, snd_ymfpci_readl(chip, i)); 1961} 1962 1963static int __devinit snd_ymfpci_proc_init(struct snd_card *card, struct snd_ymfpci *chip) 1964{ 1965 struct snd_info_entry *entry; 1966 1967 if (! snd_card_proc_new(card, "ymfpci", &entry)) 1968 snd_info_set_text_ops(entry, chip, snd_ymfpci_proc_read); 1969 return 0; 1970} 1971 1972/* 1973 * initialization routines 1974 */ 1975 1976static void snd_ymfpci_aclink_reset(struct pci_dev * pci) 1977{ 1978 u8 cmd; 1979 1980 pci_read_config_byte(pci, PCIR_DSXG_CTRL, &cmd); 1981 pci_write_config_byte(pci, PCIR_DSXG_CTRL, cmd & 0xfc); 1982 pci_write_config_byte(pci, PCIR_DSXG_CTRL, cmd | 0x03); 1983 pci_write_config_byte(pci, PCIR_DSXG_CTRL, cmd & 0xfc); 1984 pci_write_config_word(pci, PCIR_DSXG_PWRCTRL1, 0); 1985 pci_write_config_word(pci, PCIR_DSXG_PWRCTRL2, 0); 1986} 1987 1988static void snd_ymfpci_enable_dsp(struct snd_ymfpci *chip) 1989{ 1990 snd_ymfpci_writel(chip, YDSXGR_CONFIG, 0x00000001); 1991} 1992 1993static void snd_ymfpci_disable_dsp(struct snd_ymfpci *chip) 1994{ 1995 u32 val; 1996 int timeout = 1000; 1997 1998 val = snd_ymfpci_readl(chip, YDSXGR_CONFIG); 1999 if (val) 2000 snd_ymfpci_writel(chip, YDSXGR_CONFIG, 0x00000000); 2001 while (timeout-- > 0) { 2002 val = snd_ymfpci_readl(chip, YDSXGR_STATUS); 2003 if ((val & 0x00000002) == 0) 2004 break; 2005 } 2006} 2007 2008static int snd_ymfpci_request_firmware(struct snd_ymfpci *chip) 2009{ 2010 int err, is_1e; 2011 const char *name; 2012 2013 err = request_firmware(&chip->dsp_microcode, "yamaha/ds1_dsp.fw", 2014 &chip->pci->dev); 2015 if (err >= 0) { 2016 if (chip->dsp_microcode->size != YDSXG_DSPLENGTH) { 2017 snd_printk(KERN_ERR "DSP microcode has wrong size\n"); 2018 err = -EINVAL; 2019 } 2020 } 2021 if (err < 0) 2022 return err; 2023 is_1e = chip->device_id == PCI_DEVICE_ID_YAMAHA_724F || 2024 chip->device_id == PCI_DEVICE_ID_YAMAHA_740C || 2025 chip->device_id == PCI_DEVICE_ID_YAMAHA_744 || 2026 chip->device_id == PCI_DEVICE_ID_YAMAHA_754; 2027 name = is_1e ? "yamaha/ds1e_ctrl.fw" : "yamaha/ds1_ctrl.fw"; 2028 err = request_firmware(&chip->controller_microcode, name, 2029 &chip->pci->dev); 2030 if (err >= 0) { 2031 if (chip->controller_microcode->size != YDSXG_CTRLLENGTH) { 2032 snd_printk(KERN_ERR "controller microcode" 2033 " has wrong size\n"); 2034 err = -EINVAL; 2035 } 2036 } 2037 if (err < 0) 2038 return err; 2039 return 0; 2040} 2041 2042MODULE_FIRMWARE("yamaha/ds1_dsp.fw"); 2043MODULE_FIRMWARE("yamaha/ds1_ctrl.fw"); 2044MODULE_FIRMWARE("yamaha/ds1e_ctrl.fw"); 2045 2046static void snd_ymfpci_download_image(struct snd_ymfpci *chip) 2047{ 2048 int i; 2049 u16 ctrl; 2050 const __le32 *inst; 2051 2052 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0x00000000); 2053 snd_ymfpci_disable_dsp(chip); 2054 snd_ymfpci_writel(chip, YDSXGR_MODE, 0x00010000); 2055 snd_ymfpci_writel(chip, YDSXGR_MODE, 0x00000000); 2056 snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, 0x00000000); 2057 snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT, 0x00000000); 2058 snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, 0x00000000); 2059 snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, 0x00000000); 2060 snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, 0x00000000); 2061 ctrl = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL); 2062 snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, ctrl & ~0x0007); 2063 2064 /* setup DSP instruction code */ 2065 inst = (const __le32 *)chip->dsp_microcode->data; 2066 for (i = 0; i < YDSXG_DSPLENGTH / 4; i++) 2067 snd_ymfpci_writel(chip, YDSXGR_DSPINSTRAM + (i << 2), 2068 le32_to_cpu(inst[i])); 2069 2070 /* setup control instruction code */ 2071 inst = (const __le32 *)chip->controller_microcode->data; 2072 for (i = 0; i < YDSXG_CTRLLENGTH / 4; i++) 2073 snd_ymfpci_writel(chip, YDSXGR_CTRLINSTRAM + (i << 2), 2074 le32_to_cpu(inst[i])); 2075 2076 snd_ymfpci_enable_dsp(chip); 2077} 2078 2079static int __devinit snd_ymfpci_memalloc(struct snd_ymfpci *chip) 2080{ 2081 long size, playback_ctrl_size; 2082 int voice, bank, reg; 2083 u8 *ptr; 2084 dma_addr_t ptr_addr; 2085 2086 playback_ctrl_size = 4 + 4 * YDSXG_PLAYBACK_VOICES; 2087 chip->bank_size_playback = snd_ymfpci_readl(chip, YDSXGR_PLAYCTRLSIZE) << 2; 2088 chip->bank_size_capture = snd_ymfpci_readl(chip, YDSXGR_RECCTRLSIZE) << 2; 2089 chip->bank_size_effect = snd_ymfpci_readl(chip, YDSXGR_EFFCTRLSIZE) << 2; 2090 chip->work_size = YDSXG_DEFAULT_WORK_SIZE; 2091 2092 size = ALIGN(playback_ctrl_size, 0x100) + 2093 ALIGN(chip->bank_size_playback * 2 * YDSXG_PLAYBACK_VOICES, 0x100) + 2094 ALIGN(chip->bank_size_capture * 2 * YDSXG_CAPTURE_VOICES, 0x100) + 2095 ALIGN(chip->bank_size_effect * 2 * YDSXG_EFFECT_VOICES, 0x100) + 2096 chip->work_size; 2097 /* work_ptr must be aligned to 256 bytes, but it's already 2098 covered with the kernel page allocation mechanism */ 2099 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci), 2100 size, &chip->work_ptr) < 0) 2101 return -ENOMEM; 2102 ptr = chip->work_ptr.area; 2103 ptr_addr = chip->work_ptr.addr; 2104 memset(ptr, 0, size); /* for sure */ 2105 2106 chip->bank_base_playback = ptr; 2107 chip->bank_base_playback_addr = ptr_addr; 2108 chip->ctrl_playback = (u32 *)ptr; 2109 chip->ctrl_playback[0] = cpu_to_le32(YDSXG_PLAYBACK_VOICES); 2110 ptr += ALIGN(playback_ctrl_size, 0x100); 2111 ptr_addr += ALIGN(playback_ctrl_size, 0x100); 2112 for (voice = 0; voice < YDSXG_PLAYBACK_VOICES; voice++) { 2113 chip->voices[voice].number = voice; 2114 chip->voices[voice].bank = (struct snd_ymfpci_playback_bank *)ptr; 2115 chip->voices[voice].bank_addr = ptr_addr; 2116 for (bank = 0; bank < 2; bank++) { 2117 chip->bank_playback[voice][bank] = (struct snd_ymfpci_playback_bank *)ptr; 2118 ptr += chip->bank_size_playback; 2119 ptr_addr += chip->bank_size_playback; 2120 } 2121 } 2122 ptr = (char *)ALIGN((unsigned long)ptr, 0x100); 2123 ptr_addr = ALIGN(ptr_addr, 0x100); 2124 chip->bank_base_capture = ptr; 2125 chip->bank_base_capture_addr = ptr_addr; 2126 for (voice = 0; voice < YDSXG_CAPTURE_VOICES; voice++) 2127 for (bank = 0; bank < 2; bank++) { 2128 chip->bank_capture[voice][bank] = (struct snd_ymfpci_capture_bank *)ptr; 2129 ptr += chip->bank_size_capture; 2130 ptr_addr += chip->bank_size_capture; 2131 } 2132 ptr = (char *)ALIGN((unsigned long)ptr, 0x100); 2133 ptr_addr = ALIGN(ptr_addr, 0x100); 2134 chip->bank_base_effect = ptr; 2135 chip->bank_base_effect_addr = ptr_addr; 2136 for (voice = 0; voice < YDSXG_EFFECT_VOICES; voice++) 2137 for (bank = 0; bank < 2; bank++) { 2138 chip->bank_effect[voice][bank] = (struct snd_ymfpci_effect_bank *)ptr; 2139 ptr += chip->bank_size_effect; 2140 ptr_addr += chip->bank_size_effect; 2141 } 2142 ptr = (char *)ALIGN((unsigned long)ptr, 0x100); 2143 ptr_addr = ALIGN(ptr_addr, 0x100); 2144 chip->work_base = ptr; 2145 chip->work_base_addr = ptr_addr; 2146 2147 snd_BUG_ON(ptr + chip->work_size != 2148 chip->work_ptr.area + chip->work_ptr.bytes); 2149 2150 snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, chip->bank_base_playback_addr); 2151 snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, chip->bank_base_capture_addr); 2152 snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, chip->bank_base_effect_addr); 2153 snd_ymfpci_writel(chip, YDSXGR_WORKBASE, chip->work_base_addr); 2154 snd_ymfpci_writel(chip, YDSXGR_WORKSIZE, chip->work_size >> 2); 2155 2156 /* S/PDIF output initialization */ 2157 chip->spdif_bits = chip->spdif_pcm_bits = SNDRV_PCM_DEFAULT_CON_SPDIF & 0xffff; 2158 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL, 0); 2159 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits); 2160 2161 /* S/PDIF input initialization */ 2162 snd_ymfpci_writew(chip, YDSXGR_SPDIFINCTRL, 0); 2163 2164 /* digital mixer setup */ 2165 for (reg = 0x80; reg < 0xc0; reg += 4) 2166 snd_ymfpci_writel(chip, reg, 0); 2167 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0x3fff3fff); 2168 snd_ymfpci_writel(chip, YDSXGR_BUF441OUTVOL, 0x3fff3fff); 2169 snd_ymfpci_writel(chip, YDSXGR_ZVOUTVOL, 0x3fff3fff); 2170 snd_ymfpci_writel(chip, YDSXGR_SPDIFOUTVOL, 0x3fff3fff); 2171 snd_ymfpci_writel(chip, YDSXGR_NATIVEADCINVOL, 0x3fff3fff); 2172 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACINVOL, 0x3fff3fff); 2173 snd_ymfpci_writel(chip, YDSXGR_PRIADCLOOPVOL, 0x3fff3fff); 2174 snd_ymfpci_writel(chip, YDSXGR_LEGACYOUTVOL, 0x3fff3fff); 2175 2176 return 0; 2177} 2178 2179static int snd_ymfpci_free(struct snd_ymfpci *chip) 2180{ 2181 u16 ctrl; 2182 2183 if (snd_BUG_ON(!chip)) 2184 return -EINVAL; 2185 2186 if (chip->res_reg_area) { /* don't touch busy hardware */ 2187 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0); 2188 snd_ymfpci_writel(chip, YDSXGR_BUF441OUTVOL, 0); 2189 snd_ymfpci_writel(chip, YDSXGR_LEGACYOUTVOL, 0); 2190 snd_ymfpci_writel(chip, YDSXGR_STATUS, ~0); 2191 snd_ymfpci_disable_dsp(chip); 2192 snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, 0); 2193 snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, 0); 2194 snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, 0); 2195 snd_ymfpci_writel(chip, YDSXGR_WORKBASE, 0); 2196 snd_ymfpci_writel(chip, YDSXGR_WORKSIZE, 0); 2197 ctrl = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL); 2198 snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, ctrl & ~0x0007); 2199 } 2200 2201 snd_ymfpci_ac3_done(chip); 2202 2203 /* Set PCI device to D3 state */ 2204 2205#ifdef CONFIG_PM 2206 vfree(chip->saved_regs); 2207#endif 2208 if (chip->irq >= 0) 2209 free_irq(chip->irq, chip); 2210 release_and_free_resource(chip->mpu_res); 2211 release_and_free_resource(chip->fm_res); 2212 snd_ymfpci_free_gameport(chip); 2213 if (chip->reg_area_virt) 2214 iounmap(chip->reg_area_virt); 2215 if (chip->work_ptr.area) 2216 snd_dma_free_pages(&chip->work_ptr); 2217 2218 release_and_free_resource(chip->res_reg_area); 2219 2220 pci_write_config_word(chip->pci, 0x40, chip->old_legacy_ctrl); 2221 2222 pci_disable_device(chip->pci); 2223 release_firmware(chip->dsp_microcode); 2224 release_firmware(chip->controller_microcode); 2225 kfree(chip); 2226 return 0; 2227} 2228 2229static int snd_ymfpci_dev_free(struct snd_device *device) 2230{ 2231 struct snd_ymfpci *chip = device->device_data; 2232 return snd_ymfpci_free(chip); 2233} 2234 2235#ifdef CONFIG_PM 2236static int saved_regs_index[] = { 2237 /* spdif */ 2238 YDSXGR_SPDIFOUTCTRL, 2239 YDSXGR_SPDIFOUTSTATUS, 2240 YDSXGR_SPDIFINCTRL, 2241 /* volumes */ 2242 YDSXGR_PRIADCLOOPVOL, 2243 YDSXGR_NATIVEDACINVOL, 2244 YDSXGR_NATIVEDACOUTVOL, 2245 YDSXGR_BUF441OUTVOL, 2246 YDSXGR_NATIVEADCINVOL, 2247 YDSXGR_SPDIFLOOPVOL, 2248 YDSXGR_SPDIFOUTVOL, 2249 YDSXGR_ZVOUTVOL, 2250 YDSXGR_LEGACYOUTVOL, 2251 /* address bases */ 2252 YDSXGR_PLAYCTRLBASE, 2253 YDSXGR_RECCTRLBASE, 2254 YDSXGR_EFFCTRLBASE, 2255 YDSXGR_WORKBASE, 2256 /* capture set up */ 2257 YDSXGR_MAPOFREC, 2258 YDSXGR_RECFORMAT, 2259 YDSXGR_RECSLOTSR, 2260 YDSXGR_ADCFORMAT, 2261 YDSXGR_ADCSLOTSR, 2262}; 2263#define YDSXGR_NUM_SAVED_REGS ARRAY_SIZE(saved_regs_index) 2264 2265int snd_ymfpci_suspend(struct pci_dev *pci, pm_message_t state) 2266{ 2267 struct snd_card *card = pci_get_drvdata(pci); 2268 struct snd_ymfpci *chip = card->private_data; 2269 unsigned int i; 2270 2271 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot); 2272 snd_pcm_suspend_all(chip->pcm); 2273 snd_pcm_suspend_all(chip->pcm2); 2274 snd_pcm_suspend_all(chip->pcm_spdif); 2275 snd_pcm_suspend_all(chip->pcm_4ch); 2276 snd_ac97_suspend(chip->ac97); 2277 for (i = 0; i < YDSXGR_NUM_SAVED_REGS; i++) 2278 chip->saved_regs[i] = snd_ymfpci_readl(chip, saved_regs_index[i]); 2279 chip->saved_ydsxgr_mode = snd_ymfpci_readl(chip, YDSXGR_MODE); 2280 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0); 2281 snd_ymfpci_writel(chip, YDSXGR_BUF441OUTVOL, 0); 2282 snd_ymfpci_disable_dsp(chip); 2283 pci_disable_device(pci); 2284 pci_save_state(pci); 2285 pci_set_power_state(pci, pci_choose_state(pci, state)); 2286 return 0; 2287} 2288 2289int snd_ymfpci_resume(struct pci_dev *pci) 2290{ 2291 struct snd_card *card = pci_get_drvdata(pci); 2292 struct snd_ymfpci *chip = card->private_data; 2293 unsigned int i; 2294 2295 pci_set_power_state(pci, PCI_D0); 2296 pci_restore_state(pci); 2297 if (pci_enable_device(pci) < 0) { 2298 printk(KERN_ERR "ymfpci: pci_enable_device failed, " 2299 "disabling device\n"); 2300 snd_card_disconnect(card); 2301 return -EIO; 2302 } 2303 pci_set_master(pci); 2304 snd_ymfpci_aclink_reset(pci); 2305 snd_ymfpci_codec_ready(chip, 0); 2306 snd_ymfpci_download_image(chip); 2307 udelay(100); 2308 2309 for (i = 0; i < YDSXGR_NUM_SAVED_REGS; i++) 2310 snd_ymfpci_writel(chip, saved_regs_index[i], chip->saved_regs[i]); 2311 2312 snd_ac97_resume(chip->ac97); 2313 2314 /* start hw again */ 2315 if (chip->start_count > 0) { 2316 spin_lock_irq(&chip->reg_lock); 2317 snd_ymfpci_writel(chip, YDSXGR_MODE, chip->saved_ydsxgr_mode); 2318 chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT); 2319 spin_unlock_irq(&chip->reg_lock); 2320 } 2321 snd_power_change_state(card, SNDRV_CTL_POWER_D0); 2322 return 0; 2323} 2324#endif /* CONFIG_PM */ 2325 2326int __devinit snd_ymfpci_create(struct snd_card *card, 2327 struct pci_dev * pci, 2328 unsigned short old_legacy_ctrl, 2329 struct snd_ymfpci ** rchip) 2330{ 2331 struct snd_ymfpci *chip; 2332 int err; 2333 static struct snd_device_ops ops = { 2334 .dev_free = snd_ymfpci_dev_free, 2335 }; 2336 2337 *rchip = NULL; 2338 2339 /* enable PCI device */ 2340 if ((err = pci_enable_device(pci)) < 0) 2341 return err; 2342 2343 chip = kzalloc(sizeof(*chip), GFP_KERNEL); 2344 if (chip == NULL) { 2345 pci_disable_device(pci); 2346 return -ENOMEM; 2347 } 2348 chip->old_legacy_ctrl = old_legacy_ctrl; 2349 spin_lock_init(&chip->reg_lock); 2350 spin_lock_init(&chip->voice_lock); 2351 init_waitqueue_head(&chip->interrupt_sleep); 2352 atomic_set(&chip->interrupt_sleep_count, 0); 2353 chip->card = card; 2354 chip->pci = pci; 2355 chip->irq = -1; 2356 chip->device_id = pci->device; 2357 chip->rev = pci->revision; 2358 chip->reg_area_phys = pci_resource_start(pci, 0); 2359 chip->reg_area_virt = ioremap_nocache(chip->reg_area_phys, 0x8000); 2360 pci_set_master(pci); 2361 chip->src441_used = -1; 2362 2363 if ((chip->res_reg_area = request_mem_region(chip->reg_area_phys, 0x8000, "YMFPCI")) == NULL) { 2364 snd_printk(KERN_ERR "unable to grab memory region 0x%lx-0x%lx\n", chip->reg_area_phys, chip->reg_area_phys + 0x8000 - 1); 2365 snd_ymfpci_free(chip); 2366 return -EBUSY; 2367 } 2368 if (request_irq(pci->irq, snd_ymfpci_interrupt, IRQF_SHARED, 2369 "YMFPCI", chip)) { 2370 snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq); 2371 snd_ymfpci_free(chip); 2372 return -EBUSY; 2373 } 2374 chip->irq = pci->irq; 2375 2376 snd_ymfpci_aclink_reset(pci); 2377 if (snd_ymfpci_codec_ready(chip, 0) < 0) { 2378 snd_ymfpci_free(chip); 2379 return -EIO; 2380 } 2381 2382 err = snd_ymfpci_request_firmware(chip); 2383 if (err < 0) { 2384 snd_printk(KERN_ERR "firmware request failed: %d\n", err); 2385 snd_ymfpci_free(chip); 2386 return err; 2387 } 2388 snd_ymfpci_download_image(chip); 2389 2390 udelay(100); /* seems we need a delay after downloading image.. */ 2391 2392 if (snd_ymfpci_memalloc(chip) < 0) { 2393 snd_ymfpci_free(chip); 2394 return -EIO; 2395 } 2396 2397 if ((err = snd_ymfpci_ac3_init(chip)) < 0) { 2398 snd_ymfpci_free(chip); 2399 return err; 2400 } 2401 2402#ifdef CONFIG_PM 2403 chip->saved_regs = vmalloc(YDSXGR_NUM_SAVED_REGS * sizeof(u32)); 2404 if (chip->saved_regs == NULL) { 2405 snd_ymfpci_free(chip); 2406 return -ENOMEM; 2407 } 2408#endif 2409 2410 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) { 2411 snd_ymfpci_free(chip); 2412 return err; 2413 } 2414 2415 snd_ymfpci_proc_init(card, chip); 2416 2417 snd_card_set_dev(card, &pci->dev); 2418 2419 *rchip = chip; 2420 return 0; 2421} 2422