1/* 2 * Driver for Digigram VX soundcards 3 * 4 * Hardware core part 5 * 6 * Copyright (c) 2002 by Takashi Iwai <tiwai@suse.de> 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License as published by 10 * the Free Software Foundation; either version 2 of the License, or 11 * (at your option) any later version. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * You should have received a copy of the GNU General Public License 19 * along with this program; if not, write to the Free Software 20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 21 */ 22 23#include <linux/delay.h> 24#include <linux/slab.h> 25#include <linux/interrupt.h> 26#include <linux/init.h> 27#include <linux/device.h> 28#include <linux/firmware.h> 29#include <sound/core.h> 30#include <sound/pcm.h> 31#include <sound/asoundef.h> 32#include <sound/info.h> 33#include <asm/io.h> 34#include <sound/vx_core.h> 35#include "vx_cmd.h" 36 37MODULE_AUTHOR("Takashi Iwai <tiwai@suse.de>"); 38MODULE_DESCRIPTION("Common routines for Digigram VX drivers"); 39MODULE_LICENSE("GPL"); 40 41 42/* 43 * vx_check_reg_bit - wait for the specified bit is set/reset on a register 44 * @reg: register to check 45 * @mask: bit mask 46 * @bit: resultant bit to be checked 47 * @time: time-out of loop in msec 48 * 49 * returns zero if a bit matches, or a negative error code. 50 */ 51int snd_vx_check_reg_bit(struct vx_core *chip, int reg, int mask, int bit, int time) 52{ 53 unsigned long end_time = jiffies + (time * HZ + 999) / 1000; 54#ifdef CONFIG_SND_DEBUG 55 static char *reg_names[VX_REG_MAX] = { 56 "ICR", "CVR", "ISR", "IVR", "RXH", "RXM", "RXL", 57 "DMA", "CDSP", "RFREQ", "RUER/V2", "DATA", "MEMIRQ", 58 "ACQ", "BIT0", "BIT1", "MIC0", "MIC1", "MIC2", 59 "MIC3", "INTCSR", "CNTRL", "GPIOC", 60 "LOFREQ", "HIFREQ", "CSUER", "RUER" 61 }; 62#endif 63 do { 64 if ((snd_vx_inb(chip, reg) & mask) == bit) 65 return 0; 66 //msleep(10); 67 } while (time_after_eq(end_time, jiffies)); 68 snd_printd(KERN_DEBUG "vx_check_reg_bit: timeout, reg=%s, mask=0x%x, val=0x%x\n", reg_names[reg], mask, snd_vx_inb(chip, reg)); 69 return -EIO; 70} 71 72EXPORT_SYMBOL(snd_vx_check_reg_bit); 73 74/* 75 * vx_send_irq_dsp - set command irq bit 76 * @num: the requested IRQ type, IRQ_XXX 77 * 78 * this triggers the specified IRQ request 79 * returns 0 if successful, or a negative error code. 80 * 81 */ 82static int vx_send_irq_dsp(struct vx_core *chip, int num) 83{ 84 int nirq; 85 86 /* wait for Hc = 0 */ 87 if (snd_vx_check_reg_bit(chip, VX_CVR, CVR_HC, 0, 200) < 0) 88 return -EIO; 89 90 nirq = num; 91 if (vx_has_new_dsp(chip)) 92 nirq += VXP_IRQ_OFFSET; 93 vx_outb(chip, CVR, (nirq >> 1) | CVR_HC); 94 return 0; 95} 96 97 98/* 99 * vx_reset_chk - reset CHK bit on ISR 100 * 101 * returns 0 if successful, or a negative error code. 102 */ 103static int vx_reset_chk(struct vx_core *chip) 104{ 105 /* Reset irq CHK */ 106 if (vx_send_irq_dsp(chip, IRQ_RESET_CHK) < 0) 107 return -EIO; 108 /* Wait until CHK = 0 */ 109 if (vx_check_isr(chip, ISR_CHK, 0, 200) < 0) 110 return -EIO; 111 return 0; 112} 113 114/* 115 * vx_transfer_end - terminate message transfer 116 * @cmd: IRQ message to send (IRQ_MESS_XXX_END) 117 * 118 * returns 0 if successful, or a negative error code. 119 * the error code can be VX-specific, retrieved via vx_get_error(). 120 * NB: call with spinlock held! 121 */ 122static int vx_transfer_end(struct vx_core *chip, int cmd) 123{ 124 int err; 125 126 if ((err = vx_reset_chk(chip)) < 0) 127 return err; 128 129 /* irq MESS_READ/WRITE_END */ 130 if ((err = vx_send_irq_dsp(chip, cmd)) < 0) 131 return err; 132 133 /* Wait CHK = 1 */ 134 if ((err = vx_wait_isr_bit(chip, ISR_CHK)) < 0) 135 return err; 136 137 /* If error, Read RX */ 138 if ((err = vx_inb(chip, ISR)) & ISR_ERR) { 139 if ((err = vx_wait_for_rx_full(chip)) < 0) { 140 snd_printd(KERN_DEBUG "transfer_end: error in rx_full\n"); 141 return err; 142 } 143 err = vx_inb(chip, RXH) << 16; 144 err |= vx_inb(chip, RXM) << 8; 145 err |= vx_inb(chip, RXL); 146 snd_printd(KERN_DEBUG "transfer_end: error = 0x%x\n", err); 147 return -(VX_ERR_MASK | err); 148 } 149 return 0; 150} 151 152/* 153 * vx_read_status - return the status rmh 154 * @rmh: rmh record to store the status 155 * 156 * returns 0 if successful, or a negative error code. 157 * the error code can be VX-specific, retrieved via vx_get_error(). 158 * NB: call with spinlock held! 159 */ 160static int vx_read_status(struct vx_core *chip, struct vx_rmh *rmh) 161{ 162 int i, err, val, size; 163 164 /* no read necessary? */ 165 if (rmh->DspStat == RMH_SSIZE_FIXED && rmh->LgStat == 0) 166 return 0; 167 168 /* Wait for RX full (with timeout protection) 169 * The first word of status is in RX 170 */ 171 err = vx_wait_for_rx_full(chip); 172 if (err < 0) 173 return err; 174 175 /* Read RX */ 176 val = vx_inb(chip, RXH) << 16; 177 val |= vx_inb(chip, RXM) << 8; 178 val |= vx_inb(chip, RXL); 179 180 /* If status given by DSP, let's decode its size */ 181 switch (rmh->DspStat) { 182 case RMH_SSIZE_ARG: 183 size = val & 0xff; 184 rmh->Stat[0] = val & 0xffff00; 185 rmh->LgStat = size + 1; 186 break; 187 case RMH_SSIZE_MASK: 188 /* Let's count the arg numbers from a mask */ 189 rmh->Stat[0] = val; 190 size = 0; 191 while (val) { 192 if (val & 0x01) 193 size++; 194 val >>= 1; 195 } 196 rmh->LgStat = size + 1; 197 break; 198 default: 199 /* else retrieve the status length given by the driver */ 200 size = rmh->LgStat; 201 rmh->Stat[0] = val; /* Val is the status 1st word */ 202 size--; /* hence adjust remaining length */ 203 break; 204 } 205 206 if (size < 1) 207 return 0; 208 if (snd_BUG_ON(size > SIZE_MAX_STATUS)) 209 return -EINVAL; 210 211 for (i = 1; i <= size; i++) { 212 /* trigger an irq MESS_WRITE_NEXT */ 213 err = vx_send_irq_dsp(chip, IRQ_MESS_WRITE_NEXT); 214 if (err < 0) 215 return err; 216 /* Wait for RX full (with timeout protection) */ 217 err = vx_wait_for_rx_full(chip); 218 if (err < 0) 219 return err; 220 rmh->Stat[i] = vx_inb(chip, RXH) << 16; 221 rmh->Stat[i] |= vx_inb(chip, RXM) << 8; 222 rmh->Stat[i] |= vx_inb(chip, RXL); 223 } 224 225 return vx_transfer_end(chip, IRQ_MESS_WRITE_END); 226} 227 228 229#define MASK_MORE_THAN_1_WORD_COMMAND 0x00008000 230#define MASK_1_WORD_COMMAND 0x00ff7fff 231 232/* 233 * vx_send_msg_nolock - send a DSP message and read back the status 234 * @rmh: the rmh record to send and receive 235 * 236 * returns 0 if successful, or a negative error code. 237 * the error code can be VX-specific, retrieved via vx_get_error(). 238 * 239 * this function doesn't call spinlock at all. 240 */ 241int vx_send_msg_nolock(struct vx_core *chip, struct vx_rmh *rmh) 242{ 243 int i, err; 244 245 if (chip->chip_status & VX_STAT_IS_STALE) 246 return -EBUSY; 247 248 if ((err = vx_reset_chk(chip)) < 0) { 249 snd_printd(KERN_DEBUG "vx_send_msg: vx_reset_chk error\n"); 250 return err; 251 } 252 253 /* Check bit M is set according to length of the command */ 254 if (rmh->LgCmd > 1) 255 rmh->Cmd[0] |= MASK_MORE_THAN_1_WORD_COMMAND; 256 else 257 rmh->Cmd[0] &= MASK_1_WORD_COMMAND; 258 259 /* Wait for TX empty */ 260 if ((err = vx_wait_isr_bit(chip, ISR_TX_EMPTY)) < 0) { 261 snd_printd(KERN_DEBUG "vx_send_msg: wait tx empty error\n"); 262 return err; 263 } 264 265 /* Write Cmd[0] */ 266 vx_outb(chip, TXH, (rmh->Cmd[0] >> 16) & 0xff); 267 vx_outb(chip, TXM, (rmh->Cmd[0] >> 8) & 0xff); 268 vx_outb(chip, TXL, rmh->Cmd[0] & 0xff); 269 270 /* Trigger irq MESSAGE */ 271 if ((err = vx_send_irq_dsp(chip, IRQ_MESSAGE)) < 0) { 272 snd_printd(KERN_DEBUG "vx_send_msg: send IRQ_MESSAGE error\n"); 273 return err; 274 } 275 276 /* Wait for CHK = 1 */ 277 if ((err = vx_wait_isr_bit(chip, ISR_CHK)) < 0) 278 return err; 279 280 /* If error, get error value from RX */ 281 if (vx_inb(chip, ISR) & ISR_ERR) { 282 if ((err = vx_wait_for_rx_full(chip)) < 0) { 283 snd_printd(KERN_DEBUG "vx_send_msg: rx_full read error\n"); 284 return err; 285 } 286 err = vx_inb(chip, RXH) << 16; 287 err |= vx_inb(chip, RXM) << 8; 288 err |= vx_inb(chip, RXL); 289 snd_printd(KERN_DEBUG "msg got error = 0x%x at cmd[0]\n", err); 290 err = -(VX_ERR_MASK | err); 291 return err; 292 } 293 294 /* Send the other words */ 295 if (rmh->LgCmd > 1) { 296 for (i = 1; i < rmh->LgCmd; i++) { 297 /* Wait for TX ready */ 298 if ((err = vx_wait_isr_bit(chip, ISR_TX_READY)) < 0) { 299 snd_printd(KERN_DEBUG "vx_send_msg: tx_ready error\n"); 300 return err; 301 } 302 303 /* Write Cmd[i] */ 304 vx_outb(chip, TXH, (rmh->Cmd[i] >> 16) & 0xff); 305 vx_outb(chip, TXM, (rmh->Cmd[i] >> 8) & 0xff); 306 vx_outb(chip, TXL, rmh->Cmd[i] & 0xff); 307 308 /* Trigger irq MESS_READ_NEXT */ 309 if ((err = vx_send_irq_dsp(chip, IRQ_MESS_READ_NEXT)) < 0) { 310 snd_printd(KERN_DEBUG "vx_send_msg: IRQ_READ_NEXT error\n"); 311 return err; 312 } 313 } 314 /* Wait for TX empty */ 315 if ((err = vx_wait_isr_bit(chip, ISR_TX_READY)) < 0) { 316 snd_printd(KERN_DEBUG "vx_send_msg: TX_READY error\n"); 317 return err; 318 } 319 /* End of transfer */ 320 err = vx_transfer_end(chip, IRQ_MESS_READ_END); 321 if (err < 0) 322 return err; 323 } 324 325 return vx_read_status(chip, rmh); 326} 327 328 329/* 330 * vx_send_msg - send a DSP message with spinlock 331 * @rmh: the rmh record to send and receive 332 * 333 * returns 0 if successful, or a negative error code. 334 * see vx_send_msg_nolock(). 335 */ 336int vx_send_msg(struct vx_core *chip, struct vx_rmh *rmh) 337{ 338 unsigned long flags; 339 int err; 340 341 spin_lock_irqsave(&chip->lock, flags); 342 err = vx_send_msg_nolock(chip, rmh); 343 spin_unlock_irqrestore(&chip->lock, flags); 344 return err; 345} 346 347 348/* 349 * vx_send_rih_nolock - send an RIH to xilinx 350 * @cmd: the command to send 351 * 352 * returns 0 if successful, or a negative error code. 353 * the error code can be VX-specific, retrieved via vx_get_error(). 354 * 355 * this function doesn't call spinlock at all. 356 * 357 * unlike RMH, no command is sent to DSP. 358 */ 359int vx_send_rih_nolock(struct vx_core *chip, int cmd) 360{ 361 int err; 362 363 if (chip->chip_status & VX_STAT_IS_STALE) 364 return -EBUSY; 365 366 if ((err = vx_reset_chk(chip)) < 0) 367 return err; 368 /* send the IRQ */ 369 if ((err = vx_send_irq_dsp(chip, cmd)) < 0) 370 return err; 371 /* Wait CHK = 1 */ 372 if ((err = vx_wait_isr_bit(chip, ISR_CHK)) < 0) 373 return err; 374 /* If error, read RX */ 375 if (vx_inb(chip, ISR) & ISR_ERR) { 376 if ((err = vx_wait_for_rx_full(chip)) < 0) 377 return err; 378 err = vx_inb(chip, RXH) << 16; 379 err |= vx_inb(chip, RXM) << 8; 380 err |= vx_inb(chip, RXL); 381 return -(VX_ERR_MASK | err); 382 } 383 return 0; 384} 385 386 387/* 388 * vx_send_rih - send an RIH with spinlock 389 * @cmd: the command to send 390 * 391 * see vx_send_rih_nolock(). 392 */ 393int vx_send_rih(struct vx_core *chip, int cmd) 394{ 395 unsigned long flags; 396 int err; 397 398 spin_lock_irqsave(&chip->lock, flags); 399 err = vx_send_rih_nolock(chip, cmd); 400 spin_unlock_irqrestore(&chip->lock, flags); 401 return err; 402} 403 404#define END_OF_RESET_WAIT_TIME 500 /* us */ 405 406/** 407 * snd_vx_boot_xilinx - boot up the xilinx interface 408 * @boot: the boot record to load 409 */ 410int snd_vx_load_boot_image(struct vx_core *chip, const struct firmware *boot) 411{ 412 unsigned int i; 413 int no_fillup = vx_has_new_dsp(chip); 414 415 /* check the length of boot image */ 416 if (boot->size <= 0) 417 return -EINVAL; 418 if (boot->size % 3) 419 return -EINVAL; 420 421 /* reset dsp */ 422 vx_reset_dsp(chip); 423 424 udelay(END_OF_RESET_WAIT_TIME); /* another wait? */ 425 426 /* download boot strap */ 427 for (i = 0; i < 0x600; i += 3) { 428 if (i >= boot->size) { 429 if (no_fillup) 430 break; 431 if (vx_wait_isr_bit(chip, ISR_TX_EMPTY) < 0) { 432 snd_printk(KERN_ERR "dsp boot failed at %d\n", i); 433 return -EIO; 434 } 435 vx_outb(chip, TXH, 0); 436 vx_outb(chip, TXM, 0); 437 vx_outb(chip, TXL, 0); 438 } else { 439 const unsigned char *image = boot->data + i; 440 if (vx_wait_isr_bit(chip, ISR_TX_EMPTY) < 0) { 441 snd_printk(KERN_ERR "dsp boot failed at %d\n", i); 442 return -EIO; 443 } 444 vx_outb(chip, TXH, image[0]); 445 vx_outb(chip, TXM, image[1]); 446 vx_outb(chip, TXL, image[2]); 447 } 448 } 449 return 0; 450} 451 452EXPORT_SYMBOL(snd_vx_load_boot_image); 453 454/* 455 * vx_test_irq_src - query the source of interrupts 456 * 457 * called from irq handler only 458 */ 459static int vx_test_irq_src(struct vx_core *chip, unsigned int *ret) 460{ 461 int err; 462 463 vx_init_rmh(&chip->irq_rmh, CMD_TEST_IT); 464 spin_lock(&chip->lock); 465 err = vx_send_msg_nolock(chip, &chip->irq_rmh); 466 if (err < 0) 467 *ret = 0; 468 else 469 *ret = chip->irq_rmh.Stat[0]; 470 spin_unlock(&chip->lock); 471 return err; 472} 473 474 475/* 476 * vx_interrupt - soft irq handler 477 */ 478static void vx_interrupt(unsigned long private_data) 479{ 480 struct vx_core *chip = (struct vx_core *) private_data; 481 unsigned int events; 482 483 if (chip->chip_status & VX_STAT_IS_STALE) 484 return; 485 486 if (vx_test_irq_src(chip, &events) < 0) 487 return; 488 489 // printk(KERN_DEBUG "IRQ events = 0x%x\n", events); 490 491 /* We must prevent any application using this DSP 492 * and block any further request until the application 493 * either unregisters or reloads the DSP 494 */ 495 if (events & FATAL_DSP_ERROR) { 496 snd_printk(KERN_ERR "vx_core: fatal DSP error!!\n"); 497 return; 498 } 499 500 /* The start on time code conditions are filled (ie the time code 501 * received by the board is equal to one of those given to it). 502 */ 503 if (events & TIME_CODE_EVENT_PENDING) 504 ; /* so far, nothing to do yet */ 505 506 /* The frequency has changed on the board (UER mode). */ 507 if (events & FREQUENCY_CHANGE_EVENT_PENDING) 508 vx_change_frequency(chip); 509 510 /* update the pcm streams */ 511 vx_pcm_update_intr(chip, events); 512} 513 514 515/** 516 * snd_vx_irq_handler - interrupt handler 517 */ 518irqreturn_t snd_vx_irq_handler(int irq, void *dev) 519{ 520 struct vx_core *chip = dev; 521 522 if (! (chip->chip_status & VX_STAT_CHIP_INIT) || 523 (chip->chip_status & VX_STAT_IS_STALE)) 524 return IRQ_NONE; 525 if (! vx_test_and_ack(chip)) 526 tasklet_schedule(&chip->tq); 527 return IRQ_HANDLED; 528} 529 530EXPORT_SYMBOL(snd_vx_irq_handler); 531 532/* 533 */ 534static void vx_reset_board(struct vx_core *chip, int cold_reset) 535{ 536 if (snd_BUG_ON(!chip->ops->reset_board)) 537 return; 538 539 /* current source, later sync'ed with target */ 540 chip->audio_source = VX_AUDIO_SRC_LINE; 541 if (cold_reset) { 542 chip->audio_source_target = chip->audio_source; 543 chip->clock_source = INTERNAL_QUARTZ; 544 chip->clock_mode = VX_CLOCK_MODE_AUTO; 545 chip->freq = 48000; 546 chip->uer_detected = VX_UER_MODE_NOT_PRESENT; 547 chip->uer_bits = SNDRV_PCM_DEFAULT_CON_SPDIF; 548 } 549 550 chip->ops->reset_board(chip, cold_reset); 551 552 vx_reset_codec(chip, cold_reset); 553 554 vx_set_internal_clock(chip, chip->freq); 555 556 /* Reset the DSP */ 557 vx_reset_dsp(chip); 558 559 if (vx_is_pcmcia(chip)) { 560 /* Acknowledge any pending IRQ and reset the MEMIRQ flag. */ 561 vx_test_and_ack(chip); 562 vx_validate_irq(chip, 1); 563 } 564 565 /* init CBits */ 566 vx_set_iec958_status(chip, chip->uer_bits); 567} 568 569 570/* 571 * proc interface 572 */ 573 574static void vx_proc_read(struct snd_info_entry *entry, struct snd_info_buffer *buffer) 575{ 576 struct vx_core *chip = entry->private_data; 577 static char *audio_src_vxp[] = { "Line", "Mic", "Digital" }; 578 static char *audio_src_vx2[] = { "Analog", "Analog", "Digital" }; 579 static char *clock_mode[] = { "Auto", "Internal", "External" }; 580 static char *clock_src[] = { "Internal", "External" }; 581 static char *uer_type[] = { "Consumer", "Professional", "Not Present" }; 582 583 snd_iprintf(buffer, "%s\n", chip->card->longname); 584 snd_iprintf(buffer, "Xilinx Firmware: %s\n", 585 chip->chip_status & VX_STAT_XILINX_LOADED ? "Loaded" : "No"); 586 snd_iprintf(buffer, "Device Initialized: %s\n", 587 chip->chip_status & VX_STAT_DEVICE_INIT ? "Yes" : "No"); 588 snd_iprintf(buffer, "DSP audio info:"); 589 if (chip->audio_info & VX_AUDIO_INFO_REAL_TIME) 590 snd_iprintf(buffer, " realtime"); 591 if (chip->audio_info & VX_AUDIO_INFO_OFFLINE) 592 snd_iprintf(buffer, " offline"); 593 if (chip->audio_info & VX_AUDIO_INFO_MPEG1) 594 snd_iprintf(buffer, " mpeg1"); 595 if (chip->audio_info & VX_AUDIO_INFO_MPEG2) 596 snd_iprintf(buffer, " mpeg2"); 597 if (chip->audio_info & VX_AUDIO_INFO_LINEAR_8) 598 snd_iprintf(buffer, " linear8"); 599 if (chip->audio_info & VX_AUDIO_INFO_LINEAR_16) 600 snd_iprintf(buffer, " linear16"); 601 if (chip->audio_info & VX_AUDIO_INFO_LINEAR_24) 602 snd_iprintf(buffer, " linear24"); 603 snd_iprintf(buffer, "\n"); 604 snd_iprintf(buffer, "Input Source: %s\n", vx_is_pcmcia(chip) ? 605 audio_src_vxp[chip->audio_source] : 606 audio_src_vx2[chip->audio_source]); 607 snd_iprintf(buffer, "Clock Mode: %s\n", clock_mode[chip->clock_mode]); 608 snd_iprintf(buffer, "Clock Source: %s\n", clock_src[chip->clock_source]); 609 snd_iprintf(buffer, "Frequency: %d\n", chip->freq); 610 snd_iprintf(buffer, "Detected Frequency: %d\n", chip->freq_detected); 611 snd_iprintf(buffer, "Detected UER type: %s\n", uer_type[chip->uer_detected]); 612 snd_iprintf(buffer, "Min/Max/Cur IBL: %d/%d/%d (granularity=%d)\n", 613 chip->ibl.min_size, chip->ibl.max_size, chip->ibl.size, 614 chip->ibl.granularity); 615} 616 617static void vx_proc_init(struct vx_core *chip) 618{ 619 struct snd_info_entry *entry; 620 621 if (! snd_card_proc_new(chip->card, "vx-status", &entry)) 622 snd_info_set_text_ops(entry, chip, vx_proc_read); 623} 624 625 626/** 627 * snd_vx_dsp_boot - load the DSP boot 628 */ 629int snd_vx_dsp_boot(struct vx_core *chip, const struct firmware *boot) 630{ 631 int err; 632 int cold_reset = !(chip->chip_status & VX_STAT_DEVICE_INIT); 633 634 vx_reset_board(chip, cold_reset); 635 vx_validate_irq(chip, 0); 636 637 if ((err = snd_vx_load_boot_image(chip, boot)) < 0) 638 return err; 639 msleep(10); 640 641 return 0; 642} 643 644EXPORT_SYMBOL(snd_vx_dsp_boot); 645 646/** 647 * snd_vx_dsp_load - load the DSP image 648 */ 649int snd_vx_dsp_load(struct vx_core *chip, const struct firmware *dsp) 650{ 651 unsigned int i; 652 int err; 653 unsigned int csum = 0; 654 const unsigned char *image, *cptr; 655 656 if (dsp->size % 3) 657 return -EINVAL; 658 659 vx_toggle_dac_mute(chip, 1); 660 661 /* Transfert data buffer from PC to DSP */ 662 for (i = 0; i < dsp->size; i += 3) { 663 image = dsp->data + i; 664 /* Wait DSP ready for a new read */ 665 if ((err = vx_wait_isr_bit(chip, ISR_TX_EMPTY)) < 0) { 666 printk(KERN_ERR 667 "dsp loading error at position %d\n", i); 668 return err; 669 } 670 cptr = image; 671 csum ^= *cptr; 672 csum = (csum >> 24) | (csum << 8); 673 vx_outb(chip, TXH, *cptr++); 674 csum ^= *cptr; 675 csum = (csum >> 24) | (csum << 8); 676 vx_outb(chip, TXM, *cptr++); 677 csum ^= *cptr; 678 csum = (csum >> 24) | (csum << 8); 679 vx_outb(chip, TXL, *cptr++); 680 } 681 snd_printdd(KERN_DEBUG "checksum = 0x%08x\n", csum); 682 683 msleep(200); 684 685 if ((err = vx_wait_isr_bit(chip, ISR_CHK)) < 0) 686 return err; 687 688 vx_toggle_dac_mute(chip, 0); 689 690 vx_test_and_ack(chip); 691 vx_validate_irq(chip, 1); 692 693 return 0; 694} 695 696EXPORT_SYMBOL(snd_vx_dsp_load); 697 698#ifdef CONFIG_PM 699/* 700 * suspend 701 */ 702int snd_vx_suspend(struct vx_core *chip, pm_message_t state) 703{ 704 unsigned int i; 705 706 snd_power_change_state(chip->card, SNDRV_CTL_POWER_D3hot); 707 chip->chip_status |= VX_STAT_IN_SUSPEND; 708 for (i = 0; i < chip->hw->num_codecs; i++) 709 snd_pcm_suspend_all(chip->pcm[i]); 710 711 return 0; 712} 713 714EXPORT_SYMBOL(snd_vx_suspend); 715 716/* 717 * resume 718 */ 719int snd_vx_resume(struct vx_core *chip) 720{ 721 int i, err; 722 723 chip->chip_status &= ~VX_STAT_CHIP_INIT; 724 725 for (i = 0; i < 4; i++) { 726 if (! chip->firmware[i]) 727 continue; 728 err = chip->ops->load_dsp(chip, i, chip->firmware[i]); 729 if (err < 0) { 730 snd_printk(KERN_ERR "vx: firmware resume error at DSP %d\n", i); 731 return -EIO; 732 } 733 } 734 735 chip->chip_status |= VX_STAT_CHIP_INIT; 736 chip->chip_status &= ~VX_STAT_IN_SUSPEND; 737 738 snd_power_change_state(chip->card, SNDRV_CTL_POWER_D0); 739 return 0; 740} 741 742EXPORT_SYMBOL(snd_vx_resume); 743#endif 744 745/** 746 * snd_vx_create - constructor for struct vx_core 747 * @hw: hardware specific record 748 * 749 * this function allocates the instance and prepare for the hardware 750 * initialization. 751 * 752 * return the instance pointer if successful, NULL in error. 753 */ 754struct vx_core *snd_vx_create(struct snd_card *card, struct snd_vx_hardware *hw, 755 struct snd_vx_ops *ops, 756 int extra_size) 757{ 758 struct vx_core *chip; 759 760 if (snd_BUG_ON(!card || !hw || !ops)) 761 return NULL; 762 763 chip = kzalloc(sizeof(*chip) + extra_size, GFP_KERNEL); 764 if (! chip) { 765 snd_printk(KERN_ERR "vx_core: no memory\n"); 766 return NULL; 767 } 768 spin_lock_init(&chip->lock); 769 spin_lock_init(&chip->irq_lock); 770 chip->irq = -1; 771 chip->hw = hw; 772 chip->type = hw->type; 773 chip->ops = ops; 774 tasklet_init(&chip->tq, vx_interrupt, (unsigned long)chip); 775 mutex_init(&chip->mixer_mutex); 776 777 chip->card = card; 778 card->private_data = chip; 779 strcpy(card->driver, hw->name); 780 sprintf(card->shortname, "Digigram %s", hw->name); 781 782 vx_proc_init(chip); 783 784 return chip; 785} 786 787EXPORT_SYMBOL(snd_vx_create); 788 789/* 790 * module entries 791 */ 792static int __init alsa_vx_core_init(void) 793{ 794 return 0; 795} 796 797static void __exit alsa_vx_core_exit(void) 798{ 799} 800 801module_init(alsa_vx_core_init) 802module_exit(alsa_vx_core_exit) 803