1/* 2 * USB ConnectTech WhiteHEAT driver 3 * 4 * Copyright (C) 2002 5 * Connect Tech Inc. 6 * 7 * Copyright (C) 1999, 2000 8 * Greg Kroah-Hartman (greg@kroah.com) 9 * 10 * This program is free software; you can redistribute it and/or modify 11 * it under the terms of the GNU General Public License as published by 12 * the Free Software Foundation; either version 2 of the License, or 13 * (at your option) any later version. 14 * 15 * See Documentation/usb/usb-serial.txt for more information on using this 16 * driver 17 * 18 */ 19 20#ifndef __LINUX_USB_SERIAL_WHITEHEAT_H 21#define __LINUX_USB_SERIAL_WHITEHEAT_H 22 23 24/* WhiteHEAT commands */ 25#define WHITEHEAT_OPEN 1 /* open the port */ 26#define WHITEHEAT_CLOSE 2 /* close the port */ 27#define WHITEHEAT_SETUP_PORT 3 /* change port settings */ 28#define WHITEHEAT_SET_RTS 4 /* turn RTS on or off */ 29#define WHITEHEAT_SET_DTR 5 /* turn DTR on or off */ 30#define WHITEHEAT_SET_BREAK 6 /* turn BREAK on or off */ 31#define WHITEHEAT_DUMP 7 /* dump memory */ 32#define WHITEHEAT_STATUS 8 /* get status */ 33#define WHITEHEAT_PURGE 9 /* clear the UART fifos */ 34#define WHITEHEAT_GET_DTR_RTS 10 /* get the state of DTR and RTS 35 for a port */ 36#define WHITEHEAT_GET_HW_INFO 11 /* get EEPROM info and 37 hardware ID */ 38#define WHITEHEAT_REPORT_TX_DONE 12 /* get the next TX done */ 39#define WHITEHEAT_EVENT 13 /* unsolicited status events */ 40#define WHITEHEAT_ECHO 14 /* send data to the indicated 41 IN endpoint */ 42#define WHITEHEAT_DO_TEST 15 /* perform specified test */ 43#define WHITEHEAT_CMD_COMPLETE 16 /* reply for some commands */ 44#define WHITEHEAT_CMD_FAILURE 17 /* reply for failed commands */ 45 46 47/* 48 * Commands to the firmware 49 */ 50 51 52/* 53 * WHITEHEAT_OPEN 54 * WHITEHEAT_CLOSE 55 * WHITEHEAT_STATUS 56 * WHITEHEAT_GET_DTR_RTS 57 * WHITEHEAT_REPORT_TX_DONE 58*/ 59struct whiteheat_simple { 60 __u8 port; /* port number (1 to N) */ 61}; 62 63 64/* 65 * WHITEHEAT_SETUP_PORT 66 */ 67#define WHITEHEAT_PAR_NONE 'n' /* no parity */ 68#define WHITEHEAT_PAR_EVEN 'e' /* even parity */ 69#define WHITEHEAT_PAR_ODD 'o' /* odd parity */ 70#define WHITEHEAT_PAR_SPACE '0' /* space (force 0) parity */ 71#define WHITEHEAT_PAR_MARK '1' /* mark (force 1) parity */ 72 73#define WHITEHEAT_SFLOW_NONE 'n' /* no software flow control */ 74#define WHITEHEAT_SFLOW_RX 'r' /* XOFF/ON is sent when RX 75 fills/empties */ 76#define WHITEHEAT_SFLOW_TX 't' /* when received XOFF/ON will 77 stop/start TX */ 78#define WHITEHEAT_SFLOW_RXTX 'b' /* both SFLOW_RX and SFLOW_TX */ 79 80#define WHITEHEAT_HFLOW_NONE 0x00 /* no hardware flow control */ 81#define WHITEHEAT_HFLOW_RTS_TOGGLE 0x01 /* RTS is on during transmit, 82 off otherwise */ 83#define WHITEHEAT_HFLOW_DTR 0x02 /* DTR is off/on when RX 84 fills/empties */ 85#define WHITEHEAT_HFLOW_CTS 0x08 /* when received CTS off/on 86 will stop/start TX */ 87#define WHITEHEAT_HFLOW_DSR 0x10 /* when received DSR off/on 88 will stop/start TX */ 89#define WHITEHEAT_HFLOW_RTS 0x80 /* RTS is off/on when RX 90 fills/empties */ 91 92struct whiteheat_port_settings { 93 __u8 port; /* port number (1 to N) */ 94 __u32 baud; /* any value 7 - 460800, firmware calculates 95 best fit; arrives little endian */ 96 __u8 bits; /* 5, 6, 7, or 8 */ 97 __u8 stop; /* 1 or 2, default 1 (2 = 1.5 if bits = 5) */ 98 __u8 parity; /* see WHITEHEAT_PAR_* above */ 99 __u8 sflow; /* see WHITEHEAT_SFLOW_* above */ 100 __u8 xoff; /* XOFF byte value */ 101 __u8 xon; /* XON byte value */ 102 __u8 hflow; /* see WHITEHEAT_HFLOW_* above */ 103 __u8 lloop; /* 0/1 turns local loopback mode off/on */ 104} __attribute__ ((packed)); 105 106 107/* 108 * WHITEHEAT_SET_RTS 109 * WHITEHEAT_SET_DTR 110 * WHITEHEAT_SET_BREAK 111 */ 112#define WHITEHEAT_RTS_OFF 0x00 113#define WHITEHEAT_RTS_ON 0x01 114#define WHITEHEAT_DTR_OFF 0x00 115#define WHITEHEAT_DTR_ON 0x01 116#define WHITEHEAT_BREAK_OFF 0x00 117#define WHITEHEAT_BREAK_ON 0x01 118 119struct whiteheat_set_rdb { 120 __u8 port; /* port number (1 to N) */ 121 __u8 state; /* 0/1 turns signal off/on */ 122}; 123 124 125/* 126 * WHITEHEAT_DUMP 127 */ 128#define WHITEHEAT_DUMP_MEM_DATA 'd' /* data */ 129#define WHITEHEAT_DUMP_MEM_IDATA 'i' /* idata */ 130#define WHITEHEAT_DUMP_MEM_BDATA 'b' /* bdata */ 131#define WHITEHEAT_DUMP_MEM_XDATA 'x' /* xdata */ 132 133/* 134 * Allowable address ranges (firmware checks address): 135 * Type DATA: 0x00 - 0xff 136 * Type IDATA: 0x80 - 0xff 137 * Type BDATA: 0x20 - 0x2f 138 * Type XDATA: 0x0000 - 0xffff 139 * 140 * B/I/DATA all read the local memory space 141 * XDATA reads the external memory space 142 * BDATA returns bits as bytes 143 * 144 * NOTE: 0x80 - 0xff (local space) are the Special Function Registers 145 * of the 8051, and some have on-read side-effects. 146 */ 147 148struct whiteheat_dump { 149 __u8 mem_type; /* see WHITEHEAT_DUMP_* above */ 150 __u16 addr; /* address, see restrictions above */ 151 __u16 length; /* number of bytes to dump, max 63 bytes */ 152}; 153 154 155/* 156 * WHITEHEAT_PURGE 157 */ 158#define WHITEHEAT_PURGE_RX 0x01 /* purge rx fifos */ 159#define WHITEHEAT_PURGE_TX 0x02 /* purge tx fifos */ 160 161struct whiteheat_purge { 162 __u8 port; /* port number (1 to N) */ 163 __u8 what; /* bit pattern of what to purge */ 164}; 165 166 167/* 168 * WHITEHEAT_ECHO 169 */ 170struct whiteheat_echo { 171 __u8 port; /* port number (1 to N) */ 172 __u8 length; /* length of message to echo, max 61 bytes */ 173 __u8 echo_data[61]; /* data to echo */ 174}; 175 176 177/* 178 * WHITEHEAT_DO_TEST 179 */ 180#define WHITEHEAT_TEST_UART_RW 0x01 /* read/write uart registers */ 181#define WHITEHEAT_TEST_UART_INTR 0x02 /* uart interrupt */ 182#define WHITEHEAT_TEST_SETUP_CONT 0x03 /* setup for 183 PORT_CONT/PORT_DISCONT */ 184#define WHITEHEAT_TEST_PORT_CONT 0x04 /* port connect */ 185#define WHITEHEAT_TEST_PORT_DISCONT 0x05 /* port disconnect */ 186#define WHITEHEAT_TEST_UART_CLK_START 0x06 /* uart clock test start */ 187#define WHITEHEAT_TEST_UART_CLK_STOP 0x07 /* uart clock test stop */ 188#define WHITEHEAT_TEST_MODEM_FT 0x08 /* modem signals, requires a 189 loopback cable/connector */ 190#define WHITEHEAT_TEST_ERASE_EEPROM 0x09 /* erase eeprom */ 191#define WHITEHEAT_TEST_READ_EEPROM 0x0a /* read eeprom */ 192#define WHITEHEAT_TEST_PROGRAM_EEPROM 0x0b /* program eeprom */ 193 194struct whiteheat_test { 195 __u8 port; /* port number (1 to n) */ 196 __u8 test; /* see WHITEHEAT_TEST_* above*/ 197 __u8 info[32]; /* additional info */ 198}; 199 200 201/* 202 * Replies from the firmware 203 */ 204 205 206/* 207 * WHITEHEAT_STATUS 208 */ 209#define WHITEHEAT_EVENT_MODEM 0x01 /* modem field is valid */ 210#define WHITEHEAT_EVENT_ERROR 0x02 /* error field is valid */ 211#define WHITEHEAT_EVENT_FLOW 0x04 /* flow field is valid */ 212#define WHITEHEAT_EVENT_CONNECT 0x08 /* connect field is valid */ 213 214#define WHITEHEAT_FLOW_NONE 0x00 /* no flow control active */ 215#define WHITEHEAT_FLOW_HARD_OUT 0x01 /* TX is stopped by CTS 216 (waiting for CTS to go on) */ 217#define WHITEHEAT_FLOW_HARD_IN 0x02 /* remote TX is stopped 218 by RTS */ 219#define WHITEHEAT_FLOW_SOFT_OUT 0x04 /* TX is stopped by XOFF 220 received (waiting for XON) */ 221#define WHITEHEAT_FLOW_SOFT_IN 0x08 /* remote TX is stopped by XOFF 222 transmitted */ 223#define WHITEHEAT_FLOW_TX_DONE 0x80 /* TX has completed */ 224 225struct whiteheat_status_info { 226 __u8 port; /* port number (1 to N) */ 227 __u8 event; /* indicates what the current event is, 228 see WHITEHEAT_EVENT_* above */ 229 __u8 modem; /* modem signal status (copy of uart's 230 MSR register) */ 231 __u8 error; /* line status (copy of uart's LSR register) */ 232 __u8 flow; /* flow control state, see WHITEHEAT_FLOW_* 233 above */ 234 __u8 connect; /* 0 means not connected, non-zero means 235 connected */ 236}; 237 238 239/* 240 * WHITEHEAT_GET_DTR_RTS 241 */ 242struct whiteheat_dr_info { 243 __u8 mcr; /* copy of uart's MCR register */ 244}; 245 246 247/* 248 * WHITEHEAT_GET_HW_INFO 249 */ 250struct whiteheat_hw_info { 251 __u8 hw_id; /* hardware id number, WhiteHEAT = 0 */ 252 __u8 sw_major_rev; /* major version number */ 253 __u8 sw_minor_rev; /* minor version number */ 254 struct whiteheat_hw_eeprom_info { 255 __u8 b0; /* B0 */ 256 __u8 vendor_id_low; /* vendor id (low byte) */ 257 __u8 vendor_id_high; /* vendor id (high byte) */ 258 __u8 product_id_low; /* product id (low byte) */ 259 __u8 product_id_high; /* product id (high byte) */ 260 __u8 device_id_low; /* device id (low byte) */ 261 __u8 device_id_high; /* device id (high byte) */ 262 __u8 not_used_1; 263 __u8 serial_number_0; /* serial number (low byte) */ 264 __u8 serial_number_1; /* serial number */ 265 __u8 serial_number_2; /* serial number */ 266 __u8 serial_number_3; /* serial number (high byte) */ 267 __u8 not_used_2; 268 __u8 not_used_3; 269 __u8 checksum_low; /* checksum (low byte) */ 270 __u8 checksum_high; /* checksum (high byte */ 271 } hw_eeprom_info; /* EEPROM contents */ 272}; 273 274 275/* 276 * WHITEHEAT_EVENT 277 */ 278struct whiteheat_event_info { 279 __u8 port; /* port number (1 to N) */ 280 __u8 event; /* see whiteheat_status_info.event */ 281 __u8 info; /* see whiteheat_status_info.modem, .error, 282 .flow, .connect */ 283}; 284 285 286/* 287 * WHITEHEAT_DO_TEST 288 */ 289#define WHITEHEAT_TEST_FAIL 0x00 /* test failed */ 290#define WHITEHEAT_TEST_UNKNOWN 0x01 /* unknown test requested */ 291#define WHITEHEAT_TEST_PASS 0xff /* test passed */ 292 293struct whiteheat_test_info { 294 __u8 port; /* port number (1 to N) */ 295 __u8 test; /* indicates which test this is a response for, 296 see WHITEHEAT_DO_TEST above */ 297 __u8 status; /* see WHITEHEAT_TEST_* above */ 298 __u8 results[32]; /* test-dependent results */ 299}; 300 301 302#endif 303