1/* 2 * R8A66597 UDC (USB gadget) 3 * 4 * Copyright (C) 2006-2009 Renesas Solutions Corp. 5 * 6 * Author : Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License as published by 10 * the Free Software Foundation; version 2 of the License. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * GNU General Public License for more details. 16 * 17 * You should have received a copy of the GNU General Public License 18 * along with this program; if not, write to the Free Software 19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA 20 * 21 */ 22 23#include <linux/module.h> 24#include <linux/interrupt.h> 25#include <linux/delay.h> 26#include <linux/io.h> 27#include <linux/platform_device.h> 28#include <linux/clk.h> 29#include <linux/err.h> 30#include <linux/slab.h> 31 32#include <linux/usb/ch9.h> 33#include <linux/usb/gadget.h> 34 35#include "r8a66597-udc.h" 36 37#define DRIVER_VERSION "2009-08-18" 38 39static const char udc_name[] = "r8a66597_udc"; 40static const char *r8a66597_ep_name[] = { 41 "ep0", "ep1", "ep2", "ep3", "ep4", "ep5", "ep6", "ep7", 42 "ep8", "ep9", 43}; 44 45static void disable_controller(struct r8a66597 *r8a66597); 46static void irq_ep0_write(struct r8a66597_ep *ep, struct r8a66597_request *req); 47static void irq_packet_write(struct r8a66597_ep *ep, 48 struct r8a66597_request *req); 49static int r8a66597_queue(struct usb_ep *_ep, struct usb_request *_req, 50 gfp_t gfp_flags); 51 52static void transfer_complete(struct r8a66597_ep *ep, 53 struct r8a66597_request *req, int status); 54 55/*-------------------------------------------------------------------------*/ 56static inline u16 get_usb_speed(struct r8a66597 *r8a66597) 57{ 58 return r8a66597_read(r8a66597, DVSTCTR0) & RHST; 59} 60 61static void enable_pipe_irq(struct r8a66597 *r8a66597, u16 pipenum, 62 unsigned long reg) 63{ 64 u16 tmp; 65 66 tmp = r8a66597_read(r8a66597, INTENB0); 67 r8a66597_bclr(r8a66597, BEMPE | NRDYE | BRDYE, 68 INTENB0); 69 r8a66597_bset(r8a66597, (1 << pipenum), reg); 70 r8a66597_write(r8a66597, tmp, INTENB0); 71} 72 73static void disable_pipe_irq(struct r8a66597 *r8a66597, u16 pipenum, 74 unsigned long reg) 75{ 76 u16 tmp; 77 78 tmp = r8a66597_read(r8a66597, INTENB0); 79 r8a66597_bclr(r8a66597, BEMPE | NRDYE | BRDYE, 80 INTENB0); 81 r8a66597_bclr(r8a66597, (1 << pipenum), reg); 82 r8a66597_write(r8a66597, tmp, INTENB0); 83} 84 85static void r8a66597_usb_connect(struct r8a66597 *r8a66597) 86{ 87 r8a66597_bset(r8a66597, CTRE, INTENB0); 88 r8a66597_bset(r8a66597, BEMPE | BRDYE, INTENB0); 89 90 r8a66597_bset(r8a66597, DPRPU, SYSCFG0); 91} 92 93static void r8a66597_usb_disconnect(struct r8a66597 *r8a66597) 94__releases(r8a66597->lock) 95__acquires(r8a66597->lock) 96{ 97 r8a66597_bclr(r8a66597, CTRE, INTENB0); 98 r8a66597_bclr(r8a66597, BEMPE | BRDYE, INTENB0); 99 r8a66597_bclr(r8a66597, DPRPU, SYSCFG0); 100 101 r8a66597->gadget.speed = USB_SPEED_UNKNOWN; 102 spin_unlock(&r8a66597->lock); 103 r8a66597->driver->disconnect(&r8a66597->gadget); 104 spin_lock(&r8a66597->lock); 105 106 disable_controller(r8a66597); 107 INIT_LIST_HEAD(&r8a66597->ep[0].queue); 108} 109 110static inline u16 control_reg_get_pid(struct r8a66597 *r8a66597, u16 pipenum) 111{ 112 u16 pid = 0; 113 unsigned long offset; 114 115 if (pipenum == 0) 116 pid = r8a66597_read(r8a66597, DCPCTR) & PID; 117 else if (pipenum < R8A66597_MAX_NUM_PIPE) { 118 offset = get_pipectr_addr(pipenum); 119 pid = r8a66597_read(r8a66597, offset) & PID; 120 } else 121 printk(KERN_ERR "unexpect pipe num (%d)\n", pipenum); 122 123 return pid; 124} 125 126static inline void control_reg_set_pid(struct r8a66597 *r8a66597, u16 pipenum, 127 u16 pid) 128{ 129 unsigned long offset; 130 131 if (pipenum == 0) 132 r8a66597_mdfy(r8a66597, pid, PID, DCPCTR); 133 else if (pipenum < R8A66597_MAX_NUM_PIPE) { 134 offset = get_pipectr_addr(pipenum); 135 r8a66597_mdfy(r8a66597, pid, PID, offset); 136 } else 137 printk(KERN_ERR "unexpect pipe num (%d)\n", pipenum); 138} 139 140static inline void pipe_start(struct r8a66597 *r8a66597, u16 pipenum) 141{ 142 control_reg_set_pid(r8a66597, pipenum, PID_BUF); 143} 144 145static inline void pipe_stop(struct r8a66597 *r8a66597, u16 pipenum) 146{ 147 control_reg_set_pid(r8a66597, pipenum, PID_NAK); 148} 149 150static inline void pipe_stall(struct r8a66597 *r8a66597, u16 pipenum) 151{ 152 control_reg_set_pid(r8a66597, pipenum, PID_STALL); 153} 154 155static inline u16 control_reg_get(struct r8a66597 *r8a66597, u16 pipenum) 156{ 157 u16 ret = 0; 158 unsigned long offset; 159 160 if (pipenum == 0) 161 ret = r8a66597_read(r8a66597, DCPCTR); 162 else if (pipenum < R8A66597_MAX_NUM_PIPE) { 163 offset = get_pipectr_addr(pipenum); 164 ret = r8a66597_read(r8a66597, offset); 165 } else 166 printk(KERN_ERR "unexpect pipe num (%d)\n", pipenum); 167 168 return ret; 169} 170 171static inline void control_reg_sqclr(struct r8a66597 *r8a66597, u16 pipenum) 172{ 173 unsigned long offset; 174 175 pipe_stop(r8a66597, pipenum); 176 177 if (pipenum == 0) 178 r8a66597_bset(r8a66597, SQCLR, DCPCTR); 179 else if (pipenum < R8A66597_MAX_NUM_PIPE) { 180 offset = get_pipectr_addr(pipenum); 181 r8a66597_bset(r8a66597, SQCLR, offset); 182 } else 183 printk(KERN_ERR "unexpect pipe num(%d)\n", pipenum); 184} 185 186static inline int get_buffer_size(struct r8a66597 *r8a66597, u16 pipenum) 187{ 188 u16 tmp; 189 int size; 190 191 if (pipenum == 0) { 192 tmp = r8a66597_read(r8a66597, DCPCFG); 193 if ((tmp & R8A66597_CNTMD) != 0) 194 size = 256; 195 else { 196 tmp = r8a66597_read(r8a66597, DCPMAXP); 197 size = tmp & MAXP; 198 } 199 } else { 200 r8a66597_write(r8a66597, pipenum, PIPESEL); 201 tmp = r8a66597_read(r8a66597, PIPECFG); 202 if ((tmp & R8A66597_CNTMD) != 0) { 203 tmp = r8a66597_read(r8a66597, PIPEBUF); 204 size = ((tmp >> 10) + 1) * 64; 205 } else { 206 tmp = r8a66597_read(r8a66597, PIPEMAXP); 207 size = tmp & MXPS; 208 } 209 } 210 211 return size; 212} 213 214static inline unsigned short mbw_value(struct r8a66597 *r8a66597) 215{ 216 if (r8a66597->pdata->on_chip) 217 return MBW_32; 218 else 219 return MBW_16; 220} 221 222static inline void pipe_change(struct r8a66597 *r8a66597, u16 pipenum) 223{ 224 struct r8a66597_ep *ep = r8a66597->pipenum2ep[pipenum]; 225 226 if (ep->use_dma) 227 return; 228 229 r8a66597_mdfy(r8a66597, pipenum, CURPIPE, ep->fifosel); 230 231 ndelay(450); 232 233 r8a66597_bset(r8a66597, mbw_value(r8a66597), ep->fifosel); 234} 235 236static int pipe_buffer_setting(struct r8a66597 *r8a66597, 237 struct r8a66597_pipe_info *info) 238{ 239 u16 bufnum = 0, buf_bsize = 0; 240 u16 pipecfg = 0; 241 242 if (info->pipe == 0) 243 return -EINVAL; 244 245 r8a66597_write(r8a66597, info->pipe, PIPESEL); 246 247 if (info->dir_in) 248 pipecfg |= R8A66597_DIR; 249 pipecfg |= info->type; 250 pipecfg |= info->epnum; 251 switch (info->type) { 252 case R8A66597_INT: 253 bufnum = 4 + (info->pipe - R8A66597_BASE_PIPENUM_INT); 254 buf_bsize = 0; 255 break; 256 case R8A66597_BULK: 257 /* isochronous pipes may be used as bulk pipes */ 258 if (info->pipe > R8A66597_BASE_PIPENUM_BULK) 259 bufnum = info->pipe - R8A66597_BASE_PIPENUM_BULK; 260 else 261 bufnum = info->pipe - R8A66597_BASE_PIPENUM_ISOC; 262 263 bufnum = R8A66597_BASE_BUFNUM + (bufnum * 16); 264 buf_bsize = 7; 265 pipecfg |= R8A66597_DBLB; 266 if (!info->dir_in) 267 pipecfg |= R8A66597_SHTNAK; 268 break; 269 case R8A66597_ISO: 270 bufnum = R8A66597_BASE_BUFNUM + 271 (info->pipe - R8A66597_BASE_PIPENUM_ISOC) * 16; 272 buf_bsize = 7; 273 break; 274 } 275 276 if (buf_bsize && ((bufnum + 16) >= R8A66597_MAX_BUFNUM)) { 277 pr_err(KERN_ERR "r8a66597 pipe memory is insufficient\n"); 278 return -ENOMEM; 279 } 280 281 r8a66597_write(r8a66597, pipecfg, PIPECFG); 282 r8a66597_write(r8a66597, (buf_bsize << 10) | (bufnum), PIPEBUF); 283 r8a66597_write(r8a66597, info->maxpacket, PIPEMAXP); 284 if (info->interval) 285 info->interval--; 286 r8a66597_write(r8a66597, info->interval, PIPEPERI); 287 288 return 0; 289} 290 291static void pipe_buffer_release(struct r8a66597 *r8a66597, 292 struct r8a66597_pipe_info *info) 293{ 294 if (info->pipe == 0) 295 return; 296 297 if (is_bulk_pipe(info->pipe)) 298 r8a66597->bulk--; 299 else if (is_interrupt_pipe(info->pipe)) 300 r8a66597->interrupt--; 301 else if (is_isoc_pipe(info->pipe)) { 302 r8a66597->isochronous--; 303 if (info->type == R8A66597_BULK) 304 r8a66597->bulk--; 305 } else 306 printk(KERN_ERR "ep_release: unexpect pipenum (%d)\n", 307 info->pipe); 308} 309 310static void pipe_initialize(struct r8a66597_ep *ep) 311{ 312 struct r8a66597 *r8a66597 = ep->r8a66597; 313 314 r8a66597_mdfy(r8a66597, 0, CURPIPE, ep->fifosel); 315 316 r8a66597_write(r8a66597, ACLRM, ep->pipectr); 317 r8a66597_write(r8a66597, 0, ep->pipectr); 318 r8a66597_write(r8a66597, SQCLR, ep->pipectr); 319 if (ep->use_dma) { 320 r8a66597_mdfy(r8a66597, ep->pipenum, CURPIPE, ep->fifosel); 321 322 ndelay(450); 323 324 r8a66597_bset(r8a66597, mbw_value(r8a66597), ep->fifosel); 325 } 326} 327 328static void r8a66597_ep_setting(struct r8a66597 *r8a66597, 329 struct r8a66597_ep *ep, 330 const struct usb_endpoint_descriptor *desc, 331 u16 pipenum, int dma) 332{ 333 ep->use_dma = 0; 334 ep->fifoaddr = CFIFO; 335 ep->fifosel = CFIFOSEL; 336 ep->fifoctr = CFIFOCTR; 337 ep->fifotrn = 0; 338 339 ep->pipectr = get_pipectr_addr(pipenum); 340 ep->pipenum = pipenum; 341 ep->ep.maxpacket = le16_to_cpu(desc->wMaxPacketSize); 342 r8a66597->pipenum2ep[pipenum] = ep; 343 r8a66597->epaddr2ep[desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK] 344 = ep; 345 INIT_LIST_HEAD(&ep->queue); 346} 347 348static void r8a66597_ep_release(struct r8a66597_ep *ep) 349{ 350 struct r8a66597 *r8a66597 = ep->r8a66597; 351 u16 pipenum = ep->pipenum; 352 353 if (pipenum == 0) 354 return; 355 356 if (ep->use_dma) 357 r8a66597->num_dma--; 358 ep->pipenum = 0; 359 ep->busy = 0; 360 ep->use_dma = 0; 361} 362 363static int alloc_pipe_config(struct r8a66597_ep *ep, 364 const struct usb_endpoint_descriptor *desc) 365{ 366 struct r8a66597 *r8a66597 = ep->r8a66597; 367 struct r8a66597_pipe_info info; 368 int dma = 0; 369 unsigned char *counter; 370 int ret; 371 372 ep->desc = desc; 373 374 if (ep->pipenum) /* already allocated pipe */ 375 return 0; 376 377 switch (desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) { 378 case USB_ENDPOINT_XFER_BULK: 379 if (r8a66597->bulk >= R8A66597_MAX_NUM_BULK) { 380 if (r8a66597->isochronous >= R8A66597_MAX_NUM_ISOC) { 381 printk(KERN_ERR "bulk pipe is insufficient\n"); 382 return -ENODEV; 383 } else { 384 info.pipe = R8A66597_BASE_PIPENUM_ISOC 385 + r8a66597->isochronous; 386 counter = &r8a66597->isochronous; 387 } 388 } else { 389 info.pipe = R8A66597_BASE_PIPENUM_BULK + r8a66597->bulk; 390 counter = &r8a66597->bulk; 391 } 392 info.type = R8A66597_BULK; 393 dma = 1; 394 break; 395 case USB_ENDPOINT_XFER_INT: 396 if (r8a66597->interrupt >= R8A66597_MAX_NUM_INT) { 397 printk(KERN_ERR "interrupt pipe is insufficient\n"); 398 return -ENODEV; 399 } 400 info.pipe = R8A66597_BASE_PIPENUM_INT + r8a66597->interrupt; 401 info.type = R8A66597_INT; 402 counter = &r8a66597->interrupt; 403 break; 404 case USB_ENDPOINT_XFER_ISOC: 405 if (r8a66597->isochronous >= R8A66597_MAX_NUM_ISOC) { 406 printk(KERN_ERR "isochronous pipe is insufficient\n"); 407 return -ENODEV; 408 } 409 info.pipe = R8A66597_BASE_PIPENUM_ISOC + r8a66597->isochronous; 410 info.type = R8A66597_ISO; 411 counter = &r8a66597->isochronous; 412 break; 413 default: 414 printk(KERN_ERR "unexpect xfer type\n"); 415 return -EINVAL; 416 } 417 ep->type = info.type; 418 419 info.epnum = desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK; 420 info.maxpacket = le16_to_cpu(desc->wMaxPacketSize); 421 info.interval = desc->bInterval; 422 if (desc->bEndpointAddress & USB_ENDPOINT_DIR_MASK) 423 info.dir_in = 1; 424 else 425 info.dir_in = 0; 426 427 ret = pipe_buffer_setting(r8a66597, &info); 428 if (ret < 0) { 429 printk(KERN_ERR "pipe_buffer_setting fail\n"); 430 return ret; 431 } 432 433 (*counter)++; 434 if ((counter == &r8a66597->isochronous) && info.type == R8A66597_BULK) 435 r8a66597->bulk++; 436 437 r8a66597_ep_setting(r8a66597, ep, desc, info.pipe, dma); 438 pipe_initialize(ep); 439 440 return 0; 441} 442 443static int free_pipe_config(struct r8a66597_ep *ep) 444{ 445 struct r8a66597 *r8a66597 = ep->r8a66597; 446 struct r8a66597_pipe_info info; 447 448 info.pipe = ep->pipenum; 449 info.type = ep->type; 450 pipe_buffer_release(r8a66597, &info); 451 r8a66597_ep_release(ep); 452 453 return 0; 454} 455 456/*-------------------------------------------------------------------------*/ 457static void pipe_irq_enable(struct r8a66597 *r8a66597, u16 pipenum) 458{ 459 enable_irq_ready(r8a66597, pipenum); 460 enable_irq_nrdy(r8a66597, pipenum); 461} 462 463static void pipe_irq_disable(struct r8a66597 *r8a66597, u16 pipenum) 464{ 465 disable_irq_ready(r8a66597, pipenum); 466 disable_irq_nrdy(r8a66597, pipenum); 467} 468 469/* if complete is true, gadget driver complete function is not call */ 470static void control_end(struct r8a66597 *r8a66597, unsigned ccpl) 471{ 472 r8a66597->ep[0].internal_ccpl = ccpl; 473 pipe_start(r8a66597, 0); 474 r8a66597_bset(r8a66597, CCPL, DCPCTR); 475} 476 477static void start_ep0_write(struct r8a66597_ep *ep, 478 struct r8a66597_request *req) 479{ 480 struct r8a66597 *r8a66597 = ep->r8a66597; 481 482 pipe_change(r8a66597, ep->pipenum); 483 r8a66597_mdfy(r8a66597, ISEL, (ISEL | CURPIPE), CFIFOSEL); 484 r8a66597_write(r8a66597, BCLR, ep->fifoctr); 485 if (req->req.length == 0) { 486 r8a66597_bset(r8a66597, BVAL, ep->fifoctr); 487 pipe_start(r8a66597, 0); 488 transfer_complete(ep, req, 0); 489 } else { 490 r8a66597_write(r8a66597, ~BEMP0, BEMPSTS); 491 irq_ep0_write(ep, req); 492 } 493} 494 495static void start_packet_write(struct r8a66597_ep *ep, 496 struct r8a66597_request *req) 497{ 498 struct r8a66597 *r8a66597 = ep->r8a66597; 499 u16 tmp; 500 501 pipe_change(r8a66597, ep->pipenum); 502 disable_irq_empty(r8a66597, ep->pipenum); 503 pipe_start(r8a66597, ep->pipenum); 504 505 tmp = r8a66597_read(r8a66597, ep->fifoctr); 506 if (unlikely((tmp & FRDY) == 0)) 507 pipe_irq_enable(r8a66597, ep->pipenum); 508 else 509 irq_packet_write(ep, req); 510} 511 512static void start_packet_read(struct r8a66597_ep *ep, 513 struct r8a66597_request *req) 514{ 515 struct r8a66597 *r8a66597 = ep->r8a66597; 516 u16 pipenum = ep->pipenum; 517 518 if (ep->pipenum == 0) { 519 r8a66597_mdfy(r8a66597, 0, (ISEL | CURPIPE), CFIFOSEL); 520 r8a66597_write(r8a66597, BCLR, ep->fifoctr); 521 pipe_start(r8a66597, pipenum); 522 pipe_irq_enable(r8a66597, pipenum); 523 } else { 524 if (ep->use_dma) { 525 r8a66597_bset(r8a66597, TRCLR, ep->fifosel); 526 pipe_change(r8a66597, pipenum); 527 r8a66597_bset(r8a66597, TRENB, ep->fifosel); 528 r8a66597_write(r8a66597, 529 (req->req.length + ep->ep.maxpacket - 1) 530 / ep->ep.maxpacket, 531 ep->fifotrn); 532 } 533 pipe_start(r8a66597, pipenum); /* trigger once */ 534 pipe_irq_enable(r8a66597, pipenum); 535 } 536} 537 538static void start_packet(struct r8a66597_ep *ep, struct r8a66597_request *req) 539{ 540 if (ep->desc->bEndpointAddress & USB_DIR_IN) 541 start_packet_write(ep, req); 542 else 543 start_packet_read(ep, req); 544} 545 546static void start_ep0(struct r8a66597_ep *ep, struct r8a66597_request *req) 547{ 548 u16 ctsq; 549 550 ctsq = r8a66597_read(ep->r8a66597, INTSTS0) & CTSQ; 551 552 switch (ctsq) { 553 case CS_RDDS: 554 start_ep0_write(ep, req); 555 break; 556 case CS_WRDS: 557 start_packet_read(ep, req); 558 break; 559 560 case CS_WRND: 561 control_end(ep->r8a66597, 0); 562 break; 563 default: 564 printk(KERN_ERR "start_ep0: unexpect ctsq(%x)\n", ctsq); 565 break; 566 } 567} 568 569static void init_controller(struct r8a66597 *r8a66597) 570{ 571 u16 vif = r8a66597->pdata->vif ? LDRV : 0; 572 u16 irq_sense = r8a66597->irq_sense_low ? INTL : 0; 573 u16 endian = r8a66597->pdata->endian ? BIGEND : 0; 574 575 if (r8a66597->pdata->on_chip) { 576 r8a66597_bset(r8a66597, 0x04, SYSCFG1); 577 r8a66597_bset(r8a66597, HSE, SYSCFG0); 578 579 r8a66597_bclr(r8a66597, USBE, SYSCFG0); 580 r8a66597_bclr(r8a66597, DPRPU, SYSCFG0); 581 r8a66597_bset(r8a66597, USBE, SYSCFG0); 582 583 r8a66597_bset(r8a66597, SCKE, SYSCFG0); 584 585 r8a66597_bset(r8a66597, irq_sense, INTENB1); 586 r8a66597_write(r8a66597, BURST | CPU_ADR_RD_WR, 587 DMA0CFG); 588 } else { 589 r8a66597_bset(r8a66597, vif | endian, PINCFG); 590 r8a66597_bset(r8a66597, HSE, SYSCFG0); /* High spd */ 591 r8a66597_mdfy(r8a66597, get_xtal_from_pdata(r8a66597->pdata), 592 XTAL, SYSCFG0); 593 594 r8a66597_bclr(r8a66597, USBE, SYSCFG0); 595 r8a66597_bclr(r8a66597, DPRPU, SYSCFG0); 596 r8a66597_bset(r8a66597, USBE, SYSCFG0); 597 598 r8a66597_bset(r8a66597, XCKE, SYSCFG0); 599 600 msleep(3); 601 602 r8a66597_bset(r8a66597, PLLC, SYSCFG0); 603 604 msleep(1); 605 606 r8a66597_bset(r8a66597, SCKE, SYSCFG0); 607 608 r8a66597_bset(r8a66597, irq_sense, INTENB1); 609 r8a66597_write(r8a66597, BURST | CPU_ADR_RD_WR, 610 DMA0CFG); 611 } 612} 613 614static void disable_controller(struct r8a66597 *r8a66597) 615{ 616 if (r8a66597->pdata->on_chip) { 617 r8a66597_bset(r8a66597, SCKE, SYSCFG0); 618 619 /* disable interrupts */ 620 r8a66597_write(r8a66597, 0, INTENB0); 621 r8a66597_write(r8a66597, 0, INTENB1); 622 r8a66597_write(r8a66597, 0, BRDYENB); 623 r8a66597_write(r8a66597, 0, BEMPENB); 624 r8a66597_write(r8a66597, 0, NRDYENB); 625 626 /* clear status */ 627 r8a66597_write(r8a66597, 0, BRDYSTS); 628 r8a66597_write(r8a66597, 0, NRDYSTS); 629 r8a66597_write(r8a66597, 0, BEMPSTS); 630 631 r8a66597_bclr(r8a66597, USBE, SYSCFG0); 632 r8a66597_bclr(r8a66597, SCKE, SYSCFG0); 633 634 } else { 635 r8a66597_bclr(r8a66597, SCKE, SYSCFG0); 636 udelay(1); 637 r8a66597_bclr(r8a66597, PLLC, SYSCFG0); 638 udelay(1); 639 udelay(1); 640 r8a66597_bclr(r8a66597, XCKE, SYSCFG0); 641 } 642} 643 644static void r8a66597_start_xclock(struct r8a66597 *r8a66597) 645{ 646 u16 tmp; 647 648 if (!r8a66597->pdata->on_chip) { 649 tmp = r8a66597_read(r8a66597, SYSCFG0); 650 if (!(tmp & XCKE)) 651 r8a66597_bset(r8a66597, XCKE, SYSCFG0); 652 } 653} 654 655static struct r8a66597_request *get_request_from_ep(struct r8a66597_ep *ep) 656{ 657 return list_entry(ep->queue.next, struct r8a66597_request, queue); 658} 659 660/*-------------------------------------------------------------------------*/ 661static void transfer_complete(struct r8a66597_ep *ep, 662 struct r8a66597_request *req, int status) 663__releases(r8a66597->lock) 664__acquires(r8a66597->lock) 665{ 666 int restart = 0; 667 668 if (unlikely(ep->pipenum == 0)) { 669 if (ep->internal_ccpl) { 670 ep->internal_ccpl = 0; 671 return; 672 } 673 } 674 675 list_del_init(&req->queue); 676 if (ep->r8a66597->gadget.speed == USB_SPEED_UNKNOWN) 677 req->req.status = -ESHUTDOWN; 678 else 679 req->req.status = status; 680 681 if (!list_empty(&ep->queue)) 682 restart = 1; 683 684 spin_unlock(&ep->r8a66597->lock); 685 req->req.complete(&ep->ep, &req->req); 686 spin_lock(&ep->r8a66597->lock); 687 688 if (restart) { 689 req = get_request_from_ep(ep); 690 if (ep->desc) 691 start_packet(ep, req); 692 } 693} 694 695static void irq_ep0_write(struct r8a66597_ep *ep, struct r8a66597_request *req) 696{ 697 int i; 698 u16 tmp; 699 unsigned bufsize; 700 size_t size; 701 void *buf; 702 u16 pipenum = ep->pipenum; 703 struct r8a66597 *r8a66597 = ep->r8a66597; 704 705 pipe_change(r8a66597, pipenum); 706 r8a66597_bset(r8a66597, ISEL, ep->fifosel); 707 708 i = 0; 709 do { 710 tmp = r8a66597_read(r8a66597, ep->fifoctr); 711 if (i++ > 100000) { 712 printk(KERN_ERR "pipe0 is busy. maybe cpu i/o bus" 713 "conflict. please power off this controller."); 714 return; 715 } 716 ndelay(1); 717 } while ((tmp & FRDY) == 0); 718 719 /* prepare parameters */ 720 bufsize = get_buffer_size(r8a66597, pipenum); 721 buf = req->req.buf + req->req.actual; 722 size = min(bufsize, req->req.length - req->req.actual); 723 724 /* write fifo */ 725 if (req->req.buf) { 726 if (size > 0) 727 r8a66597_write_fifo(r8a66597, ep->fifoaddr, buf, size); 728 if ((size == 0) || ((size % ep->ep.maxpacket) != 0)) 729 r8a66597_bset(r8a66597, BVAL, ep->fifoctr); 730 } 731 732 /* update parameters */ 733 req->req.actual += size; 734 735 /* check transfer finish */ 736 if ((!req->req.zero && (req->req.actual == req->req.length)) 737 || (size % ep->ep.maxpacket) 738 || (size == 0)) { 739 disable_irq_ready(r8a66597, pipenum); 740 disable_irq_empty(r8a66597, pipenum); 741 } else { 742 disable_irq_ready(r8a66597, pipenum); 743 enable_irq_empty(r8a66597, pipenum); 744 } 745 pipe_start(r8a66597, pipenum); 746} 747 748static void irq_packet_write(struct r8a66597_ep *ep, 749 struct r8a66597_request *req) 750{ 751 u16 tmp; 752 unsigned bufsize; 753 size_t size; 754 void *buf; 755 u16 pipenum = ep->pipenum; 756 struct r8a66597 *r8a66597 = ep->r8a66597; 757 758 pipe_change(r8a66597, pipenum); 759 tmp = r8a66597_read(r8a66597, ep->fifoctr); 760 if (unlikely((tmp & FRDY) == 0)) { 761 pipe_stop(r8a66597, pipenum); 762 pipe_irq_disable(r8a66597, pipenum); 763 printk(KERN_ERR "write fifo not ready. pipnum=%d\n", pipenum); 764 return; 765 } 766 767 /* prepare parameters */ 768 bufsize = get_buffer_size(r8a66597, pipenum); 769 buf = req->req.buf + req->req.actual; 770 size = min(bufsize, req->req.length - req->req.actual); 771 772 /* write fifo */ 773 if (req->req.buf) { 774 r8a66597_write_fifo(r8a66597, ep->fifoaddr, buf, size); 775 if ((size == 0) 776 || ((size % ep->ep.maxpacket) != 0) 777 || ((bufsize != ep->ep.maxpacket) 778 && (bufsize > size))) 779 r8a66597_bset(r8a66597, BVAL, ep->fifoctr); 780 } 781 782 /* update parameters */ 783 req->req.actual += size; 784 /* check transfer finish */ 785 if ((!req->req.zero && (req->req.actual == req->req.length)) 786 || (size % ep->ep.maxpacket) 787 || (size == 0)) { 788 disable_irq_ready(r8a66597, pipenum); 789 enable_irq_empty(r8a66597, pipenum); 790 } else { 791 disable_irq_empty(r8a66597, pipenum); 792 pipe_irq_enable(r8a66597, pipenum); 793 } 794} 795 796static void irq_packet_read(struct r8a66597_ep *ep, 797 struct r8a66597_request *req) 798{ 799 u16 tmp; 800 int rcv_len, bufsize, req_len; 801 int size; 802 void *buf; 803 u16 pipenum = ep->pipenum; 804 struct r8a66597 *r8a66597 = ep->r8a66597; 805 int finish = 0; 806 807 pipe_change(r8a66597, pipenum); 808 tmp = r8a66597_read(r8a66597, ep->fifoctr); 809 if (unlikely((tmp & FRDY) == 0)) { 810 req->req.status = -EPIPE; 811 pipe_stop(r8a66597, pipenum); 812 pipe_irq_disable(r8a66597, pipenum); 813 printk(KERN_ERR "read fifo not ready"); 814 return; 815 } 816 817 /* prepare parameters */ 818 rcv_len = tmp & DTLN; 819 bufsize = get_buffer_size(r8a66597, pipenum); 820 821 buf = req->req.buf + req->req.actual; 822 req_len = req->req.length - req->req.actual; 823 if (rcv_len < bufsize) 824 size = min(rcv_len, req_len); 825 else 826 size = min(bufsize, req_len); 827 828 /* update parameters */ 829 req->req.actual += size; 830 831 /* check transfer finish */ 832 if ((!req->req.zero && (req->req.actual == req->req.length)) 833 || (size % ep->ep.maxpacket) 834 || (size == 0)) { 835 pipe_stop(r8a66597, pipenum); 836 pipe_irq_disable(r8a66597, pipenum); 837 finish = 1; 838 } 839 840 /* read fifo */ 841 if (req->req.buf) { 842 if (size == 0) 843 r8a66597_write(r8a66597, BCLR, ep->fifoctr); 844 else 845 r8a66597_read_fifo(r8a66597, ep->fifoaddr, buf, size); 846 847 } 848 849 if ((ep->pipenum != 0) && finish) 850 transfer_complete(ep, req, 0); 851} 852 853static void irq_pipe_ready(struct r8a66597 *r8a66597, u16 status, u16 enb) 854{ 855 u16 check; 856 u16 pipenum; 857 struct r8a66597_ep *ep; 858 struct r8a66597_request *req; 859 860 if ((status & BRDY0) && (enb & BRDY0)) { 861 r8a66597_write(r8a66597, ~BRDY0, BRDYSTS); 862 r8a66597_mdfy(r8a66597, 0, CURPIPE, CFIFOSEL); 863 864 ep = &r8a66597->ep[0]; 865 req = get_request_from_ep(ep); 866 irq_packet_read(ep, req); 867 } else { 868 for (pipenum = 1; pipenum < R8A66597_MAX_NUM_PIPE; pipenum++) { 869 check = 1 << pipenum; 870 if ((status & check) && (enb & check)) { 871 r8a66597_write(r8a66597, ~check, BRDYSTS); 872 ep = r8a66597->pipenum2ep[pipenum]; 873 req = get_request_from_ep(ep); 874 if (ep->desc->bEndpointAddress & USB_DIR_IN) 875 irq_packet_write(ep, req); 876 else 877 irq_packet_read(ep, req); 878 } 879 } 880 } 881} 882 883static void irq_pipe_empty(struct r8a66597 *r8a66597, u16 status, u16 enb) 884{ 885 u16 tmp; 886 u16 check; 887 u16 pipenum; 888 struct r8a66597_ep *ep; 889 struct r8a66597_request *req; 890 891 if ((status & BEMP0) && (enb & BEMP0)) { 892 r8a66597_write(r8a66597, ~BEMP0, BEMPSTS); 893 894 ep = &r8a66597->ep[0]; 895 req = get_request_from_ep(ep); 896 irq_ep0_write(ep, req); 897 } else { 898 for (pipenum = 1; pipenum < R8A66597_MAX_NUM_PIPE; pipenum++) { 899 check = 1 << pipenum; 900 if ((status & check) && (enb & check)) { 901 r8a66597_write(r8a66597, ~check, BEMPSTS); 902 tmp = control_reg_get(r8a66597, pipenum); 903 if ((tmp & INBUFM) == 0) { 904 disable_irq_empty(r8a66597, pipenum); 905 pipe_irq_disable(r8a66597, pipenum); 906 pipe_stop(r8a66597, pipenum); 907 ep = r8a66597->pipenum2ep[pipenum]; 908 req = get_request_from_ep(ep); 909 if (!list_empty(&ep->queue)) 910 transfer_complete(ep, req, 0); 911 } 912 } 913 } 914 } 915} 916 917static void get_status(struct r8a66597 *r8a66597, struct usb_ctrlrequest *ctrl) 918__releases(r8a66597->lock) 919__acquires(r8a66597->lock) 920{ 921 struct r8a66597_ep *ep; 922 u16 pid; 923 u16 status = 0; 924 u16 w_index = le16_to_cpu(ctrl->wIndex); 925 926 switch (ctrl->bRequestType & USB_RECIP_MASK) { 927 case USB_RECIP_DEVICE: 928 status = 1 << USB_DEVICE_SELF_POWERED; 929 break; 930 case USB_RECIP_INTERFACE: 931 status = 0; 932 break; 933 case USB_RECIP_ENDPOINT: 934 ep = r8a66597->epaddr2ep[w_index & USB_ENDPOINT_NUMBER_MASK]; 935 pid = control_reg_get_pid(r8a66597, ep->pipenum); 936 if (pid == PID_STALL) 937 status = 1 << USB_ENDPOINT_HALT; 938 else 939 status = 0; 940 break; 941 default: 942 pipe_stall(r8a66597, 0); 943 return; /* exit */ 944 } 945 946 r8a66597->ep0_data = cpu_to_le16(status); 947 r8a66597->ep0_req->buf = &r8a66597->ep0_data; 948 r8a66597->ep0_req->length = 2; 949 /* AV: what happens if we get called again before that gets through? */ 950 spin_unlock(&r8a66597->lock); 951 r8a66597_queue(r8a66597->gadget.ep0, r8a66597->ep0_req, GFP_KERNEL); 952 spin_lock(&r8a66597->lock); 953} 954 955static void clear_feature(struct r8a66597 *r8a66597, 956 struct usb_ctrlrequest *ctrl) 957{ 958 switch (ctrl->bRequestType & USB_RECIP_MASK) { 959 case USB_RECIP_DEVICE: 960 control_end(r8a66597, 1); 961 break; 962 case USB_RECIP_INTERFACE: 963 control_end(r8a66597, 1); 964 break; 965 case USB_RECIP_ENDPOINT: { 966 struct r8a66597_ep *ep; 967 struct r8a66597_request *req; 968 u16 w_index = le16_to_cpu(ctrl->wIndex); 969 970 ep = r8a66597->epaddr2ep[w_index & USB_ENDPOINT_NUMBER_MASK]; 971 if (!ep->wedge) { 972 pipe_stop(r8a66597, ep->pipenum); 973 control_reg_sqclr(r8a66597, ep->pipenum); 974 spin_unlock(&r8a66597->lock); 975 usb_ep_clear_halt(&ep->ep); 976 spin_lock(&r8a66597->lock); 977 } 978 979 control_end(r8a66597, 1); 980 981 req = get_request_from_ep(ep); 982 if (ep->busy) { 983 ep->busy = 0; 984 if (list_empty(&ep->queue)) 985 break; 986 start_packet(ep, req); 987 } else if (!list_empty(&ep->queue)) 988 pipe_start(r8a66597, ep->pipenum); 989 } 990 break; 991 default: 992 pipe_stall(r8a66597, 0); 993 break; 994 } 995} 996 997static void set_feature(struct r8a66597 *r8a66597, struct usb_ctrlrequest *ctrl) 998{ 999 1000 switch (ctrl->bRequestType & USB_RECIP_MASK) { 1001 case USB_RECIP_DEVICE: 1002 control_end(r8a66597, 1); 1003 break; 1004 case USB_RECIP_INTERFACE: 1005 control_end(r8a66597, 1); 1006 break; 1007 case USB_RECIP_ENDPOINT: { 1008 struct r8a66597_ep *ep; 1009 u16 w_index = le16_to_cpu(ctrl->wIndex); 1010 1011 ep = r8a66597->epaddr2ep[w_index & USB_ENDPOINT_NUMBER_MASK]; 1012 pipe_stall(r8a66597, ep->pipenum); 1013 1014 control_end(r8a66597, 1); 1015 } 1016 break; 1017 default: 1018 pipe_stall(r8a66597, 0); 1019 break; 1020 } 1021} 1022 1023/* if return value is true, call class driver's setup() */ 1024static int setup_packet(struct r8a66597 *r8a66597, struct usb_ctrlrequest *ctrl) 1025{ 1026 u16 *p = (u16 *)ctrl; 1027 unsigned long offset = USBREQ; 1028 int i, ret = 0; 1029 1030 /* read fifo */ 1031 r8a66597_write(r8a66597, ~VALID, INTSTS0); 1032 1033 for (i = 0; i < 4; i++) 1034 p[i] = r8a66597_read(r8a66597, offset + i*2); 1035 1036 /* check request */ 1037 if ((ctrl->bRequestType & USB_TYPE_MASK) == USB_TYPE_STANDARD) { 1038 switch (ctrl->bRequest) { 1039 case USB_REQ_GET_STATUS: 1040 get_status(r8a66597, ctrl); 1041 break; 1042 case USB_REQ_CLEAR_FEATURE: 1043 clear_feature(r8a66597, ctrl); 1044 break; 1045 case USB_REQ_SET_FEATURE: 1046 set_feature(r8a66597, ctrl); 1047 break; 1048 default: 1049 ret = 1; 1050 break; 1051 } 1052 } else 1053 ret = 1; 1054 return ret; 1055} 1056 1057static void r8a66597_update_usb_speed(struct r8a66597 *r8a66597) 1058{ 1059 u16 speed = get_usb_speed(r8a66597); 1060 1061 switch (speed) { 1062 case HSMODE: 1063 r8a66597->gadget.speed = USB_SPEED_HIGH; 1064 break; 1065 case FSMODE: 1066 r8a66597->gadget.speed = USB_SPEED_FULL; 1067 break; 1068 default: 1069 r8a66597->gadget.speed = USB_SPEED_UNKNOWN; 1070 printk(KERN_ERR "USB speed unknown\n"); 1071 } 1072} 1073 1074static void irq_device_state(struct r8a66597 *r8a66597) 1075{ 1076 u16 dvsq; 1077 1078 dvsq = r8a66597_read(r8a66597, INTSTS0) & DVSQ; 1079 r8a66597_write(r8a66597, ~DVST, INTSTS0); 1080 1081 if (dvsq == DS_DFLT) { 1082 /* bus reset */ 1083 r8a66597->driver->disconnect(&r8a66597->gadget); 1084 r8a66597_update_usb_speed(r8a66597); 1085 } 1086 if (r8a66597->old_dvsq == DS_CNFG && dvsq != DS_CNFG) 1087 r8a66597_update_usb_speed(r8a66597); 1088 if ((dvsq == DS_CNFG || dvsq == DS_ADDS) 1089 && r8a66597->gadget.speed == USB_SPEED_UNKNOWN) 1090 r8a66597_update_usb_speed(r8a66597); 1091 1092 r8a66597->old_dvsq = dvsq; 1093} 1094 1095static void irq_control_stage(struct r8a66597 *r8a66597) 1096__releases(r8a66597->lock) 1097__acquires(r8a66597->lock) 1098{ 1099 struct usb_ctrlrequest ctrl; 1100 u16 ctsq; 1101 1102 ctsq = r8a66597_read(r8a66597, INTSTS0) & CTSQ; 1103 r8a66597_write(r8a66597, ~CTRT, INTSTS0); 1104 1105 switch (ctsq) { 1106 case CS_IDST: { 1107 struct r8a66597_ep *ep; 1108 struct r8a66597_request *req; 1109 ep = &r8a66597->ep[0]; 1110 req = get_request_from_ep(ep); 1111 transfer_complete(ep, req, 0); 1112 } 1113 break; 1114 1115 case CS_RDDS: 1116 case CS_WRDS: 1117 case CS_WRND: 1118 if (setup_packet(r8a66597, &ctrl)) { 1119 spin_unlock(&r8a66597->lock); 1120 if (r8a66597->driver->setup(&r8a66597->gadget, &ctrl) 1121 < 0) 1122 pipe_stall(r8a66597, 0); 1123 spin_lock(&r8a66597->lock); 1124 } 1125 break; 1126 case CS_RDSS: 1127 case CS_WRSS: 1128 control_end(r8a66597, 0); 1129 break; 1130 default: 1131 printk(KERN_ERR "ctrl_stage: unexpect ctsq(%x)\n", ctsq); 1132 break; 1133 } 1134} 1135 1136static irqreturn_t r8a66597_irq(int irq, void *_r8a66597) 1137{ 1138 struct r8a66597 *r8a66597 = _r8a66597; 1139 u16 intsts0; 1140 u16 intenb0; 1141 u16 brdysts, nrdysts, bempsts; 1142 u16 brdyenb, nrdyenb, bempenb; 1143 u16 savepipe; 1144 u16 mask0; 1145 1146 spin_lock(&r8a66597->lock); 1147 1148 intsts0 = r8a66597_read(r8a66597, INTSTS0); 1149 intenb0 = r8a66597_read(r8a66597, INTENB0); 1150 1151 savepipe = r8a66597_read(r8a66597, CFIFOSEL); 1152 1153 mask0 = intsts0 & intenb0; 1154 if (mask0) { 1155 brdysts = r8a66597_read(r8a66597, BRDYSTS); 1156 nrdysts = r8a66597_read(r8a66597, NRDYSTS); 1157 bempsts = r8a66597_read(r8a66597, BEMPSTS); 1158 brdyenb = r8a66597_read(r8a66597, BRDYENB); 1159 nrdyenb = r8a66597_read(r8a66597, NRDYENB); 1160 bempenb = r8a66597_read(r8a66597, BEMPENB); 1161 1162 if (mask0 & VBINT) { 1163 r8a66597_write(r8a66597, 0xffff & ~VBINT, 1164 INTSTS0); 1165 r8a66597_start_xclock(r8a66597); 1166 1167 /* start vbus sampling */ 1168 r8a66597->old_vbus = r8a66597_read(r8a66597, INTSTS0) 1169 & VBSTS; 1170 r8a66597->scount = R8A66597_MAX_SAMPLING; 1171 1172 mod_timer(&r8a66597->timer, 1173 jiffies + msecs_to_jiffies(50)); 1174 } 1175 if (intsts0 & DVSQ) 1176 irq_device_state(r8a66597); 1177 1178 if ((intsts0 & BRDY) && (intenb0 & BRDYE) 1179 && (brdysts & brdyenb)) 1180 irq_pipe_ready(r8a66597, brdysts, brdyenb); 1181 if ((intsts0 & BEMP) && (intenb0 & BEMPE) 1182 && (bempsts & bempenb)) 1183 irq_pipe_empty(r8a66597, bempsts, bempenb); 1184 1185 if (intsts0 & CTRT) 1186 irq_control_stage(r8a66597); 1187 } 1188 1189 r8a66597_write(r8a66597, savepipe, CFIFOSEL); 1190 1191 spin_unlock(&r8a66597->lock); 1192 return IRQ_HANDLED; 1193} 1194 1195static void r8a66597_timer(unsigned long _r8a66597) 1196{ 1197 struct r8a66597 *r8a66597 = (struct r8a66597 *)_r8a66597; 1198 unsigned long flags; 1199 u16 tmp; 1200 1201 spin_lock_irqsave(&r8a66597->lock, flags); 1202 tmp = r8a66597_read(r8a66597, SYSCFG0); 1203 if (r8a66597->scount > 0) { 1204 tmp = r8a66597_read(r8a66597, INTSTS0) & VBSTS; 1205 if (tmp == r8a66597->old_vbus) { 1206 r8a66597->scount--; 1207 if (r8a66597->scount == 0) { 1208 if (tmp == VBSTS) 1209 r8a66597_usb_connect(r8a66597); 1210 else 1211 r8a66597_usb_disconnect(r8a66597); 1212 } else { 1213 mod_timer(&r8a66597->timer, 1214 jiffies + msecs_to_jiffies(50)); 1215 } 1216 } else { 1217 r8a66597->scount = R8A66597_MAX_SAMPLING; 1218 r8a66597->old_vbus = tmp; 1219 mod_timer(&r8a66597->timer, 1220 jiffies + msecs_to_jiffies(50)); 1221 } 1222 } 1223 spin_unlock_irqrestore(&r8a66597->lock, flags); 1224} 1225 1226/*-------------------------------------------------------------------------*/ 1227static int r8a66597_enable(struct usb_ep *_ep, 1228 const struct usb_endpoint_descriptor *desc) 1229{ 1230 struct r8a66597_ep *ep; 1231 1232 ep = container_of(_ep, struct r8a66597_ep, ep); 1233 return alloc_pipe_config(ep, desc); 1234} 1235 1236static int r8a66597_disable(struct usb_ep *_ep) 1237{ 1238 struct r8a66597_ep *ep; 1239 struct r8a66597_request *req; 1240 unsigned long flags; 1241 1242 ep = container_of(_ep, struct r8a66597_ep, ep); 1243 BUG_ON(!ep); 1244 1245 while (!list_empty(&ep->queue)) { 1246 req = get_request_from_ep(ep); 1247 spin_lock_irqsave(&ep->r8a66597->lock, flags); 1248 transfer_complete(ep, req, -ECONNRESET); 1249 spin_unlock_irqrestore(&ep->r8a66597->lock, flags); 1250 } 1251 1252 pipe_irq_disable(ep->r8a66597, ep->pipenum); 1253 return free_pipe_config(ep); 1254} 1255 1256static struct usb_request *r8a66597_alloc_request(struct usb_ep *_ep, 1257 gfp_t gfp_flags) 1258{ 1259 struct r8a66597_request *req; 1260 1261 req = kzalloc(sizeof(struct r8a66597_request), gfp_flags); 1262 if (!req) 1263 return NULL; 1264 1265 INIT_LIST_HEAD(&req->queue); 1266 1267 return &req->req; 1268} 1269 1270static void r8a66597_free_request(struct usb_ep *_ep, struct usb_request *_req) 1271{ 1272 struct r8a66597_request *req; 1273 1274 req = container_of(_req, struct r8a66597_request, req); 1275 kfree(req); 1276} 1277 1278static int r8a66597_queue(struct usb_ep *_ep, struct usb_request *_req, 1279 gfp_t gfp_flags) 1280{ 1281 struct r8a66597_ep *ep; 1282 struct r8a66597_request *req; 1283 unsigned long flags; 1284 int request = 0; 1285 1286 ep = container_of(_ep, struct r8a66597_ep, ep); 1287 req = container_of(_req, struct r8a66597_request, req); 1288 1289 if (ep->r8a66597->gadget.speed == USB_SPEED_UNKNOWN) 1290 return -ESHUTDOWN; 1291 1292 spin_lock_irqsave(&ep->r8a66597->lock, flags); 1293 1294 if (list_empty(&ep->queue)) 1295 request = 1; 1296 1297 list_add_tail(&req->queue, &ep->queue); 1298 req->req.actual = 0; 1299 req->req.status = -EINPROGRESS; 1300 1301 if (ep->desc == NULL) /* control */ 1302 start_ep0(ep, req); 1303 else { 1304 if (request && !ep->busy) 1305 start_packet(ep, req); 1306 } 1307 1308 spin_unlock_irqrestore(&ep->r8a66597->lock, flags); 1309 1310 return 0; 1311} 1312 1313static int r8a66597_dequeue(struct usb_ep *_ep, struct usb_request *_req) 1314{ 1315 struct r8a66597_ep *ep; 1316 struct r8a66597_request *req; 1317 unsigned long flags; 1318 1319 ep = container_of(_ep, struct r8a66597_ep, ep); 1320 req = container_of(_req, struct r8a66597_request, req); 1321 1322 spin_lock_irqsave(&ep->r8a66597->lock, flags); 1323 if (!list_empty(&ep->queue)) 1324 transfer_complete(ep, req, -ECONNRESET); 1325 spin_unlock_irqrestore(&ep->r8a66597->lock, flags); 1326 1327 return 0; 1328} 1329 1330static int r8a66597_set_halt(struct usb_ep *_ep, int value) 1331{ 1332 struct r8a66597_ep *ep; 1333 struct r8a66597_request *req; 1334 unsigned long flags; 1335 int ret = 0; 1336 1337 ep = container_of(_ep, struct r8a66597_ep, ep); 1338 req = get_request_from_ep(ep); 1339 1340 spin_lock_irqsave(&ep->r8a66597->lock, flags); 1341 if (!list_empty(&ep->queue)) { 1342 ret = -EAGAIN; 1343 goto out; 1344 } 1345 if (value) { 1346 ep->busy = 1; 1347 pipe_stall(ep->r8a66597, ep->pipenum); 1348 } else { 1349 ep->busy = 0; 1350 ep->wedge = 0; 1351 pipe_stop(ep->r8a66597, ep->pipenum); 1352 } 1353 1354out: 1355 spin_unlock_irqrestore(&ep->r8a66597->lock, flags); 1356 return ret; 1357} 1358 1359static int r8a66597_set_wedge(struct usb_ep *_ep) 1360{ 1361 struct r8a66597_ep *ep; 1362 unsigned long flags; 1363 1364 ep = container_of(_ep, struct r8a66597_ep, ep); 1365 1366 if (!ep || !ep->desc) 1367 return -EINVAL; 1368 1369 spin_lock_irqsave(&ep->r8a66597->lock, flags); 1370 ep->wedge = 1; 1371 spin_unlock_irqrestore(&ep->r8a66597->lock, flags); 1372 1373 return usb_ep_set_halt(_ep); 1374} 1375 1376static void r8a66597_fifo_flush(struct usb_ep *_ep) 1377{ 1378 struct r8a66597_ep *ep; 1379 unsigned long flags; 1380 1381 ep = container_of(_ep, struct r8a66597_ep, ep); 1382 spin_lock_irqsave(&ep->r8a66597->lock, flags); 1383 if (list_empty(&ep->queue) && !ep->busy) { 1384 pipe_stop(ep->r8a66597, ep->pipenum); 1385 r8a66597_bclr(ep->r8a66597, BCLR, ep->fifoctr); 1386 } 1387 spin_unlock_irqrestore(&ep->r8a66597->lock, flags); 1388} 1389 1390static struct usb_ep_ops r8a66597_ep_ops = { 1391 .enable = r8a66597_enable, 1392 .disable = r8a66597_disable, 1393 1394 .alloc_request = r8a66597_alloc_request, 1395 .free_request = r8a66597_free_request, 1396 1397 .queue = r8a66597_queue, 1398 .dequeue = r8a66597_dequeue, 1399 1400 .set_halt = r8a66597_set_halt, 1401 .set_wedge = r8a66597_set_wedge, 1402 .fifo_flush = r8a66597_fifo_flush, 1403}; 1404 1405/*-------------------------------------------------------------------------*/ 1406static struct r8a66597 *the_controller; 1407 1408int usb_gadget_register_driver(struct usb_gadget_driver *driver) 1409{ 1410 struct r8a66597 *r8a66597 = the_controller; 1411 int retval; 1412 1413 if (!driver 1414 || driver->speed != USB_SPEED_HIGH 1415 || !driver->bind 1416 || !driver->setup) 1417 return -EINVAL; 1418 if (!r8a66597) 1419 return -ENODEV; 1420 if (r8a66597->driver) 1421 return -EBUSY; 1422 1423 /* hook up the driver */ 1424 driver->driver.bus = NULL; 1425 r8a66597->driver = driver; 1426 r8a66597->gadget.dev.driver = &driver->driver; 1427 1428 retval = device_add(&r8a66597->gadget.dev); 1429 if (retval) { 1430 printk(KERN_ERR "device_add error (%d)\n", retval); 1431 goto error; 1432 } 1433 1434 retval = driver->bind(&r8a66597->gadget); 1435 if (retval) { 1436 printk(KERN_ERR "bind to driver error (%d)\n", retval); 1437 device_del(&r8a66597->gadget.dev); 1438 goto error; 1439 } 1440 1441 r8a66597_bset(r8a66597, VBSE, INTENB0); 1442 if (r8a66597_read(r8a66597, INTSTS0) & VBSTS) { 1443 r8a66597_start_xclock(r8a66597); 1444 /* start vbus sampling */ 1445 r8a66597->old_vbus = r8a66597_read(r8a66597, 1446 INTSTS0) & VBSTS; 1447 r8a66597->scount = R8A66597_MAX_SAMPLING; 1448 mod_timer(&r8a66597->timer, jiffies + msecs_to_jiffies(50)); 1449 } 1450 1451 return 0; 1452 1453error: 1454 r8a66597->driver = NULL; 1455 r8a66597->gadget.dev.driver = NULL; 1456 1457 return retval; 1458} 1459EXPORT_SYMBOL(usb_gadget_register_driver); 1460 1461int usb_gadget_unregister_driver(struct usb_gadget_driver *driver) 1462{ 1463 struct r8a66597 *r8a66597 = the_controller; 1464 unsigned long flags; 1465 1466 if (driver != r8a66597->driver || !driver->unbind) 1467 return -EINVAL; 1468 1469 spin_lock_irqsave(&r8a66597->lock, flags); 1470 if (r8a66597->gadget.speed != USB_SPEED_UNKNOWN) 1471 r8a66597_usb_disconnect(r8a66597); 1472 spin_unlock_irqrestore(&r8a66597->lock, flags); 1473 1474 r8a66597_bclr(r8a66597, VBSE, INTENB0); 1475 1476 driver->unbind(&r8a66597->gadget); 1477 1478 init_controller(r8a66597); 1479 disable_controller(r8a66597); 1480 1481 device_del(&r8a66597->gadget.dev); 1482 r8a66597->driver = NULL; 1483 return 0; 1484} 1485EXPORT_SYMBOL(usb_gadget_unregister_driver); 1486 1487/*-------------------------------------------------------------------------*/ 1488static int r8a66597_get_frame(struct usb_gadget *_gadget) 1489{ 1490 struct r8a66597 *r8a66597 = gadget_to_r8a66597(_gadget); 1491 return r8a66597_read(r8a66597, FRMNUM) & 0x03FF; 1492} 1493 1494static struct usb_gadget_ops r8a66597_gadget_ops = { 1495 .get_frame = r8a66597_get_frame, 1496}; 1497 1498static int __exit r8a66597_remove(struct platform_device *pdev) 1499{ 1500 struct r8a66597 *r8a66597 = dev_get_drvdata(&pdev->dev); 1501 1502 del_timer_sync(&r8a66597->timer); 1503 iounmap(r8a66597->reg); 1504 free_irq(platform_get_irq(pdev, 0), r8a66597); 1505 r8a66597_free_request(&r8a66597->ep[0].ep, r8a66597->ep0_req); 1506#ifdef CONFIG_HAVE_CLK 1507 if (r8a66597->pdata->on_chip) { 1508 clk_disable(r8a66597->clk); 1509 clk_put(r8a66597->clk); 1510 } 1511#endif 1512 kfree(r8a66597); 1513 return 0; 1514} 1515 1516static void nop_completion(struct usb_ep *ep, struct usb_request *r) 1517{ 1518} 1519 1520static int __init r8a66597_probe(struct platform_device *pdev) 1521{ 1522#ifdef CONFIG_HAVE_CLK 1523 char clk_name[8]; 1524#endif 1525 struct resource *res, *ires; 1526 int irq; 1527 void __iomem *reg = NULL; 1528 struct r8a66597 *r8a66597 = NULL; 1529 int ret = 0; 1530 int i; 1531 unsigned long irq_trigger; 1532 1533 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1534 if (!res) { 1535 ret = -ENODEV; 1536 printk(KERN_ERR "platform_get_resource error.\n"); 1537 goto clean_up; 1538 } 1539 1540 ires = platform_get_resource(pdev, IORESOURCE_IRQ, 0); 1541 irq = ires->start; 1542 irq_trigger = ires->flags & IRQF_TRIGGER_MASK; 1543 1544 if (irq < 0) { 1545 ret = -ENODEV; 1546 printk(KERN_ERR "platform_get_irq error.\n"); 1547 goto clean_up; 1548 } 1549 1550 reg = ioremap(res->start, resource_size(res)); 1551 if (reg == NULL) { 1552 ret = -ENOMEM; 1553 printk(KERN_ERR "ioremap error.\n"); 1554 goto clean_up; 1555 } 1556 1557 /* initialize ucd */ 1558 r8a66597 = kzalloc(sizeof(struct r8a66597), GFP_KERNEL); 1559 if (r8a66597 == NULL) { 1560 ret = -ENOMEM; 1561 printk(KERN_ERR "kzalloc error\n"); 1562 goto clean_up; 1563 } 1564 1565 spin_lock_init(&r8a66597->lock); 1566 dev_set_drvdata(&pdev->dev, r8a66597); 1567 r8a66597->pdata = pdev->dev.platform_data; 1568 r8a66597->irq_sense_low = irq_trigger == IRQF_TRIGGER_LOW; 1569 1570 r8a66597->gadget.ops = &r8a66597_gadget_ops; 1571 device_initialize(&r8a66597->gadget.dev); 1572 dev_set_name(&r8a66597->gadget.dev, "gadget"); 1573 r8a66597->gadget.is_dualspeed = 1; 1574 r8a66597->gadget.dev.parent = &pdev->dev; 1575 r8a66597->gadget.dev.dma_mask = pdev->dev.dma_mask; 1576 r8a66597->gadget.dev.release = pdev->dev.release; 1577 r8a66597->gadget.name = udc_name; 1578 1579 init_timer(&r8a66597->timer); 1580 r8a66597->timer.function = r8a66597_timer; 1581 r8a66597->timer.data = (unsigned long)r8a66597; 1582 r8a66597->reg = reg; 1583 1584#ifdef CONFIG_HAVE_CLK 1585 if (r8a66597->pdata->on_chip) { 1586 snprintf(clk_name, sizeof(clk_name), "usb%d", pdev->id); 1587 r8a66597->clk = clk_get(&pdev->dev, clk_name); 1588 if (IS_ERR(r8a66597->clk)) { 1589 dev_err(&pdev->dev, "cannot get clock \"%s\"\n", 1590 clk_name); 1591 ret = PTR_ERR(r8a66597->clk); 1592 goto clean_up; 1593 } 1594 clk_enable(r8a66597->clk); 1595 } 1596#endif 1597 1598 disable_controller(r8a66597); /* make sure controller is disabled */ 1599 1600 ret = request_irq(irq, r8a66597_irq, IRQF_DISABLED | IRQF_SHARED, 1601 udc_name, r8a66597); 1602 if (ret < 0) { 1603 printk(KERN_ERR "request_irq error (%d)\n", ret); 1604 goto clean_up2; 1605 } 1606 1607 INIT_LIST_HEAD(&r8a66597->gadget.ep_list); 1608 r8a66597->gadget.ep0 = &r8a66597->ep[0].ep; 1609 INIT_LIST_HEAD(&r8a66597->gadget.ep0->ep_list); 1610 for (i = 0; i < R8A66597_MAX_NUM_PIPE; i++) { 1611 struct r8a66597_ep *ep = &r8a66597->ep[i]; 1612 1613 if (i != 0) { 1614 INIT_LIST_HEAD(&r8a66597->ep[i].ep.ep_list); 1615 list_add_tail(&r8a66597->ep[i].ep.ep_list, 1616 &r8a66597->gadget.ep_list); 1617 } 1618 ep->r8a66597 = r8a66597; 1619 INIT_LIST_HEAD(&ep->queue); 1620 ep->ep.name = r8a66597_ep_name[i]; 1621 ep->ep.ops = &r8a66597_ep_ops; 1622 ep->ep.maxpacket = 512; 1623 } 1624 r8a66597->ep[0].ep.maxpacket = 64; 1625 r8a66597->ep[0].pipenum = 0; 1626 r8a66597->ep[0].fifoaddr = CFIFO; 1627 r8a66597->ep[0].fifosel = CFIFOSEL; 1628 r8a66597->ep[0].fifoctr = CFIFOCTR; 1629 r8a66597->ep[0].fifotrn = 0; 1630 r8a66597->ep[0].pipectr = get_pipectr_addr(0); 1631 r8a66597->pipenum2ep[0] = &r8a66597->ep[0]; 1632 r8a66597->epaddr2ep[0] = &r8a66597->ep[0]; 1633 1634 the_controller = r8a66597; 1635 1636 r8a66597->ep0_req = r8a66597_alloc_request(&r8a66597->ep[0].ep, 1637 GFP_KERNEL); 1638 if (r8a66597->ep0_req == NULL) 1639 goto clean_up3; 1640 r8a66597->ep0_req->complete = nop_completion; 1641 1642 init_controller(r8a66597); 1643 1644 dev_info(&pdev->dev, "version %s\n", DRIVER_VERSION); 1645 return 0; 1646 1647clean_up3: 1648 free_irq(irq, r8a66597); 1649clean_up2: 1650#ifdef CONFIG_HAVE_CLK 1651 if (r8a66597->pdata->on_chip) { 1652 clk_disable(r8a66597->clk); 1653 clk_put(r8a66597->clk); 1654 } 1655#endif 1656clean_up: 1657 if (r8a66597) { 1658 if (r8a66597->ep0_req) 1659 r8a66597_free_request(&r8a66597->ep[0].ep, 1660 r8a66597->ep0_req); 1661 kfree(r8a66597); 1662 } 1663 if (reg) 1664 iounmap(reg); 1665 1666 return ret; 1667} 1668 1669/*-------------------------------------------------------------------------*/ 1670static struct platform_driver r8a66597_driver = { 1671 .remove = __exit_p(r8a66597_remove), 1672 .driver = { 1673 .name = (char *) udc_name, 1674 }, 1675}; 1676 1677static int __init r8a66597_udc_init(void) 1678{ 1679 return platform_driver_probe(&r8a66597_driver, r8a66597_probe); 1680} 1681module_init(r8a66597_udc_init); 1682 1683static void __exit r8a66597_udc_cleanup(void) 1684{ 1685 platform_driver_unregister(&r8a66597_driver); 1686} 1687module_exit(r8a66597_udc_cleanup); 1688 1689MODULE_DESCRIPTION("R8A66597 USB gadget driver"); 1690MODULE_LICENSE("GPL"); 1691MODULE_AUTHOR("Yoshihiro Shimoda"); 1692