1/************************************************************************** 2 * 3 * Copyright 2000-2006 Alacritech, Inc. All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above 12 * copyright notice, this list of conditions and the following 13 * disclaimer in the documentation and/or other materials provided 14 * with the distribution. 15 * 16 * Alternatively, this software may be distributed under the terms of the 17 * GNU General Public License ("GPL") version 2 as published by the Free 18 * Software Foundation. 19 * 20 * THIS SOFTWARE IS PROVIDED BY ALACRITECH, INC. ``AS IS'' AND ANY 21 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ALACRITECH, INC. OR 24 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 25 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 26 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF 27 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 28 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 29 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT 30 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 31 * SUCH DAMAGE. 32 * 33 * The views and conclusions contained in the software and documentation 34 * are those of the authors and should not be interpreted as representing 35 * official policies, either expressed or implied, of Alacritech, Inc. 36 * 37 **************************************************************************/ 38 39/* 40 * FILENAME: slicoss.c 41 * 42 * The SLICOSS driver for Alacritech's IS-NIC products. 43 * 44 * This driver is supposed to support: 45 * 46 * Mojave cards (single port PCI Gigabit) both copper and fiber 47 * Oasis cards (single and dual port PCI-x Gigabit) copper and fiber 48 * Kalahari cards (dual and quad port PCI-e Gigabit) copper and fiber 49 * 50 * The driver was acutally tested on Oasis and Kalahari cards. 51 * 52 * 53 * NOTE: This is the standard, non-accelerated version of Alacritech's 54 * IS-NIC driver. 55 */ 56 57 58#define KLUDGE_FOR_4GB_BOUNDARY 1 59#define DEBUG_MICROCODE 1 60#define DBG 1 61#define SLIC_INTERRUPT_PROCESS_LIMIT 1 62#define SLIC_OFFLOAD_IP_CHECKSUM 1 63#define STATS_TIMER_INTERVAL 2 64#define PING_TIMER_INTERVAL 1 65 66#include <linux/kernel.h> 67#include <linux/string.h> 68#include <linux/errno.h> 69#include <linux/ioport.h> 70#include <linux/slab.h> 71#include <linux/interrupt.h> 72#include <linux/timer.h> 73#include <linux/pci.h> 74#include <linux/spinlock.h> 75#include <linux/init.h> 76#include <linux/bitops.h> 77#include <linux/io.h> 78#include <linux/netdevice.h> 79#include <linux/etherdevice.h> 80#include <linux/skbuff.h> 81#include <linux/delay.h> 82#include <linux/debugfs.h> 83#include <linux/seq_file.h> 84#include <linux/kthread.h> 85#include <linux/module.h> 86#include <linux/moduleparam.h> 87 88#include <linux/firmware.h> 89#include <linux/types.h> 90#include <linux/dma-mapping.h> 91#include <linux/mii.h> 92#include <linux/if_vlan.h> 93#include <asm/unaligned.h> 94 95#include <linux/ethtool.h> 96#include <linux/uaccess.h> 97#include "slichw.h" 98#include "slic.h" 99 100static uint slic_first_init = 1; 101static char *slic_banner = "Alacritech SLIC Technology(tm) Server "\ 102 "and Storage Accelerator (Non-Accelerated)"; 103 104static char *slic_proc_version = "2.0.351 2006/07/14 12:26:00"; 105static char *slic_product_name = "SLIC Technology(tm) Server "\ 106 "and Storage Accelerator (Non-Accelerated)"; 107static char *slic_vendor = "Alacritech, Inc."; 108 109static int slic_debug = 1; 110static int debug = -1; 111static struct net_device *head_netdevice; 112 113static struct base_driver slic_global = { {}, 0, 0, 0, 1, NULL, NULL }; 114static int intagg_delay = 100; 115static u32 dynamic_intagg; 116static unsigned int rcv_count; 117static struct dentry *slic_debugfs; 118 119#define DRV_NAME "slicoss" 120#define DRV_VERSION "2.0.1" 121#define DRV_AUTHOR "Alacritech, Inc. Engineering" 122#define DRV_DESCRIPTION "Alacritech SLIC Techonology(tm) "\ 123 "Non-Accelerated Driver" 124#define DRV_COPYRIGHT "Copyright 2000-2006 Alacritech, Inc. "\ 125 "All rights reserved." 126#define PFX DRV_NAME " " 127 128MODULE_AUTHOR(DRV_AUTHOR); 129MODULE_DESCRIPTION(DRV_DESCRIPTION); 130MODULE_LICENSE("Dual BSD/GPL"); 131 132module_param(dynamic_intagg, int, 0); 133MODULE_PARM_DESC(dynamic_intagg, "Dynamic Interrupt Aggregation Setting"); 134module_param(intagg_delay, int, 0); 135MODULE_PARM_DESC(intagg_delay, "uSec Interrupt Aggregation Delay"); 136 137static DEFINE_PCI_DEVICE_TABLE(slic_pci_tbl) = { 138 { PCI_DEVICE(PCI_VENDOR_ID_ALACRITECH, SLIC_1GB_DEVICE_ID) }, 139 { PCI_DEVICE(PCI_VENDOR_ID_ALACRITECH, SLIC_2GB_DEVICE_ID) }, 140 { 0 } 141}; 142 143MODULE_DEVICE_TABLE(pci, slic_pci_tbl); 144 145#ifdef ASSERT 146#undef ASSERT 147#endif 148 149static void slic_assert_fail(void) 150{ 151 u32 cpuid; 152 u32 curr_pid; 153 cpuid = smp_processor_id(); 154 curr_pid = current->pid; 155 156 printk(KERN_ERR "%s CPU # %d ---- PID # %d\n", 157 __func__, cpuid, curr_pid); 158} 159 160#ifndef ASSERT 161#define ASSERT(a) do { \ 162 if (!(a)) { \ 163 printk(KERN_ERR "slicoss ASSERT() Failure: function %s" \ 164 "line %d\n", __func__, __LINE__); \ 165 slic_assert_fail(); \ 166 } \ 167} while (0) 168#endif 169 170 171#define SLIC_GET_SLIC_HANDLE(_adapter, _pslic_handle) \ 172{ \ 173 spin_lock_irqsave(&_adapter->handle_lock.lock, \ 174 _adapter->handle_lock.flags); \ 175 _pslic_handle = _adapter->pfree_slic_handles; \ 176 if (_pslic_handle) { \ 177 ASSERT(_pslic_handle->type == SLIC_HANDLE_FREE); \ 178 _adapter->pfree_slic_handles = _pslic_handle->next; \ 179 } \ 180 spin_unlock_irqrestore(&_adapter->handle_lock.lock, \ 181 _adapter->handle_lock.flags); \ 182} 183 184#define SLIC_FREE_SLIC_HANDLE(_adapter, _pslic_handle) \ 185{ \ 186 _pslic_handle->type = SLIC_HANDLE_FREE; \ 187 spin_lock_irqsave(&_adapter->handle_lock.lock, \ 188 _adapter->handle_lock.flags); \ 189 _pslic_handle->next = _adapter->pfree_slic_handles; \ 190 _adapter->pfree_slic_handles = _pslic_handle; \ 191 spin_unlock_irqrestore(&_adapter->handle_lock.lock, \ 192 _adapter->handle_lock.flags); \ 193} 194 195static inline void slic_reg32_write(void __iomem *reg, u32 value, bool flush) 196{ 197 writel(value, reg); 198 if (flush) 199 mb(); 200} 201 202static inline void slic_reg64_write(struct adapter *adapter, void __iomem *reg, 203 u32 value, void __iomem *regh, u32 paddrh, 204 bool flush) 205{ 206 spin_lock_irqsave(&adapter->bit64reglock.lock, 207 adapter->bit64reglock.flags); 208 if (paddrh != adapter->curaddrupper) { 209 adapter->curaddrupper = paddrh; 210 writel(paddrh, regh); 211 } 212 writel(value, reg); 213 if (flush) 214 mb(); 215 spin_unlock_irqrestore(&adapter->bit64reglock.lock, 216 adapter->bit64reglock.flags); 217} 218 219/* 220 * Functions to obtain the CRC corresponding to the destination mac address. 221 * This is a standard ethernet CRC in that it is a 32-bit, reflected CRC using 222 * the polynomial: 223 * x^32 + x^26 + x^23 + x^22 + x^16 + x^12 + x^11 + x^10 + x^8 + x^7 + x^5 + 224 * x^4 + x^2 + x^1. 225 * 226 * After the CRC for the 6 bytes is generated (but before the value is 227 * complemented), 228 * we must then transpose the value and return bits 30-23. 229 * 230 */ 231static u32 slic_crc_table[256]; /* Table of CRCs for all possible byte values */ 232static u32 slic_crc_init; /* Is table initialized */ 233 234/* 235 * Contruct the CRC32 table 236 */ 237static void slic_mcast_init_crc32(void) 238{ 239 u32 c; /* CRC shit reg */ 240 u32 e = 0; /* Poly X-or pattern */ 241 int i; /* counter */ 242 int k; /* byte being shifted into crc */ 243 244 static int p[] = { 0, 1, 2, 4, 5, 7, 8, 10, 11, 12, 16, 22, 23, 26 }; 245 246 for (i = 0; i < ARRAY_SIZE(p); i++) 247 e |= 1L << (31 - p[i]); 248 249 for (i = 1; i < 256; i++) { 250 c = i; 251 for (k = 8; k; k--) 252 c = c & 1 ? (c >> 1) ^ e : c >> 1; 253 slic_crc_table[i] = c; 254 } 255} 256 257/* 258 * Return the MAC hast as described above. 259 */ 260static unsigned char slic_mcast_get_mac_hash(char *macaddr) 261{ 262 u32 crc; 263 char *p; 264 int i; 265 unsigned char machash = 0; 266 267 if (!slic_crc_init) { 268 slic_mcast_init_crc32(); 269 slic_crc_init = 1; 270 } 271 272 crc = 0xFFFFFFFF; /* Preload shift register, per crc-32 spec */ 273 for (i = 0, p = macaddr; i < 6; ++p, ++i) 274 crc = (crc >> 8) ^ slic_crc_table[(crc ^ *p) & 0xFF]; 275 276 /* Return bits 1-8, transposed */ 277 for (i = 1; i < 9; i++) 278 machash |= (((crc >> i) & 1) << (8 - i)); 279 280 return machash; 281} 282 283static void slic_mcast_set_bit(struct adapter *adapter, char *address) 284{ 285 unsigned char crcpoly; 286 287 /* Get the CRC polynomial for the mac address */ 288 crcpoly = slic_mcast_get_mac_hash(address); 289 290 /* We only have space on the SLIC for 64 entries. Lop 291 * off the top two bits. (2^6 = 64) 292 */ 293 crcpoly &= 0x3F; 294 295 /* OR in the new bit into our 64 bit mask. */ 296 adapter->mcastmask |= (u64) 1 << crcpoly; 297} 298 299static void slic_mcast_set_mask(struct adapter *adapter) 300{ 301 __iomem struct slic_regs *slic_regs = adapter->slic_regs; 302 303 if (adapter->macopts & (MAC_ALLMCAST | MAC_PROMISC)) { 304 /* Turn on all multicast addresses. We have to do this for 305 * promiscuous mode as well as ALLMCAST mode. It saves the 306 * Microcode from having to keep state about the MAC 307 * configuration. 308 */ 309 slic_reg32_write(&slic_regs->slic_mcastlow, 0xFFFFFFFF, FLUSH); 310 slic_reg32_write(&slic_regs->slic_mcasthigh, 0xFFFFFFFF, 311 FLUSH); 312 } else { 313 /* Commit our multicast mast to the SLIC by writing to the 314 * multicast address mask registers 315 */ 316 slic_reg32_write(&slic_regs->slic_mcastlow, 317 (u32)(adapter->mcastmask & 0xFFFFFFFF), FLUSH); 318 slic_reg32_write(&slic_regs->slic_mcasthigh, 319 (u32)((adapter->mcastmask >> 32) & 0xFFFFFFFF), FLUSH); 320 } 321} 322 323static void slic_timer_ping(ulong dev) 324{ 325 struct adapter *adapter; 326 struct sliccard *card; 327 328 ASSERT(dev); 329 adapter = netdev_priv((struct net_device *)dev); 330 ASSERT(adapter); 331 card = adapter->card; 332 ASSERT(card); 333 334 adapter->pingtimer.expires = jiffies + (PING_TIMER_INTERVAL * HZ); 335 add_timer(&adapter->pingtimer); 336} 337 338static void slic_unmap_mmio_space(struct adapter *adapter) 339{ 340 if (adapter->slic_regs) 341 iounmap(adapter->slic_regs); 342 adapter->slic_regs = NULL; 343} 344 345/* 346 * slic_link_config 347 * 348 * Write phy control to configure link duplex/speed 349 * 350 */ 351static void slic_link_config(struct adapter *adapter, 352 u32 linkspeed, u32 linkduplex) 353{ 354 u32 __iomem *wphy; 355 u32 speed; 356 u32 duplex; 357 u32 phy_config; 358 u32 phy_advreg; 359 u32 phy_gctlreg; 360 361 if (adapter->state != ADAPT_UP) 362 return; 363 364 ASSERT((adapter->devid == SLIC_1GB_DEVICE_ID) 365 || (adapter->devid == SLIC_2GB_DEVICE_ID)); 366 367 if (linkspeed > LINK_1000MB) 368 linkspeed = LINK_AUTOSPEED; 369 if (linkduplex > LINK_AUTOD) 370 linkduplex = LINK_AUTOD; 371 372 wphy = &adapter->slic_regs->slic_wphy; 373 374 if ((linkspeed == LINK_AUTOSPEED) || (linkspeed == LINK_1000MB)) { 375 if (adapter->flags & ADAPT_FLAGS_FIBERMEDIA) { 376 /* We've got a fiber gigabit interface, and register 377 * 4 is different in fiber mode than in copper mode 378 */ 379 380 /* advertise FD only @1000 Mb */ 381 phy_advreg = (MIICR_REG_4 | (PAR_ADV1000XFD)); 382 /* enable PAUSE frames */ 383 phy_advreg |= PAR_ASYMPAUSE_FIBER; 384 slic_reg32_write(wphy, phy_advreg, FLUSH); 385 386 if (linkspeed == LINK_AUTOSPEED) { 387 /* reset phy, enable auto-neg */ 388 phy_config = 389 (MIICR_REG_PCR | 390 (PCR_RESET | PCR_AUTONEG | 391 PCR_AUTONEG_RST)); 392 slic_reg32_write(wphy, phy_config, FLUSH); 393 } else { /* forced 1000 Mb FD*/ 394 /* power down phy to break link 395 this may not work) */ 396 phy_config = (MIICR_REG_PCR | PCR_POWERDOWN); 397 slic_reg32_write(wphy, phy_config, FLUSH); 398 /* wait, Marvell says 1 sec, 399 try to get away with 10 ms */ 400 mdelay(10); 401 402 /* disable auto-neg, set speed/duplex, 403 soft reset phy, powerup */ 404 phy_config = 405 (MIICR_REG_PCR | 406 (PCR_RESET | PCR_SPEED_1000 | 407 PCR_DUPLEX_FULL)); 408 slic_reg32_write(wphy, phy_config, FLUSH); 409 } 410 } else { /* copper gigabit */ 411 412 /* Auto-Negotiate or 1000 Mb must be auto negotiated 413 * We've got a copper gigabit interface, and 414 * register 4 is different in copper mode than 415 * in fiber mode 416 */ 417 if (linkspeed == LINK_AUTOSPEED) { 418 /* advertise 10/100 Mb modes */ 419 phy_advreg = 420 (MIICR_REG_4 | 421 (PAR_ADV100FD | PAR_ADV100HD | PAR_ADV10FD 422 | PAR_ADV10HD)); 423 } else { 424 /* linkspeed == LINK_1000MB - 425 don't advertise 10/100 Mb modes */ 426 phy_advreg = MIICR_REG_4; 427 } 428 /* enable PAUSE frames */ 429 phy_advreg |= PAR_ASYMPAUSE; 430 /* required by the Cicada PHY */ 431 phy_advreg |= PAR_802_3; 432 slic_reg32_write(wphy, phy_advreg, FLUSH); 433 /* advertise FD only @1000 Mb */ 434 phy_gctlreg = (MIICR_REG_9 | (PGC_ADV1000FD)); 435 slic_reg32_write(wphy, phy_gctlreg, FLUSH); 436 437 if (adapter->subsysid != SLIC_1GB_CICADA_SUBSYS_ID) { 438 /* if a Marvell PHY 439 enable auto crossover */ 440 phy_config = 441 (MIICR_REG_16 | (MRV_REG16_XOVERON)); 442 slic_reg32_write(wphy, phy_config, FLUSH); 443 444 /* reset phy, enable auto-neg */ 445 phy_config = 446 (MIICR_REG_PCR | 447 (PCR_RESET | PCR_AUTONEG | 448 PCR_AUTONEG_RST)); 449 slic_reg32_write(wphy, phy_config, FLUSH); 450 } else { /* it's a Cicada PHY */ 451 /* enable and restart auto-neg (don't reset) */ 452 phy_config = 453 (MIICR_REG_PCR | 454 (PCR_AUTONEG | PCR_AUTONEG_RST)); 455 slic_reg32_write(wphy, phy_config, FLUSH); 456 } 457 } 458 } else { 459 /* Forced 10/100 */ 460 if (linkspeed == LINK_10MB) 461 speed = 0; 462 else 463 speed = PCR_SPEED_100; 464 if (linkduplex == LINK_HALFD) 465 duplex = 0; 466 else 467 duplex = PCR_DUPLEX_FULL; 468 469 if (adapter->subsysid != SLIC_1GB_CICADA_SUBSYS_ID) { 470 /* if a Marvell PHY 471 disable auto crossover */ 472 phy_config = (MIICR_REG_16 | (MRV_REG16_XOVEROFF)); 473 slic_reg32_write(wphy, phy_config, FLUSH); 474 } 475 476 /* power down phy to break link (this may not work) */ 477 phy_config = (MIICR_REG_PCR | (PCR_POWERDOWN | speed | duplex)); 478 slic_reg32_write(wphy, phy_config, FLUSH); 479 480 /* wait, Marvell says 1 sec, try to get away with 10 ms */ 481 mdelay(10); 482 483 if (adapter->subsysid != SLIC_1GB_CICADA_SUBSYS_ID) { 484 /* if a Marvell PHY 485 disable auto-neg, set speed, 486 soft reset phy, powerup */ 487 phy_config = 488 (MIICR_REG_PCR | (PCR_RESET | speed | duplex)); 489 slic_reg32_write(wphy, phy_config, FLUSH); 490 } else { /* it's a Cicada PHY */ 491 /* disable auto-neg, set speed, powerup */ 492 phy_config = (MIICR_REG_PCR | (speed | duplex)); 493 slic_reg32_write(wphy, phy_config, FLUSH); 494 } 495 } 496} 497 498static int slic_card_download_gbrcv(struct adapter *adapter) 499{ 500 const struct firmware *fw; 501 const char *file = ""; 502 int ret; 503 __iomem struct slic_regs *slic_regs = adapter->slic_regs; 504 u32 codeaddr; 505 u32 instruction; 506 int index = 0; 507 u32 rcvucodelen = 0; 508 509 switch (adapter->devid) { 510 case SLIC_2GB_DEVICE_ID: 511 file = "slicoss/oasisrcvucode.sys"; 512 break; 513 case SLIC_1GB_DEVICE_ID: 514 file = "slicoss/gbrcvucode.sys"; 515 break; 516 default: 517 ASSERT(0); 518 break; 519 } 520 521 ret = request_firmware(&fw, file, &adapter->pcidev->dev); 522 if (ret) { 523 dev_err(&adapter->pcidev->dev, 524 "SLICOSS: Failed to load firmware %s\n", file); 525 return ret; 526 } 527 528 rcvucodelen = *(u32 *)(fw->data + index); 529 index += 4; 530 switch (adapter->devid) { 531 case SLIC_2GB_DEVICE_ID: 532 if (rcvucodelen != OasisRcvUCodeLen) 533 return -EINVAL; 534 break; 535 case SLIC_1GB_DEVICE_ID: 536 if (rcvucodelen != GBRcvUCodeLen) 537 return -EINVAL; 538 break; 539 default: 540 ASSERT(0); 541 break; 542 } 543 /* start download */ 544 slic_reg32_write(&slic_regs->slic_rcv_wcs, SLIC_RCVWCS_BEGIN, FLUSH); 545 /* download the rcv sequencer ucode */ 546 for (codeaddr = 0; codeaddr < rcvucodelen; codeaddr++) { 547 /* write out instruction address */ 548 slic_reg32_write(&slic_regs->slic_rcv_wcs, codeaddr, FLUSH); 549 550 instruction = *(u32 *)(fw->data + index); 551 index += 4; 552 /* write out the instruction data low addr */ 553 slic_reg32_write(&slic_regs->slic_rcv_wcs, instruction, FLUSH); 554 555 instruction = *(u8 *)(fw->data + index); 556 index++; 557 /* write out the instruction data high addr */ 558 slic_reg32_write(&slic_regs->slic_rcv_wcs, (u8)instruction, 559 FLUSH); 560 } 561 562 /* download finished */ 563 release_firmware(fw); 564 slic_reg32_write(&slic_regs->slic_rcv_wcs, SLIC_RCVWCS_FINISH, FLUSH); 565 return 0; 566} 567 568MODULE_FIRMWARE("slicoss/oasisrcvucode.sys"); 569MODULE_FIRMWARE("slicoss/gbrcvucode.sys"); 570 571static int slic_card_download(struct adapter *adapter) 572{ 573 const struct firmware *fw; 574 const char *file = ""; 575 int ret; 576 u32 section; 577 int thissectionsize; 578 int codeaddr; 579 __iomem struct slic_regs *slic_regs = adapter->slic_regs; 580 u32 instruction; 581 u32 baseaddress; 582 u32 i; 583 u32 numsects = 0; 584 u32 sectsize[3]; 585 u32 sectstart[3]; 586 int ucode_start, index = 0; 587 588 switch (adapter->devid) { 589 case SLIC_2GB_DEVICE_ID: 590 file = "slicoss/oasisdownload.sys"; 591 break; 592 case SLIC_1GB_DEVICE_ID: 593 file = "slicoss/gbdownload.sys"; 594 break; 595 default: 596 ASSERT(0); 597 break; 598 } 599 ret = request_firmware(&fw, file, &adapter->pcidev->dev); 600 if (ret) { 601 dev_err(&adapter->pcidev->dev, 602 "SLICOSS: Failed to load firmware %s\n", file); 603 return ret; 604 } 605 numsects = *(u32 *)(fw->data + index); 606 index += 4; 607 ASSERT(numsects <= 3); 608 for (i = 0; i < numsects; i++) { 609 sectsize[i] = *(u32 *)(fw->data + index); 610 index += 4; 611 } 612 for (i = 0; i < numsects; i++) { 613 sectstart[i] = *(u32 *)(fw->data + index); 614 index += 4; 615 } 616 ucode_start = index; 617 instruction = *(u32 *)(fw->data + index); 618 index += 4; 619 for (section = 0; section < numsects; section++) { 620 baseaddress = sectstart[section]; 621 thissectionsize = sectsize[section] >> 3; 622 623 for (codeaddr = 0; codeaddr < thissectionsize; codeaddr++) { 624 /* Write out instruction address */ 625 slic_reg32_write(&slic_regs->slic_wcs, 626 baseaddress + codeaddr, FLUSH); 627 /* Write out instruction to low addr */ 628 slic_reg32_write(&slic_regs->slic_wcs, instruction, FLUSH); 629 instruction = *(u32 *)(fw->data + index); 630 index += 4; 631 632 /* Write out instruction to high addr */ 633 slic_reg32_write(&slic_regs->slic_wcs, instruction, FLUSH); 634 instruction = *(u32 *)(fw->data + index); 635 index += 4; 636 } 637 } 638 index = ucode_start; 639 for (section = 0; section < numsects; section++) { 640 instruction = *(u32 *)(fw->data + index); 641 baseaddress = sectstart[section]; 642 if (baseaddress < 0x8000) 643 continue; 644 thissectionsize = sectsize[section] >> 3; 645 646 for (codeaddr = 0; codeaddr < thissectionsize; codeaddr++) { 647 /* Write out instruction address */ 648 slic_reg32_write(&slic_regs->slic_wcs, 649 SLIC_WCS_COMPARE | (baseaddress + codeaddr), 650 FLUSH); 651 /* Write out instruction to low addr */ 652 slic_reg32_write(&slic_regs->slic_wcs, instruction, 653 FLUSH); 654 instruction = *(u32 *)(fw->data + index); 655 index += 4; 656 /* Write out instruction to high addr */ 657 slic_reg32_write(&slic_regs->slic_wcs, instruction, 658 FLUSH); 659 instruction = *(u32 *)(fw->data + index); 660 index += 4; 661 662 /* Check SRAM location zero. If it is non-zero. Abort.*/ 663/* failure = readl((u32 __iomem *)&slic_regs->slic_reset); 664 if (failure) { 665 release_firmware(fw); 666 return -EIO; 667 }*/ 668 } 669 } 670 release_firmware(fw); 671 /* Everything OK, kick off the card */ 672 mdelay(10); 673 slic_reg32_write(&slic_regs->slic_wcs, SLIC_WCS_START, FLUSH); 674 675 /* stall for 20 ms, long enough for ucode to init card 676 and reach mainloop */ 677 mdelay(20); 678 679 return 0; 680} 681 682MODULE_FIRMWARE("slicoss/oasisdownload.sys"); 683MODULE_FIRMWARE("slicoss/gbdownload.sys"); 684 685static void slic_adapter_set_hwaddr(struct adapter *adapter) 686{ 687 struct sliccard *card = adapter->card; 688 689 if ((adapter->card) && (card->config_set)) { 690 memcpy(adapter->macaddr, 691 card->config.MacInfo[adapter->functionnumber].macaddrA, 692 sizeof(struct slic_config_mac)); 693 if (!(adapter->currmacaddr[0] || adapter->currmacaddr[1] || 694 adapter->currmacaddr[2] || adapter->currmacaddr[3] || 695 adapter->currmacaddr[4] || adapter->currmacaddr[5])) { 696 memcpy(adapter->currmacaddr, adapter->macaddr, 6); 697 } 698 if (adapter->netdev) { 699 memcpy(adapter->netdev->dev_addr, adapter->currmacaddr, 700 6); 701 } 702 } 703} 704 705static void slic_intagg_set(struct adapter *adapter, u32 value) 706{ 707 slic_reg32_write(&adapter->slic_regs->slic_intagg, value, FLUSH); 708 adapter->card->loadlevel_current = value; 709} 710 711static void slic_soft_reset(struct adapter *adapter) 712{ 713 if (adapter->card->state == CARD_UP) { 714 slic_reg32_write(&adapter->slic_regs->slic_quiesce, 0, FLUSH); 715 mdelay(1); 716 } 717 718 slic_reg32_write(&adapter->slic_regs->slic_reset, SLIC_RESET_MAGIC, 719 FLUSH); 720 mdelay(1); 721} 722 723static void slic_mac_address_config(struct adapter *adapter) 724{ 725 u32 value; 726 u32 value2; 727 __iomem struct slic_regs *slic_regs = adapter->slic_regs; 728 729 value = *(u32 *) &adapter->currmacaddr[2]; 730 value = ntohl(value); 731 slic_reg32_write(&slic_regs->slic_wraddral, value, FLUSH); 732 slic_reg32_write(&slic_regs->slic_wraddrbl, value, FLUSH); 733 734 value2 = (u32) ((adapter->currmacaddr[0] << 8 | 735 adapter->currmacaddr[1]) & 0xFFFF); 736 737 slic_reg32_write(&slic_regs->slic_wraddrah, value2, FLUSH); 738 slic_reg32_write(&slic_regs->slic_wraddrbh, value2, FLUSH); 739 740 /* Write our multicast mask out to the card. This is done */ 741 /* here in addition to the slic_mcast_addr_set routine */ 742 /* because ALL_MCAST may have been enabled or disabled */ 743 slic_mcast_set_mask(adapter); 744} 745 746static void slic_mac_config(struct adapter *adapter) 747{ 748 u32 value; 749 __iomem struct slic_regs *slic_regs = adapter->slic_regs; 750 751 /* Setup GMAC gaps */ 752 if (adapter->linkspeed == LINK_1000MB) { 753 value = ((GMCR_GAPBB_1000 << GMCR_GAPBB_SHIFT) | 754 (GMCR_GAPR1_1000 << GMCR_GAPR1_SHIFT) | 755 (GMCR_GAPR2_1000 << GMCR_GAPR2_SHIFT)); 756 } else { 757 value = ((GMCR_GAPBB_100 << GMCR_GAPBB_SHIFT) | 758 (GMCR_GAPR1_100 << GMCR_GAPR1_SHIFT) | 759 (GMCR_GAPR2_100 << GMCR_GAPR2_SHIFT)); 760 } 761 762 /* enable GMII */ 763 if (adapter->linkspeed == LINK_1000MB) 764 value |= GMCR_GBIT; 765 766 /* enable fullduplex */ 767 if ((adapter->linkduplex == LINK_FULLD) 768 || (adapter->macopts & MAC_LOOPBACK)) { 769 value |= GMCR_FULLD; 770 } 771 772 /* write mac config */ 773 slic_reg32_write(&slic_regs->slic_wmcfg, value, FLUSH); 774 775 /* setup mac addresses */ 776 slic_mac_address_config(adapter); 777} 778 779static void slic_config_set(struct adapter *adapter, bool linkchange) 780{ 781 u32 value; 782 u32 RcrReset; 783 __iomem struct slic_regs *slic_regs = adapter->slic_regs; 784 785 if (linkchange) { 786 /* Setup MAC */ 787 slic_mac_config(adapter); 788 RcrReset = GRCR_RESET; 789 } else { 790 slic_mac_address_config(adapter); 791 RcrReset = 0; 792 } 793 794 if (adapter->linkduplex == LINK_FULLD) { 795 /* setup xmtcfg */ 796 value = (GXCR_RESET | /* Always reset */ 797 GXCR_XMTEN | /* Enable transmit */ 798 GXCR_PAUSEEN); /* Enable pause */ 799 800 slic_reg32_write(&slic_regs->slic_wxcfg, value, FLUSH); 801 802 /* Setup rcvcfg last */ 803 value = (RcrReset | /* Reset, if linkchange */ 804 GRCR_CTLEN | /* Enable CTL frames */ 805 GRCR_ADDRAEN | /* Address A enable */ 806 GRCR_RCVBAD | /* Rcv bad frames */ 807 (GRCR_HASHSIZE << GRCR_HASHSIZE_SHIFT)); 808 } else { 809 /* setup xmtcfg */ 810 value = (GXCR_RESET | /* Always reset */ 811 GXCR_XMTEN); /* Enable transmit */ 812 813 slic_reg32_write(&slic_regs->slic_wxcfg, value, FLUSH); 814 815 /* Setup rcvcfg last */ 816 value = (RcrReset | /* Reset, if linkchange */ 817 GRCR_ADDRAEN | /* Address A enable */ 818 GRCR_RCVBAD | /* Rcv bad frames */ 819 (GRCR_HASHSIZE << GRCR_HASHSIZE_SHIFT)); 820 } 821 822 if (adapter->state != ADAPT_DOWN) { 823 /* Only enable receive if we are restarting or running */ 824 value |= GRCR_RCVEN; 825 } 826 827 if (adapter->macopts & MAC_PROMISC) 828 value |= GRCR_RCVALL; 829 830 slic_reg32_write(&slic_regs->slic_wrcfg, value, FLUSH); 831} 832 833/* 834 * Turn off RCV and XMT, power down PHY 835 */ 836static void slic_config_clear(struct adapter *adapter) 837{ 838 u32 value; 839 u32 phy_config; 840 __iomem struct slic_regs *slic_regs = adapter->slic_regs; 841 842 /* Setup xmtcfg */ 843 value = (GXCR_RESET | /* Always reset */ 844 GXCR_PAUSEEN); /* Enable pause */ 845 846 slic_reg32_write(&slic_regs->slic_wxcfg, value, FLUSH); 847 848 value = (GRCR_RESET | /* Always reset */ 849 GRCR_CTLEN | /* Enable CTL frames */ 850 GRCR_ADDRAEN | /* Address A enable */ 851 (GRCR_HASHSIZE << GRCR_HASHSIZE_SHIFT)); 852 853 slic_reg32_write(&slic_regs->slic_wrcfg, value, FLUSH); 854 855 /* power down phy */ 856 phy_config = (MIICR_REG_PCR | (PCR_POWERDOWN)); 857 slic_reg32_write(&slic_regs->slic_wphy, phy_config, FLUSH); 858} 859 860static bool slic_mac_filter(struct adapter *adapter, 861 struct ether_header *ether_frame) 862{ 863 struct net_device *netdev = adapter->netdev; 864 u32 opts = adapter->macopts; 865 u32 *dhost4 = (u32 *)ðer_frame->ether_dhost[0]; 866 u16 *dhost2 = (u16 *)ðer_frame->ether_dhost[4]; 867 868 if (opts & MAC_PROMISC) 869 return true; 870 871 if ((*dhost4 == 0xFFFFFFFF) && (*dhost2 == 0xFFFF)) { 872 if (opts & MAC_BCAST) { 873 adapter->rcv_broadcasts++; 874 return true; 875 } else { 876 return false; 877 } 878 } 879 880 if (ether_frame->ether_dhost[0] & 0x01) { 881 if (opts & MAC_ALLMCAST) { 882 adapter->rcv_multicasts++; 883 netdev->stats.multicast++; 884 return true; 885 } 886 if (opts & MAC_MCAST) { 887 struct mcast_address *mcaddr = adapter->mcastaddrs; 888 889 while (mcaddr) { 890 if (!compare_ether_addr(mcaddr->address, 891 ether_frame->ether_dhost)) { 892 adapter->rcv_multicasts++; 893 netdev->stats.multicast++; 894 return true; 895 } 896 mcaddr = mcaddr->next; 897 } 898 return false; 899 } else { 900 return false; 901 } 902 } 903 if (opts & MAC_DIRECTED) { 904 adapter->rcv_unicasts++; 905 return true; 906 } 907 return false; 908 909} 910 911static int slic_mac_set_address(struct net_device *dev, void *ptr) 912{ 913 struct adapter *adapter = netdev_priv(dev); 914 struct sockaddr *addr = ptr; 915 916 if (netif_running(dev)) 917 return -EBUSY; 918 if (!adapter) 919 return -EBUSY; 920 921 if (!is_valid_ether_addr(addr->sa_data)) 922 return -EINVAL; 923 924 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len); 925 memcpy(adapter->currmacaddr, addr->sa_data, dev->addr_len); 926 927 slic_config_set(adapter, true); 928 return 0; 929} 930 931static void slic_timer_load_check(ulong cardaddr) 932{ 933 struct sliccard *card = (struct sliccard *)cardaddr; 934 struct adapter *adapter = card->master; 935 u32 __iomem *intagg; 936 u32 load = card->events; 937 u32 level = 0; 938 939 intagg = &adapter->slic_regs->slic_intagg; 940 941 if ((adapter) && (adapter->state == ADAPT_UP) && 942 (card->state == CARD_UP) && (slic_global.dynamic_intagg)) { 943 if (adapter->devid == SLIC_1GB_DEVICE_ID) { 944 if (adapter->linkspeed == LINK_1000MB) 945 level = 100; 946 else { 947 if (load > SLIC_LOAD_5) 948 level = SLIC_INTAGG_5; 949 else if (load > SLIC_LOAD_4) 950 level = SLIC_INTAGG_4; 951 else if (load > SLIC_LOAD_3) 952 level = SLIC_INTAGG_3; 953 else if (load > SLIC_LOAD_2) 954 level = SLIC_INTAGG_2; 955 else if (load > SLIC_LOAD_1) 956 level = SLIC_INTAGG_1; 957 else 958 level = SLIC_INTAGG_0; 959 } 960 if (card->loadlevel_current != level) { 961 card->loadlevel_current = level; 962 slic_reg32_write(intagg, level, FLUSH); 963 } 964 } else { 965 if (load > SLIC_LOAD_5) 966 level = SLIC_INTAGG_5; 967 else if (load > SLIC_LOAD_4) 968 level = SLIC_INTAGG_4; 969 else if (load > SLIC_LOAD_3) 970 level = SLIC_INTAGG_3; 971 else if (load > SLIC_LOAD_2) 972 level = SLIC_INTAGG_2; 973 else if (load > SLIC_LOAD_1) 974 level = SLIC_INTAGG_1; 975 else 976 level = SLIC_INTAGG_0; 977 if (card->loadlevel_current != level) { 978 card->loadlevel_current = level; 979 slic_reg32_write(intagg, level, FLUSH); 980 } 981 } 982 } 983 card->events = 0; 984 card->loadtimer.expires = jiffies + (SLIC_LOADTIMER_PERIOD * HZ); 985 add_timer(&card->loadtimer); 986} 987 988static int slic_upr_queue_request(struct adapter *adapter, 989 u32 upr_request, 990 u32 upr_data, 991 u32 upr_data_h, 992 u32 upr_buffer, u32 upr_buffer_h) 993{ 994 struct slic_upr *upr; 995 struct slic_upr *uprqueue; 996 997 upr = kmalloc(sizeof(struct slic_upr), GFP_ATOMIC); 998 if (!upr) 999 return -ENOMEM; 1000 1001 upr->adapter = adapter->port; 1002 upr->upr_request = upr_request; 1003 upr->upr_data = upr_data; 1004 upr->upr_buffer = upr_buffer; 1005 upr->upr_data_h = upr_data_h; 1006 upr->upr_buffer_h = upr_buffer_h; 1007 upr->next = NULL; 1008 if (adapter->upr_list) { 1009 uprqueue = adapter->upr_list; 1010 1011 while (uprqueue->next) 1012 uprqueue = uprqueue->next; 1013 uprqueue->next = upr; 1014 } else { 1015 adapter->upr_list = upr; 1016 } 1017 return 0; 1018} 1019 1020static void slic_upr_start(struct adapter *adapter) 1021{ 1022 struct slic_upr *upr; 1023 __iomem struct slic_regs *slic_regs = adapter->slic_regs; 1024/* 1025 char * ptr1; 1026 char * ptr2; 1027 uint cmdoffset; 1028*/ 1029 upr = adapter->upr_list; 1030 if (!upr) 1031 return; 1032 if (adapter->upr_busy) 1033 return; 1034 adapter->upr_busy = 1; 1035 1036 switch (upr->upr_request) { 1037 case SLIC_UPR_STATS: 1038 if (upr->upr_data_h == 0) { 1039 slic_reg32_write(&slic_regs->slic_stats, upr->upr_data, 1040 FLUSH); 1041 } else { 1042 slic_reg64_write(adapter, &slic_regs->slic_stats64, 1043 upr->upr_data, 1044 &slic_regs->slic_addr_upper, 1045 upr->upr_data_h, FLUSH); 1046 } 1047 break; 1048 1049 case SLIC_UPR_RLSR: 1050 slic_reg64_write(adapter, &slic_regs->slic_rlsr, upr->upr_data, 1051 &slic_regs->slic_addr_upper, upr->upr_data_h, 1052 FLUSH); 1053 break; 1054 1055 case SLIC_UPR_RCONFIG: 1056 slic_reg64_write(adapter, &slic_regs->slic_rconfig, 1057 upr->upr_data, &slic_regs->slic_addr_upper, 1058 upr->upr_data_h, FLUSH); 1059 break; 1060 case SLIC_UPR_PING: 1061 slic_reg32_write(&slic_regs->slic_ping, 1, FLUSH); 1062 break; 1063 default: 1064 ASSERT(0); 1065 } 1066} 1067 1068static int slic_upr_request(struct adapter *adapter, 1069 u32 upr_request, 1070 u32 upr_data, 1071 u32 upr_data_h, 1072 u32 upr_buffer, u32 upr_buffer_h) 1073{ 1074 int rc; 1075 1076 spin_lock_irqsave(&adapter->upr_lock.lock, adapter->upr_lock.flags); 1077 rc = slic_upr_queue_request(adapter, 1078 upr_request, 1079 upr_data, 1080 upr_data_h, upr_buffer, upr_buffer_h); 1081 if (rc) 1082 goto err_unlock_irq; 1083 1084 slic_upr_start(adapter); 1085err_unlock_irq: 1086 spin_unlock_irqrestore(&adapter->upr_lock.lock, 1087 adapter->upr_lock.flags); 1088 return rc; 1089} 1090 1091static void slic_link_upr_complete(struct adapter *adapter, u32 isr) 1092{ 1093 u32 linkstatus = adapter->pshmem->linkstatus; 1094 uint linkup; 1095 unsigned char linkspeed; 1096 unsigned char linkduplex; 1097 1098 if ((isr & ISR_UPCERR) || (isr & ISR_UPCBSY)) { 1099 struct slic_shmem *pshmem; 1100 1101 pshmem = (struct slic_shmem *)adapter->phys_shmem; 1102#if defined(CONFIG_X86_64) 1103 slic_upr_queue_request(adapter, 1104 SLIC_UPR_RLSR, 1105 SLIC_GET_ADDR_LOW(&pshmem->linkstatus), 1106 SLIC_GET_ADDR_HIGH(&pshmem->linkstatus), 1107 0, 0); 1108#elif defined(CONFIG_X86) 1109 slic_upr_queue_request(adapter, 1110 SLIC_UPR_RLSR, 1111 (u32) &pshmem->linkstatus, 1112 SLIC_GET_ADDR_HIGH(pshmem), 0, 0); 1113#else 1114 Stop Compilation; 1115#endif 1116 return; 1117 } 1118 if (adapter->state != ADAPT_UP) 1119 return; 1120 1121 ASSERT((adapter->devid == SLIC_1GB_DEVICE_ID) 1122 || (adapter->devid == SLIC_2GB_DEVICE_ID)); 1123 1124 linkup = linkstatus & GIG_LINKUP ? LINK_UP : LINK_DOWN; 1125 if (linkstatus & GIG_SPEED_1000) 1126 linkspeed = LINK_1000MB; 1127 else if (linkstatus & GIG_SPEED_100) 1128 linkspeed = LINK_100MB; 1129 else 1130 linkspeed = LINK_10MB; 1131 1132 if (linkstatus & GIG_FULLDUPLEX) 1133 linkduplex = LINK_FULLD; 1134 else 1135 linkduplex = LINK_HALFD; 1136 1137 if ((adapter->linkstate == LINK_DOWN) && (linkup == LINK_DOWN)) 1138 return; 1139 1140 /* link up event, but nothing has changed */ 1141 if ((adapter->linkstate == LINK_UP) && 1142 (linkup == LINK_UP) && 1143 (adapter->linkspeed == linkspeed) && 1144 (adapter->linkduplex == linkduplex)) 1145 return; 1146 1147 /* link has changed at this point */ 1148 1149 /* link has gone from up to down */ 1150 if (linkup == LINK_DOWN) { 1151 adapter->linkstate = LINK_DOWN; 1152 return; 1153 } 1154 1155 /* link has gone from down to up */ 1156 adapter->linkspeed = linkspeed; 1157 adapter->linkduplex = linkduplex; 1158 1159 if (adapter->linkstate != LINK_UP) { 1160 /* setup the mac */ 1161 slic_config_set(adapter, true); 1162 adapter->linkstate = LINK_UP; 1163 netif_start_queue(adapter->netdev); 1164 } 1165} 1166 1167static void slic_upr_request_complete(struct adapter *adapter, u32 isr) 1168{ 1169 struct sliccard *card = adapter->card; 1170 struct slic_upr *upr; 1171 1172 spin_lock_irqsave(&adapter->upr_lock.lock, adapter->upr_lock.flags); 1173 upr = adapter->upr_list; 1174 if (!upr) { 1175 ASSERT(0); 1176 spin_unlock_irqrestore(&adapter->upr_lock.lock, 1177 adapter->upr_lock.flags); 1178 return; 1179 } 1180 adapter->upr_list = upr->next; 1181 upr->next = NULL; 1182 adapter->upr_busy = 0; 1183 ASSERT(adapter->port == upr->adapter); 1184 switch (upr->upr_request) { 1185 case SLIC_UPR_STATS: 1186 { 1187 struct slic_stats *slicstats = 1188 (struct slic_stats *) &adapter->pshmem->inicstats; 1189 struct slic_stats *newstats = slicstats; 1190 struct slic_stats *old = &adapter->inicstats_prev; 1191 struct slicnet_stats *stst = &adapter->slic_stats; 1192 1193 if (isr & ISR_UPCERR) { 1194 dev_err(&adapter->netdev->dev, 1195 "SLIC_UPR_STATS command failed isr[%x]\n", 1196 isr); 1197 1198 break; 1199 } 1200 UPDATE_STATS_GB(stst->tcp.xmit_tcp_segs, 1201 newstats->xmit_tcp_segs_gb, 1202 old->xmit_tcp_segs_gb); 1203 1204 UPDATE_STATS_GB(stst->tcp.xmit_tcp_bytes, 1205 newstats->xmit_tcp_bytes_gb, 1206 old->xmit_tcp_bytes_gb); 1207 1208 UPDATE_STATS_GB(stst->tcp.rcv_tcp_segs, 1209 newstats->rcv_tcp_segs_gb, 1210 old->rcv_tcp_segs_gb); 1211 1212 UPDATE_STATS_GB(stst->tcp.rcv_tcp_bytes, 1213 newstats->rcv_tcp_bytes_gb, 1214 old->rcv_tcp_bytes_gb); 1215 1216 UPDATE_STATS_GB(stst->iface.xmt_bytes, 1217 newstats->xmit_bytes_gb, 1218 old->xmit_bytes_gb); 1219 1220 UPDATE_STATS_GB(stst->iface.xmt_ucast, 1221 newstats->xmit_unicasts_gb, 1222 old->xmit_unicasts_gb); 1223 1224 UPDATE_STATS_GB(stst->iface.rcv_bytes, 1225 newstats->rcv_bytes_gb, 1226 old->rcv_bytes_gb); 1227 1228 UPDATE_STATS_GB(stst->iface.rcv_ucast, 1229 newstats->rcv_unicasts_gb, 1230 old->rcv_unicasts_gb); 1231 1232 UPDATE_STATS_GB(stst->iface.xmt_errors, 1233 newstats->xmit_collisions_gb, 1234 old->xmit_collisions_gb); 1235 1236 UPDATE_STATS_GB(stst->iface.xmt_errors, 1237 newstats->xmit_excess_collisions_gb, 1238 old->xmit_excess_collisions_gb); 1239 1240 UPDATE_STATS_GB(stst->iface.xmt_errors, 1241 newstats->xmit_other_error_gb, 1242 old->xmit_other_error_gb); 1243 1244 UPDATE_STATS_GB(stst->iface.rcv_errors, 1245 newstats->rcv_other_error_gb, 1246 old->rcv_other_error_gb); 1247 1248 UPDATE_STATS_GB(stst->iface.rcv_discards, 1249 newstats->rcv_drops_gb, 1250 old->rcv_drops_gb); 1251 1252 if (newstats->rcv_drops_gb > old->rcv_drops_gb) { 1253 adapter->rcv_drops += 1254 (newstats->rcv_drops_gb - 1255 old->rcv_drops_gb); 1256 } 1257 memcpy(old, newstats, sizeof(struct slic_stats)); 1258 break; 1259 } 1260 case SLIC_UPR_RLSR: 1261 slic_link_upr_complete(adapter, isr); 1262 break; 1263 case SLIC_UPR_RCONFIG: 1264 break; 1265 case SLIC_UPR_RPHY: 1266 ASSERT(0); 1267 break; 1268 case SLIC_UPR_ENLB: 1269 ASSERT(0); 1270 break; 1271 case SLIC_UPR_ENCT: 1272 ASSERT(0); 1273 break; 1274 case SLIC_UPR_PDWN: 1275 ASSERT(0); 1276 break; 1277 case SLIC_UPR_PING: 1278 card->pingstatus |= (isr & ISR_PINGDSMASK); 1279 break; 1280 default: 1281 ASSERT(0); 1282 } 1283 kfree(upr); 1284 slic_upr_start(adapter); 1285 spin_unlock_irqrestore(&adapter->upr_lock.lock, 1286 adapter->upr_lock.flags); 1287} 1288 1289static void slic_config_get(struct adapter *adapter, u32 config, 1290 u32 config_h) 1291{ 1292 int status; 1293 1294 status = slic_upr_request(adapter, 1295 SLIC_UPR_RCONFIG, 1296 (u32) config, (u32) config_h, 0, 0); 1297 ASSERT(status == 0); 1298} 1299 1300/* 1301 * this is here to checksum the eeprom, there is some ucode bug 1302 * which prevens us from using the ucode result. 1303 * remove this once ucode is fixed. 1304 */ 1305static ushort slic_eeprom_cksum(char *m, int len) 1306{ 1307#define ADDCARRY(x) (x > 65535 ? x -= 65535 : x) 1308#define REDUCE {l_util.l = sum; sum = l_util.s[0] + l_util.s[1]; ADDCARRY(sum);\ 1309 } 1310 1311 u16 *w; 1312 u32 sum = 0; 1313 u32 byte_swapped = 0; 1314 u32 w_int; 1315 1316 union { 1317 char c[2]; 1318 ushort s; 1319 } s_util; 1320 1321 union { 1322 ushort s[2]; 1323 int l; 1324 } l_util; 1325 1326 l_util.l = 0; 1327 s_util.s = 0; 1328 1329 w = (u16 *)m; 1330#ifdef CONFIG_X86_64 1331 w_int = (u32) ((ulong) w & 0x00000000FFFFFFFF); 1332#else 1333 w_int = (u32) (w); 1334#endif 1335 if ((1 & w_int) && (len > 0)) { 1336 REDUCE; 1337 sum <<= 8; 1338 s_util.c[0] = *(unsigned char *)w; 1339 w = (u16 *)((char *)w + 1); 1340 len--; 1341 byte_swapped = 1; 1342 } 1343 1344 /* Unroll the loop to make overhead from branches &c small. */ 1345 while ((len -= 32) >= 0) { 1346 sum += w[0]; 1347 sum += w[1]; 1348 sum += w[2]; 1349 sum += w[3]; 1350 sum += w[4]; 1351 sum += w[5]; 1352 sum += w[6]; 1353 sum += w[7]; 1354 sum += w[8]; 1355 sum += w[9]; 1356 sum += w[10]; 1357 sum += w[11]; 1358 sum += w[12]; 1359 sum += w[13]; 1360 sum += w[14]; 1361 sum += w[15]; 1362 w = (u16 *)((ulong) w + 16); /* verify */ 1363 } 1364 len += 32; 1365 while ((len -= 8) >= 0) { 1366 sum += w[0]; 1367 sum += w[1]; 1368 sum += w[2]; 1369 sum += w[3]; 1370 w = (u16 *)((ulong) w + 4); /* verify */ 1371 } 1372 len += 8; 1373 if (len != 0 || byte_swapped != 0) { 1374 REDUCE; 1375 while ((len -= 2) >= 0) 1376 sum += *w++; /* verify */ 1377 if (byte_swapped) { 1378 REDUCE; 1379 sum <<= 8; 1380 byte_swapped = 0; 1381 if (len == -1) { 1382 s_util.c[1] = *(char *) w; 1383 sum += s_util.s; 1384 len = 0; 1385 } else { 1386 len = -1; 1387 } 1388 1389 } else if (len == -1) { 1390 s_util.c[0] = *(char *) w; 1391 } 1392 1393 if (len == -1) { 1394 s_util.c[1] = 0; 1395 sum += s_util.s; 1396 } 1397 } 1398 REDUCE; 1399 return (ushort) sum; 1400} 1401 1402static void slic_rspqueue_free(struct adapter *adapter) 1403{ 1404 int i; 1405 struct slic_rspqueue *rspq = &adapter->rspqueue; 1406 1407 for (i = 0; i < rspq->num_pages; i++) { 1408 if (rspq->vaddr[i]) { 1409 pci_free_consistent(adapter->pcidev, PAGE_SIZE, 1410 rspq->vaddr[i], rspq->paddr[i]); 1411 } 1412 rspq->vaddr[i] = NULL; 1413 rspq->paddr[i] = 0; 1414 } 1415 rspq->offset = 0; 1416 rspq->pageindex = 0; 1417 rspq->rspbuf = NULL; 1418} 1419 1420static int slic_rspqueue_init(struct adapter *adapter) 1421{ 1422 int i; 1423 struct slic_rspqueue *rspq = &adapter->rspqueue; 1424 __iomem struct slic_regs *slic_regs = adapter->slic_regs; 1425 u32 paddrh = 0; 1426 1427 ASSERT(adapter->state == ADAPT_DOWN); 1428 memset(rspq, 0, sizeof(struct slic_rspqueue)); 1429 1430 rspq->num_pages = SLIC_RSPQ_PAGES_GB; 1431 1432 for (i = 0; i < rspq->num_pages; i++) { 1433 rspq->vaddr[i] = pci_alloc_consistent(adapter->pcidev, 1434 PAGE_SIZE, 1435 &rspq->paddr[i]); 1436 if (!rspq->vaddr[i]) { 1437 dev_err(&adapter->pcidev->dev, 1438 "pci_alloc_consistent failed\n"); 1439 slic_rspqueue_free(adapter); 1440 return -ENOMEM; 1441 } 1442#ifndef CONFIG_X86_64 1443 ASSERT(((u32) rspq->vaddr[i] & 0xFFFFF000) == 1444 (u32) rspq->vaddr[i]); 1445 ASSERT(((u32) rspq->paddr[i] & 0xFFFFF000) == 1446 (u32) rspq->paddr[i]); 1447#endif 1448 memset(rspq->vaddr[i], 0, PAGE_SIZE); 1449 1450 if (paddrh == 0) { 1451 slic_reg32_write(&slic_regs->slic_rbar, 1452 (rspq->paddr[i] | SLIC_RSPQ_BUFSINPAGE), 1453 DONT_FLUSH); 1454 } else { 1455 slic_reg64_write(adapter, &slic_regs->slic_rbar64, 1456 (rspq->paddr[i] | SLIC_RSPQ_BUFSINPAGE), 1457 &slic_regs->slic_addr_upper, 1458 paddrh, DONT_FLUSH); 1459 } 1460 } 1461 rspq->offset = 0; 1462 rspq->pageindex = 0; 1463 rspq->rspbuf = (struct slic_rspbuf *)rspq->vaddr[0]; 1464 return 0; 1465} 1466 1467static struct slic_rspbuf *slic_rspqueue_getnext(struct adapter *adapter) 1468{ 1469 struct slic_rspqueue *rspq = &adapter->rspqueue; 1470 struct slic_rspbuf *buf; 1471 1472 if (!(rspq->rspbuf->status)) 1473 return NULL; 1474 1475 buf = rspq->rspbuf; 1476#ifndef CONFIG_X86_64 1477 ASSERT((buf->status & 0xFFFFFFE0) == 0); 1478#endif 1479 ASSERT(buf->hosthandle); 1480 if (++rspq->offset < SLIC_RSPQ_BUFSINPAGE) { 1481 rspq->rspbuf++; 1482#ifndef CONFIG_X86_64 1483 ASSERT(((u32) rspq->rspbuf & 0xFFFFFFE0) == 1484 (u32) rspq->rspbuf); 1485#endif 1486 } else { 1487 ASSERT(rspq->offset == SLIC_RSPQ_BUFSINPAGE); 1488 slic_reg64_write(adapter, &adapter->slic_regs->slic_rbar64, 1489 (rspq->paddr[rspq->pageindex] | SLIC_RSPQ_BUFSINPAGE), 1490 &adapter->slic_regs->slic_addr_upper, 0, DONT_FLUSH); 1491 rspq->pageindex = (++rspq->pageindex) % rspq->num_pages; 1492 rspq->offset = 0; 1493 rspq->rspbuf = (struct slic_rspbuf *) 1494 rspq->vaddr[rspq->pageindex]; 1495#ifndef CONFIG_X86_64 1496 ASSERT(((u32) rspq->rspbuf & 0xFFFFF000) == 1497 (u32) rspq->rspbuf); 1498#endif 1499 } 1500#ifndef CONFIG_X86_64 1501 ASSERT(((u32) buf & 0xFFFFFFE0) == (u32) buf); 1502#endif 1503 return buf; 1504} 1505 1506static void slic_cmdqmem_init(struct adapter *adapter) 1507{ 1508 struct slic_cmdqmem *cmdqmem = &adapter->cmdqmem; 1509 1510 memset(cmdqmem, 0, sizeof(struct slic_cmdqmem)); 1511} 1512 1513static void slic_cmdqmem_free(struct adapter *adapter) 1514{ 1515 struct slic_cmdqmem *cmdqmem = &adapter->cmdqmem; 1516 int i; 1517 1518 for (i = 0; i < SLIC_CMDQ_MAXPAGES; i++) { 1519 if (cmdqmem->pages[i]) { 1520 pci_free_consistent(adapter->pcidev, 1521 PAGE_SIZE, 1522 (void *) cmdqmem->pages[i], 1523 cmdqmem->dma_pages[i]); 1524 } 1525 } 1526 memset(cmdqmem, 0, sizeof(struct slic_cmdqmem)); 1527} 1528 1529static u32 *slic_cmdqmem_addpage(struct adapter *adapter) 1530{ 1531 struct slic_cmdqmem *cmdqmem = &adapter->cmdqmem; 1532 u32 *pageaddr; 1533 1534 if (cmdqmem->pagecnt >= SLIC_CMDQ_MAXPAGES) 1535 return NULL; 1536 pageaddr = pci_alloc_consistent(adapter->pcidev, 1537 PAGE_SIZE, 1538 &cmdqmem->dma_pages[cmdqmem->pagecnt]); 1539 if (!pageaddr) 1540 return NULL; 1541#ifndef CONFIG_X86_64 1542 ASSERT(((u32) pageaddr & 0xFFFFF000) == (u32) pageaddr); 1543#endif 1544 cmdqmem->pages[cmdqmem->pagecnt] = pageaddr; 1545 cmdqmem->pagecnt++; 1546 return pageaddr; 1547} 1548 1549static void slic_cmdq_free(struct adapter *adapter) 1550{ 1551 struct slic_hostcmd *cmd; 1552 1553 cmd = adapter->cmdq_all.head; 1554 while (cmd) { 1555 if (cmd->busy) { 1556 struct sk_buff *tempskb; 1557 1558 tempskb = cmd->skb; 1559 if (tempskb) { 1560 cmd->skb = NULL; 1561 dev_kfree_skb_irq(tempskb); 1562 } 1563 } 1564 cmd = cmd->next_all; 1565 } 1566 memset(&adapter->cmdq_all, 0, sizeof(struct slic_cmdqueue)); 1567 memset(&adapter->cmdq_free, 0, sizeof(struct slic_cmdqueue)); 1568 memset(&adapter->cmdq_done, 0, sizeof(struct slic_cmdqueue)); 1569 slic_cmdqmem_free(adapter); 1570} 1571 1572static void slic_cmdq_addcmdpage(struct adapter *adapter, u32 *page) 1573{ 1574 struct slic_hostcmd *cmd; 1575 struct slic_hostcmd *prev; 1576 struct slic_hostcmd *tail; 1577 struct slic_cmdqueue *cmdq; 1578 int cmdcnt; 1579 void *cmdaddr; 1580 ulong phys_addr; 1581 u32 phys_addrl; 1582 u32 phys_addrh; 1583 struct slic_handle *pslic_handle; 1584 1585 cmdaddr = page; 1586 cmd = (struct slic_hostcmd *)cmdaddr; 1587 cmdcnt = 0; 1588 1589 phys_addr = virt_to_bus((void *)page); 1590 phys_addrl = SLIC_GET_ADDR_LOW(phys_addr); 1591 phys_addrh = SLIC_GET_ADDR_HIGH(phys_addr); 1592 1593 prev = NULL; 1594 tail = cmd; 1595 while ((cmdcnt < SLIC_CMDQ_CMDSINPAGE) && 1596 (adapter->slic_handle_ix < 256)) { 1597 /* Allocate and initialize a SLIC_HANDLE for this command */ 1598 SLIC_GET_SLIC_HANDLE(adapter, pslic_handle); 1599 if (pslic_handle == NULL) 1600 ASSERT(0); 1601 ASSERT(pslic_handle == 1602 &adapter->slic_handles[pslic_handle->token. 1603 handle_index]); 1604 pslic_handle->type = SLIC_HANDLE_CMD; 1605 pslic_handle->address = (void *) cmd; 1606 pslic_handle->offset = (ushort) adapter->slic_handle_ix++; 1607 pslic_handle->other_handle = NULL; 1608 pslic_handle->next = NULL; 1609 1610 cmd->pslic_handle = pslic_handle; 1611 cmd->cmd64.hosthandle = pslic_handle->token.handle_token; 1612 cmd->busy = false; 1613 cmd->paddrl = phys_addrl; 1614 cmd->paddrh = phys_addrh; 1615 cmd->next_all = prev; 1616 cmd->next = prev; 1617 prev = cmd; 1618 phys_addrl += SLIC_HOSTCMD_SIZE; 1619 cmdaddr += SLIC_HOSTCMD_SIZE; 1620 1621 cmd = (struct slic_hostcmd *)cmdaddr; 1622 cmdcnt++; 1623 } 1624 1625 cmdq = &adapter->cmdq_all; 1626 cmdq->count += cmdcnt; /* SLIC_CMDQ_CMDSINPAGE; mooktodo */ 1627 tail->next_all = cmdq->head; 1628 cmdq->head = prev; 1629 cmdq = &adapter->cmdq_free; 1630 spin_lock_irqsave(&cmdq->lock.lock, cmdq->lock.flags); 1631 cmdq->count += cmdcnt; /* SLIC_CMDQ_CMDSINPAGE; mooktodo */ 1632 tail->next = cmdq->head; 1633 cmdq->head = prev; 1634 spin_unlock_irqrestore(&cmdq->lock.lock, cmdq->lock.flags); 1635} 1636 1637static int slic_cmdq_init(struct adapter *adapter) 1638{ 1639 int i; 1640 u32 *pageaddr; 1641 1642 ASSERT(adapter->state == ADAPT_DOWN); 1643 memset(&adapter->cmdq_all, 0, sizeof(struct slic_cmdqueue)); 1644 memset(&adapter->cmdq_free, 0, sizeof(struct slic_cmdqueue)); 1645 memset(&adapter->cmdq_done, 0, sizeof(struct slic_cmdqueue)); 1646 spin_lock_init(&adapter->cmdq_all.lock.lock); 1647 spin_lock_init(&adapter->cmdq_free.lock.lock); 1648 spin_lock_init(&adapter->cmdq_done.lock.lock); 1649 slic_cmdqmem_init(adapter); 1650 adapter->slic_handle_ix = 1; 1651 for (i = 0; i < SLIC_CMDQ_INITPAGES; i++) { 1652 pageaddr = slic_cmdqmem_addpage(adapter); 1653#ifndef CONFIG_X86_64 1654 ASSERT(((u32) pageaddr & 0xFFFFF000) == (u32) pageaddr); 1655#endif 1656 if (!pageaddr) { 1657 slic_cmdq_free(adapter); 1658 return -ENOMEM; 1659 } 1660 slic_cmdq_addcmdpage(adapter, pageaddr); 1661 } 1662 adapter->slic_handle_ix = 1; 1663 1664 return 0; 1665} 1666 1667static void slic_cmdq_reset(struct adapter *adapter) 1668{ 1669 struct slic_hostcmd *hcmd; 1670 struct sk_buff *skb; 1671 u32 outstanding; 1672 1673 spin_lock_irqsave(&adapter->cmdq_free.lock.lock, 1674 adapter->cmdq_free.lock.flags); 1675 spin_lock_irqsave(&adapter->cmdq_done.lock.lock, 1676 adapter->cmdq_done.lock.flags); 1677 outstanding = adapter->cmdq_all.count - adapter->cmdq_done.count; 1678 outstanding -= adapter->cmdq_free.count; 1679 hcmd = adapter->cmdq_all.head; 1680 while (hcmd) { 1681 if (hcmd->busy) { 1682 skb = hcmd->skb; 1683 ASSERT(skb); 1684 hcmd->busy = 0; 1685 hcmd->skb = NULL; 1686 dev_kfree_skb_irq(skb); 1687 } 1688 hcmd = hcmd->next_all; 1689 } 1690 adapter->cmdq_free.count = 0; 1691 adapter->cmdq_free.head = NULL; 1692 adapter->cmdq_free.tail = NULL; 1693 adapter->cmdq_done.count = 0; 1694 adapter->cmdq_done.head = NULL; 1695 adapter->cmdq_done.tail = NULL; 1696 adapter->cmdq_free.head = adapter->cmdq_all.head; 1697 hcmd = adapter->cmdq_all.head; 1698 while (hcmd) { 1699 adapter->cmdq_free.count++; 1700 hcmd->next = hcmd->next_all; 1701 hcmd = hcmd->next_all; 1702 } 1703 if (adapter->cmdq_free.count != adapter->cmdq_all.count) { 1704 dev_err(&adapter->netdev->dev, 1705 "free_count %d != all count %d\n", 1706 adapter->cmdq_free.count, adapter->cmdq_all.count); 1707 } 1708 spin_unlock_irqrestore(&adapter->cmdq_done.lock.lock, 1709 adapter->cmdq_done.lock.flags); 1710 spin_unlock_irqrestore(&adapter->cmdq_free.lock.lock, 1711 adapter->cmdq_free.lock.flags); 1712} 1713 1714static void slic_cmdq_getdone(struct adapter *adapter) 1715{ 1716 struct slic_cmdqueue *done_cmdq = &adapter->cmdq_done; 1717 struct slic_cmdqueue *free_cmdq = &adapter->cmdq_free; 1718 1719 ASSERT(free_cmdq->head == NULL); 1720 spin_lock_irqsave(&done_cmdq->lock.lock, done_cmdq->lock.flags); 1721 1722 free_cmdq->head = done_cmdq->head; 1723 free_cmdq->count = done_cmdq->count; 1724 done_cmdq->head = NULL; 1725 done_cmdq->tail = NULL; 1726 done_cmdq->count = 0; 1727 spin_unlock_irqrestore(&done_cmdq->lock.lock, done_cmdq->lock.flags); 1728} 1729 1730static struct slic_hostcmd *slic_cmdq_getfree(struct adapter *adapter) 1731{ 1732 struct slic_cmdqueue *cmdq = &adapter->cmdq_free; 1733 struct slic_hostcmd *cmd = NULL; 1734 1735lock_and_retry: 1736 spin_lock_irqsave(&cmdq->lock.lock, cmdq->lock.flags); 1737retry: 1738 cmd = cmdq->head; 1739 if (cmd) { 1740 cmdq->head = cmd->next; 1741 cmdq->count--; 1742 spin_unlock_irqrestore(&cmdq->lock.lock, cmdq->lock.flags); 1743 } else { 1744 slic_cmdq_getdone(adapter); 1745 cmd = cmdq->head; 1746 if (cmd) { 1747 goto retry; 1748 } else { 1749 u32 *pageaddr; 1750 1751 spin_unlock_irqrestore(&cmdq->lock.lock, 1752 cmdq->lock.flags); 1753 pageaddr = slic_cmdqmem_addpage(adapter); 1754 if (pageaddr) { 1755 slic_cmdq_addcmdpage(adapter, pageaddr); 1756 goto lock_and_retry; 1757 } 1758 } 1759 } 1760 return cmd; 1761} 1762 1763static void slic_cmdq_putdone_irq(struct adapter *adapter, 1764 struct slic_hostcmd *cmd) 1765{ 1766 struct slic_cmdqueue *cmdq = &adapter->cmdq_done; 1767 1768 spin_lock(&cmdq->lock.lock); 1769 cmd->busy = 0; 1770 cmd->next = cmdq->head; 1771 cmdq->head = cmd; 1772 cmdq->count++; 1773 if ((adapter->xmitq_full) && (cmdq->count > 10)) 1774 netif_wake_queue(adapter->netdev); 1775 spin_unlock(&cmdq->lock.lock); 1776} 1777 1778static int slic_rcvqueue_fill(struct adapter *adapter) 1779{ 1780 void *paddr; 1781 u32 paddrl; 1782 u32 paddrh; 1783 struct slic_rcvqueue *rcvq = &adapter->rcvqueue; 1784 int i = 0; 1785 struct device *dev = &adapter->netdev->dev; 1786 1787 while (i < SLIC_RCVQ_FILLENTRIES) { 1788 struct slic_rcvbuf *rcvbuf; 1789 struct sk_buff *skb; 1790#ifdef KLUDGE_FOR_4GB_BOUNDARY 1791retry_rcvqfill: 1792#endif 1793 skb = alloc_skb(SLIC_RCVQ_RCVBUFSIZE, GFP_ATOMIC); 1794 if (skb) { 1795 paddr = (void *)pci_map_single(adapter->pcidev, 1796 skb->data, 1797 SLIC_RCVQ_RCVBUFSIZE, 1798 PCI_DMA_FROMDEVICE); 1799 paddrl = SLIC_GET_ADDR_LOW(paddr); 1800 paddrh = SLIC_GET_ADDR_HIGH(paddr); 1801 1802 skb->len = SLIC_RCVBUF_HEADSIZE; 1803 rcvbuf = (struct slic_rcvbuf *)skb->head; 1804 rcvbuf->status = 0; 1805 skb->next = NULL; 1806#ifdef KLUDGE_FOR_4GB_BOUNDARY 1807 if (paddrl == 0) { 1808 dev_err(dev, "%s: LOW 32bits PHYSICAL ADDRESS == 0\n", 1809 __func__); 1810 dev_err(dev, "skb[%p] PROBLEM\n", skb); 1811 dev_err(dev, " skbdata[%p]\n", skb->data); 1812 dev_err(dev, " skblen[%x]\n", skb->len); 1813 dev_err(dev, " paddr[%p]\n", paddr); 1814 dev_err(dev, " paddrl[%x]\n", paddrl); 1815 dev_err(dev, " paddrh[%x]\n", paddrh); 1816 dev_err(dev, " rcvq->head[%p]\n", rcvq->head); 1817 dev_err(dev, " rcvq->tail[%p]\n", rcvq->tail); 1818 dev_err(dev, " rcvq->count[%x]\n", rcvq->count); 1819 dev_err(dev, "SKIP THIS SKB!!!!!!!!\n"); 1820 goto retry_rcvqfill; 1821 } 1822#else 1823 if (paddrl == 0) { 1824 dev_err(dev, "%s: LOW 32bits PHYSICAL ADDRESS == 0\n", 1825 __func__); 1826 dev_err(dev, "skb[%p] PROBLEM\n", skb); 1827 dev_err(dev, " skbdata[%p]\n", skb->data); 1828 dev_err(dev, " skblen[%x]\n", skb->len); 1829 dev_err(dev, " paddr[%p]\n", paddr); 1830 dev_err(dev, " paddrl[%x]\n", paddrl); 1831 dev_err(dev, " paddrh[%x]\n", paddrh); 1832 dev_err(dev, " rcvq->head[%p]\n", rcvq->head); 1833 dev_err(dev, " rcvq->tail[%p]\n", rcvq->tail); 1834 dev_err(dev, " rcvq->count[%x]\n", rcvq->count); 1835 dev_err(dev, "GIVE TO CARD ANYWAY\n"); 1836 } 1837#endif 1838 if (paddrh == 0) { 1839 slic_reg32_write(&adapter->slic_regs->slic_hbar, 1840 (u32)paddrl, DONT_FLUSH); 1841 } else { 1842 slic_reg64_write(adapter, 1843 &adapter->slic_regs->slic_hbar64, 1844 paddrl, 1845 &adapter->slic_regs->slic_addr_upper, 1846 paddrh, DONT_FLUSH); 1847 } 1848 if (rcvq->head) 1849 rcvq->tail->next = skb; 1850 else 1851 rcvq->head = skb; 1852 rcvq->tail = skb; 1853 rcvq->count++; 1854 i++; 1855 } else { 1856 dev_err(&adapter->netdev->dev, 1857 "slic_rcvqueue_fill could only get [%d] skbuffs\n", 1858 i); 1859 break; 1860 } 1861 } 1862 return i; 1863} 1864 1865static void slic_rcvqueue_free(struct adapter *adapter) 1866{ 1867 struct slic_rcvqueue *rcvq = &adapter->rcvqueue; 1868 struct sk_buff *skb; 1869 1870 while (rcvq->head) { 1871 skb = rcvq->head; 1872 rcvq->head = rcvq->head->next; 1873 dev_kfree_skb(skb); 1874 } 1875 rcvq->tail = NULL; 1876 rcvq->head = NULL; 1877 rcvq->count = 0; 1878} 1879 1880static int slic_rcvqueue_init(struct adapter *adapter) 1881{ 1882 int i, count; 1883 struct slic_rcvqueue *rcvq = &adapter->rcvqueue; 1884 1885 ASSERT(adapter->state == ADAPT_DOWN); 1886 rcvq->tail = NULL; 1887 rcvq->head = NULL; 1888 rcvq->size = SLIC_RCVQ_ENTRIES; 1889 rcvq->errors = 0; 1890 rcvq->count = 0; 1891 i = (SLIC_RCVQ_ENTRIES / SLIC_RCVQ_FILLENTRIES); 1892 count = 0; 1893 while (i) { 1894 count += slic_rcvqueue_fill(adapter); 1895 i--; 1896 } 1897 if (rcvq->count < SLIC_RCVQ_MINENTRIES) { 1898 slic_rcvqueue_free(adapter); 1899 return -ENOMEM; 1900 } 1901 return 0; 1902} 1903 1904static struct sk_buff *slic_rcvqueue_getnext(struct adapter *adapter) 1905{ 1906 struct slic_rcvqueue *rcvq = &adapter->rcvqueue; 1907 struct sk_buff *skb; 1908 struct slic_rcvbuf *rcvbuf; 1909 int count; 1910 1911 if (rcvq->count) { 1912 skb = rcvq->head; 1913 rcvbuf = (struct slic_rcvbuf *)skb->head; 1914 ASSERT(rcvbuf); 1915 1916 if (rcvbuf->status & IRHDDR_SVALID) { 1917 rcvq->head = rcvq->head->next; 1918 skb->next = NULL; 1919 rcvq->count--; 1920 } else { 1921 skb = NULL; 1922 } 1923 } else { 1924 dev_err(&adapter->netdev->dev, 1925 "RcvQ Empty!! rcvq[%p] count[%x]\n", rcvq, rcvq->count); 1926 skb = NULL; 1927 } 1928 while (rcvq->count < SLIC_RCVQ_FILLTHRESH) { 1929 count = slic_rcvqueue_fill(adapter); 1930 if (!count) 1931 break; 1932 } 1933 if (skb) 1934 rcvq->errors = 0; 1935 return skb; 1936} 1937 1938static u32 slic_rcvqueue_reinsert(struct adapter *adapter, struct sk_buff *skb) 1939{ 1940 struct slic_rcvqueue *rcvq = &adapter->rcvqueue; 1941 void *paddr; 1942 u32 paddrl; 1943 u32 paddrh; 1944 struct slic_rcvbuf *rcvbuf = (struct slic_rcvbuf *)skb->head; 1945 struct device *dev; 1946 1947 ASSERT(skb->len == SLIC_RCVBUF_HEADSIZE); 1948 1949 paddr = (void *)pci_map_single(adapter->pcidev, skb->head, 1950 SLIC_RCVQ_RCVBUFSIZE, PCI_DMA_FROMDEVICE); 1951 rcvbuf->status = 0; 1952 skb->next = NULL; 1953 1954 paddrl = SLIC_GET_ADDR_LOW(paddr); 1955 paddrh = SLIC_GET_ADDR_HIGH(paddr); 1956 1957 if (paddrl == 0) { 1958 dev = &adapter->netdev->dev; 1959 dev_err(dev, "%s: LOW 32bits PHYSICAL ADDRESS == 0\n", 1960 __func__); 1961 dev_err(dev, "skb[%p] PROBLEM\n", skb); 1962 dev_err(dev, " skbdata[%p]\n", skb->data); 1963 dev_err(dev, " skblen[%x]\n", skb->len); 1964 dev_err(dev, " paddr[%p]\n", paddr); 1965 dev_err(dev, " paddrl[%x]\n", paddrl); 1966 dev_err(dev, " paddrh[%x]\n", paddrh); 1967 dev_err(dev, " rcvq->head[%p]\n", rcvq->head); 1968 dev_err(dev, " rcvq->tail[%p]\n", rcvq->tail); 1969 dev_err(dev, " rcvq->count[%x]\n", rcvq->count); 1970 } 1971 if (paddrh == 0) { 1972 slic_reg32_write(&adapter->slic_regs->slic_hbar, (u32)paddrl, 1973 DONT_FLUSH); 1974 } else { 1975 slic_reg64_write(adapter, &adapter->slic_regs->slic_hbar64, 1976 paddrl, &adapter->slic_regs->slic_addr_upper, 1977 paddrh, DONT_FLUSH); 1978 } 1979 if (rcvq->head) 1980 rcvq->tail->next = skb; 1981 else 1982 rcvq->head = skb; 1983 rcvq->tail = skb; 1984 rcvq->count++; 1985 return rcvq->count; 1986} 1987 1988static int slic_debug_card_show(struct seq_file *seq, void *v) 1989{ 1990#ifdef MOOKTODO 1991 int i; 1992 struct sliccard *card = seq->private; 1993 struct slic_config *config = &card->config; 1994 unsigned char *fru = (unsigned char *)(&card->config.atk_fru); 1995 unsigned char *oemfru = (unsigned char *)(&card->config.OemFru); 1996#endif 1997 1998 seq_printf(seq, "driver_version : %s\n", slic_proc_version); 1999 seq_printf(seq, "Microcode versions: \n"); 2000 seq_printf(seq, " Gigabit (gb) : %s %s\n", 2001 MOJAVE_UCODE_VERS_STRING, MOJAVE_UCODE_VERS_DATE); 2002 seq_printf(seq, " Gigabit Receiver : %s %s\n", 2003 GB_RCVUCODE_VERS_STRING, GB_RCVUCODE_VERS_DATE); 2004 seq_printf(seq, "Vendor : %s\n", slic_vendor); 2005 seq_printf(seq, "Product Name : %s\n", slic_product_name); 2006#ifdef MOOKTODO 2007 seq_printf(seq, "VendorId : %4.4X\n", 2008 config->VendorId); 2009 seq_printf(seq, "DeviceId : %4.4X\n", 2010 config->DeviceId); 2011 seq_printf(seq, "RevisionId : %2.2x\n", 2012 config->RevisionId); 2013 seq_printf(seq, "Bus # : %d\n", card->busnumber); 2014 seq_printf(seq, "Device # : %d\n", card->slotnumber); 2015 seq_printf(seq, "Interfaces : %d\n", card->card_size); 2016 seq_printf(seq, " Initialized : %d\n", 2017 card->adapters_activated); 2018 seq_printf(seq, " Allocated : %d\n", 2019 card->adapters_allocated); 2020 ASSERT(card->card_size <= SLIC_NBR_MACS); 2021 for (i = 0; i < card->card_size; i++) { 2022 seq_printf(seq, 2023 " MAC%d : %2.2X %2.2X %2.2X %2.2X %2.2X %2.2X\n", 2024 i, config->macinfo[i].macaddrA[0], 2025 config->macinfo[i].macaddrA[1], 2026 config->macinfo[i].macaddrA[2], 2027 config->macinfo[i].macaddrA[3], 2028 config->macinfo[i].macaddrA[4], 2029 config->macinfo[i].macaddrA[5]); 2030 } 2031 seq_printf(seq, " IF Init State Duplex/Speed irq\n"); 2032 seq_printf(seq, " -------------------------------\n"); 2033 for (i = 0; i < card->adapters_allocated; i++) { 2034 struct adapter *adapter; 2035 2036 adapter = card->adapter[i]; 2037 if (adapter) { 2038 seq_printf(seq, 2039 " %d %d %s %s %s 0x%X\n", 2040 adapter->physport, adapter->state, 2041 SLIC_LINKSTATE(adapter->linkstate), 2042 SLIC_DUPLEX(adapter->linkduplex), 2043 SLIC_SPEED(adapter->linkspeed), 2044 (uint) adapter->irq); 2045 } 2046 } 2047 seq_printf(seq, "Generation # : %4.4X\n", card->gennumber); 2048 seq_printf(seq, "RcvQ max entries : %4.4X\n", 2049 SLIC_RCVQ_ENTRIES); 2050 seq_printf(seq, "Ping Status : %8.8X\n", 2051 card->pingstatus); 2052 seq_printf(seq, "Minimum grant : %2.2x\n", 2053 config->MinGrant); 2054 seq_printf(seq, "Maximum Latency : %2.2x\n", config->MaxLat); 2055 seq_printf(seq, "PciStatus : %4.4x\n", 2056 config->Pcistatus); 2057 seq_printf(seq, "Debug Device Id : %4.4x\n", 2058 config->DbgDevId); 2059 seq_printf(seq, "DRAM ROM Function : %4.4x\n", 2060 config->DramRomFn); 2061 seq_printf(seq, "Network interface Pin 1 : %2.2x\n", 2062 config->NetIntPin1); 2063 seq_printf(seq, "Network interface Pin 2 : %2.2x\n", 2064 config->NetIntPin1); 2065 seq_printf(seq, "Network interface Pin 3 : %2.2x\n", 2066 config->NetIntPin1); 2067 seq_printf(seq, "PM capabilities : %4.4X\n", 2068 config->PMECapab); 2069 seq_printf(seq, "Network Clock Controls : %4.4X\n", 2070 config->NwClkCtrls); 2071 2072 switch (config->FruFormat) { 2073 case ATK_FRU_FORMAT: 2074 { 2075 seq_printf(seq, 2076 "Vendor : Alacritech, Inc.\n"); 2077 seq_printf(seq, 2078 "Assembly # : %c%c%c%c%c%c\n", 2079 fru[0], fru[1], fru[2], fru[3], fru[4], 2080 fru[5]); 2081 seq_printf(seq, 2082 "Revision # : %c%c\n", 2083 fru[6], fru[7]); 2084 2085 if (config->OEMFruFormat == VENDOR4_FRU_FORMAT) { 2086 seq_printf(seq, 2087 "Serial # : " 2088 "%c%c%c%c%c%c%c%c%c%c%c%c\n", 2089 fru[8], fru[9], fru[10], 2090 fru[11], fru[12], fru[13], 2091 fru[16], fru[17], fru[18], 2092 fru[19], fru[20], fru[21]); 2093 } else { 2094 seq_printf(seq, 2095 "Serial # : " 2096 "%c%c%c%c%c%c%c%c%c%c%c%c%c%c\n", 2097 fru[8], fru[9], fru[10], 2098 fru[11], fru[12], fru[13], 2099 fru[14], fru[15], fru[16], 2100 fru[17], fru[18], fru[19], 2101 fru[20], fru[21]); 2102 } 2103 break; 2104 } 2105 2106 default: 2107 { 2108 seq_printf(seq, 2109 "Vendor : Alacritech, Inc.\n"); 2110 seq_printf(seq, 2111 "Serial # : Empty FRU\n"); 2112 break; 2113 } 2114 } 2115 2116 switch (config->OEMFruFormat) { 2117 case VENDOR1_FRU_FORMAT: 2118 { 2119 seq_printf(seq, "FRU Information:\n"); 2120 seq_printf(seq, " Commodity # : %c\n", 2121 oemfru[0]); 2122 seq_printf(seq, 2123 " Assembly # : %c%c%c%c\n", 2124 oemfru[1], oemfru[2], oemfru[3], oemfru[4]); 2125 seq_printf(seq, 2126 " Revision # : %c%c\n", 2127 oemfru[5], oemfru[6]); 2128 seq_printf(seq, 2129 " Supplier # : %c%c\n", 2130 oemfru[7], oemfru[8]); 2131 seq_printf(seq, 2132 " Date : %c%c\n", 2133 oemfru[9], oemfru[10]); 2134 seq_sprintf(seq, 2135 " Sequence # : %c%c%c\n", 2136 oemfru[11], oemfru[12], oemfru[13]); 2137 break; 2138 } 2139 2140 case VENDOR2_FRU_FORMAT: 2141 { 2142 seq_printf(seq, "FRU Information:\n"); 2143 seq_printf(seq, 2144 " Part # : " 2145 "%c%c%c%c%c%c%c%c\n", 2146 oemfru[0], oemfru[1], oemfru[2], 2147 oemfru[3], oemfru[4], oemfru[5], 2148 oemfru[6], oemfru[7]); 2149 seq_printf(seq, 2150 " Supplier # : %c%c%c%c%c\n", 2151 oemfru[8], oemfru[9], oemfru[10], 2152 oemfru[11], oemfru[12]); 2153 seq_printf(seq, 2154 " Date : %c%c%c\n", 2155 oemfru[13], oemfru[14], oemfru[15]); 2156 seq_sprintf(seq, 2157 " Sequence # : %c%c%c%c\n", 2158 oemfru[16], oemfru[17], oemfru[18], 2159 oemfru[19]); 2160 break; 2161 } 2162 2163 case VENDOR3_FRU_FORMAT: 2164 { 2165 seq_printf(seq, "FRU Information:\n"); 2166 } 2167 2168 case VENDOR4_FRU_FORMAT: 2169 { 2170 seq_printf(seq, "FRU Information:\n"); 2171 seq_printf(seq, 2172 " FRU Number : " 2173 "%c%c%c%c%c%c%c%c\n", 2174 oemfru[0], oemfru[1], oemfru[2], 2175 oemfru[3], oemfru[4], oemfru[5], 2176 oemfru[6], oemfru[7]); 2177 seq_sprintf(seq, 2178 " Part Number : " 2179 "%c%c%c%c%c%c%c%c\n", 2180 oemfru[8], oemfru[9], oemfru[10], 2181 oemfru[11], oemfru[12], oemfru[13], 2182 oemfru[14], oemfru[15]); 2183 seq_printf(seq, 2184 " EC Level : " 2185 "%c%c%c%c%c%c%c%c\n", 2186 oemfru[16], oemfru[17], oemfru[18], 2187 oemfru[19], oemfru[20], oemfru[21], 2188 oemfru[22], oemfru[23]); 2189 break; 2190 } 2191 2192 default: 2193 break; 2194 } 2195#endif 2196 2197 return 0; 2198} 2199 2200static int slic_debug_adapter_show(struct seq_file *seq, void *v) 2201{ 2202 struct adapter *adapter = seq->private; 2203 struct net_device *netdev = adapter->netdev; 2204 2205 seq_printf(seq, "info: interface : %s\n", 2206 adapter->netdev->name); 2207 seq_printf(seq, "info: status : %s\n", 2208 SLIC_LINKSTATE(adapter->linkstate)); 2209 seq_printf(seq, "info: port : %d\n", 2210 adapter->physport); 2211 seq_printf(seq, "info: speed : %s\n", 2212 SLIC_SPEED(adapter->linkspeed)); 2213 seq_printf(seq, "info: duplex : %s\n", 2214 SLIC_DUPLEX(adapter->linkduplex)); 2215 seq_printf(seq, "info: irq : 0x%X\n", 2216 (uint) adapter->irq); 2217 seq_printf(seq, "info: Interrupt Agg Delay: %d usec\n", 2218 adapter->card->loadlevel_current); 2219 seq_printf(seq, "info: RcvQ max entries : %4.4X\n", 2220 SLIC_RCVQ_ENTRIES); 2221 seq_printf(seq, "info: RcvQ current : %4.4X\n", 2222 adapter->rcvqueue.count); 2223 seq_printf(seq, "rx stats: packets : %8.8lX\n", 2224 netdev->stats.rx_packets); 2225 seq_printf(seq, "rx stats: bytes : %8.8lX\n", 2226 netdev->stats.rx_bytes); 2227 seq_printf(seq, "rx stats: broadcasts : %8.8X\n", 2228 adapter->rcv_broadcasts); 2229 seq_printf(seq, "rx stats: multicasts : %8.8X\n", 2230 adapter->rcv_multicasts); 2231 seq_printf(seq, "rx stats: unicasts : %8.8X\n", 2232 adapter->rcv_unicasts); 2233 seq_printf(seq, "rx stats: errors : %8.8X\n", 2234 (u32) adapter->slic_stats.iface.rcv_errors); 2235 seq_printf(seq, "rx stats: Missed errors : %8.8X\n", 2236 (u32) adapter->slic_stats.iface.rcv_discards); 2237 seq_printf(seq, "rx stats: drops : %8.8X\n", 2238 (u32) adapter->rcv_drops); 2239 seq_printf(seq, "tx stats: packets : %8.8lX\n", 2240 netdev->stats.tx_packets); 2241 seq_printf(seq, "tx stats: bytes : %8.8lX\n", 2242 netdev->stats.tx_bytes); 2243 seq_printf(seq, "tx stats: errors : %8.8X\n", 2244 (u32) adapter->slic_stats.iface.xmt_errors); 2245 seq_printf(seq, "rx stats: multicasts : %8.8lX\n", 2246 netdev->stats.multicast); 2247 seq_printf(seq, "tx stats: collision errors : %8.8X\n", 2248 (u32) adapter->slic_stats.iface.xmit_collisions); 2249 seq_printf(seq, "perf: Max rcv frames/isr : %8.8X\n", 2250 adapter->max_isr_rcvs); 2251 seq_printf(seq, "perf: Rcv interrupt yields : %8.8X\n", 2252 adapter->rcv_interrupt_yields); 2253 seq_printf(seq, "perf: Max xmit complete/isr : %8.8X\n", 2254 adapter->max_isr_xmits); 2255 seq_printf(seq, "perf: error interrupts : %8.8X\n", 2256 adapter->error_interrupts); 2257 seq_printf(seq, "perf: error rmiss interrupts : %8.8X\n", 2258 adapter->error_rmiss_interrupts); 2259 seq_printf(seq, "perf: rcv interrupts : %8.8X\n", 2260 adapter->rcv_interrupts); 2261 seq_printf(seq, "perf: xmit interrupts : %8.8X\n", 2262 adapter->xmit_interrupts); 2263 seq_printf(seq, "perf: link event interrupts : %8.8X\n", 2264 adapter->linkevent_interrupts); 2265 seq_printf(seq, "perf: UPR interrupts : %8.8X\n", 2266 adapter->upr_interrupts); 2267 seq_printf(seq, "perf: interrupt count : %8.8X\n", 2268 adapter->num_isrs); 2269 seq_printf(seq, "perf: false interrupts : %8.8X\n", 2270 adapter->false_interrupts); 2271 seq_printf(seq, "perf: All register writes : %8.8X\n", 2272 adapter->all_reg_writes); 2273 seq_printf(seq, "perf: ICR register writes : %8.8X\n", 2274 adapter->icr_reg_writes); 2275 seq_printf(seq, "perf: ISR register writes : %8.8X\n", 2276 adapter->isr_reg_writes); 2277 seq_printf(seq, "ifevents: overflow 802 errors : %8.8X\n", 2278 adapter->if_events.oflow802); 2279 seq_printf(seq, "ifevents: transport overflow errors: %8.8X\n", 2280 adapter->if_events.Tprtoflow); 2281 seq_printf(seq, "ifevents: underflow errors : %8.8X\n", 2282 adapter->if_events.uflow802); 2283 seq_printf(seq, "ifevents: receive early : %8.8X\n", 2284 adapter->if_events.rcvearly); 2285 seq_printf(seq, "ifevents: buffer overflows : %8.8X\n", 2286 adapter->if_events.Bufov); 2287 seq_printf(seq, "ifevents: carrier errors : %8.8X\n", 2288 adapter->if_events.Carre); 2289 seq_printf(seq, "ifevents: Long : %8.8X\n", 2290 adapter->if_events.Longe); 2291 seq_printf(seq, "ifevents: invalid preambles : %8.8X\n", 2292 adapter->if_events.Invp); 2293 seq_printf(seq, "ifevents: CRC errors : %8.8X\n", 2294 adapter->if_events.Crc); 2295 seq_printf(seq, "ifevents: dribble nibbles : %8.8X\n", 2296 adapter->if_events.Drbl); 2297 seq_printf(seq, "ifevents: Code violations : %8.8X\n", 2298 adapter->if_events.Code); 2299 seq_printf(seq, "ifevents: TCP checksum errors : %8.8X\n", 2300 adapter->if_events.TpCsum); 2301 seq_printf(seq, "ifevents: TCP header short errors : %8.8X\n", 2302 adapter->if_events.TpHlen); 2303 seq_printf(seq, "ifevents: IP checksum errors : %8.8X\n", 2304 adapter->if_events.IpCsum); 2305 seq_printf(seq, "ifevents: IP frame incompletes : %8.8X\n", 2306 adapter->if_events.IpLen); 2307 seq_printf(seq, "ifevents: IP headers shorts : %8.8X\n", 2308 adapter->if_events.IpHlen); 2309 2310 return 0; 2311} 2312static int slic_debug_adapter_open(struct inode *inode, struct file *file) 2313{ 2314 return single_open(file, slic_debug_adapter_show, inode->i_private); 2315} 2316 2317static int slic_debug_card_open(struct inode *inode, struct file *file) 2318{ 2319 return single_open(file, slic_debug_card_show, inode->i_private); 2320} 2321 2322static const struct file_operations slic_debug_adapter_fops = { 2323 .owner = THIS_MODULE, 2324 .open = slic_debug_adapter_open, 2325 .read = seq_read, 2326 .llseek = seq_lseek, 2327 .release = single_release, 2328}; 2329 2330static const struct file_operations slic_debug_card_fops = { 2331 .owner = THIS_MODULE, 2332 .open = slic_debug_card_open, 2333 .read = seq_read, 2334 .llseek = seq_lseek, 2335 .release = single_release, 2336}; 2337 2338static void slic_debug_adapter_create(struct adapter *adapter) 2339{ 2340 struct dentry *d; 2341 char name[7]; 2342 struct sliccard *card = adapter->card; 2343 2344 if (!card->debugfs_dir) 2345 return; 2346 2347 sprintf(name, "port%d", adapter->port); 2348 d = debugfs_create_file(name, S_IRUGO, 2349 card->debugfs_dir, adapter, 2350 &slic_debug_adapter_fops); 2351 if (!d || IS_ERR(d)) 2352 pr_info(PFX "%s: debugfs create failed\n", name); 2353 else 2354 adapter->debugfs_entry = d; 2355} 2356 2357static void slic_debug_adapter_destroy(struct adapter *adapter) 2358{ 2359 debugfs_remove(adapter->debugfs_entry); 2360 adapter->debugfs_entry = NULL; 2361} 2362 2363static void slic_debug_card_create(struct sliccard *card) 2364{ 2365 struct dentry *d; 2366 char name[IFNAMSIZ]; 2367 2368 snprintf(name, sizeof(name), "slic%d", card->cardnum); 2369 d = debugfs_create_dir(name, slic_debugfs); 2370 if (!d || IS_ERR(d)) 2371 pr_info(PFX "%s: debugfs create dir failed\n", 2372 name); 2373 else { 2374 card->debugfs_dir = d; 2375 d = debugfs_create_file("cardinfo", S_IRUGO, 2376 slic_debugfs, card, 2377 &slic_debug_card_fops); 2378 if (!d || IS_ERR(d)) 2379 pr_info(PFX "%s: debugfs create failed\n", 2380 name); 2381 else 2382 card->debugfs_cardinfo = d; 2383 } 2384} 2385 2386static void slic_debug_card_destroy(struct sliccard *card) 2387{ 2388 int i; 2389 2390 for (i = 0; i < card->card_size; i++) { 2391 struct adapter *adapter; 2392 2393 adapter = card->adapter[i]; 2394 if (adapter) 2395 slic_debug_adapter_destroy(adapter); 2396 } 2397 if (card->debugfs_cardinfo) { 2398 debugfs_remove(card->debugfs_cardinfo); 2399 card->debugfs_cardinfo = NULL; 2400 } 2401 if (card->debugfs_dir) { 2402 debugfs_remove(card->debugfs_dir); 2403 card->debugfs_dir = NULL; 2404 } 2405} 2406 2407static void slic_debug_init(void) 2408{ 2409 struct dentry *ent; 2410 2411 ent = debugfs_create_dir("slic", NULL); 2412 if (!ent || IS_ERR(ent)) { 2413 pr_info(PFX "debugfs create directory failed\n"); 2414 return; 2415 } 2416 2417 slic_debugfs = ent; 2418} 2419 2420static void slic_debug_cleanup(void) 2421{ 2422 if (slic_debugfs) { 2423 debugfs_remove(slic_debugfs); 2424 slic_debugfs = NULL; 2425 } 2426} 2427 2428/* 2429 * slic_link_event_handler - 2430 * 2431 * Initiate a link configuration sequence. The link configuration begins 2432 * by issuing a READ_LINK_STATUS command to the Utility Processor on the 2433 * SLIC. Since the command finishes asynchronously, the slic_upr_comlete 2434 * routine will follow it up witha UP configuration write command, which 2435 * will also complete asynchronously. 2436 * 2437 */ 2438static void slic_link_event_handler(struct adapter *adapter) 2439{ 2440 int status; 2441 struct slic_shmem *pshmem; 2442 2443 if (adapter->state != ADAPT_UP) { 2444 /* Adapter is not operational. Ignore. */ 2445 return; 2446 } 2447 2448 pshmem = (struct slic_shmem *)adapter->phys_shmem; 2449 2450#if defined(CONFIG_X86_64) 2451 status = slic_upr_request(adapter, 2452 SLIC_UPR_RLSR, 2453 SLIC_GET_ADDR_LOW(&pshmem->linkstatus), 2454 SLIC_GET_ADDR_HIGH(&pshmem->linkstatus), 2455 0, 0); 2456#elif defined(CONFIG_X86) 2457 status = slic_upr_request(adapter, SLIC_UPR_RLSR, 2458 (u32) &pshmem->linkstatus, /* no 4GB wrap guaranteed */ 2459 0, 0, 0); 2460#else 2461 Stop compilation; 2462#endif 2463 ASSERT(status == 0); 2464} 2465 2466static void slic_init_cleanup(struct adapter *adapter) 2467{ 2468 if (adapter->intrregistered) { 2469 adapter->intrregistered = 0; 2470 free_irq(adapter->netdev->irq, adapter->netdev); 2471 2472 } 2473 if (adapter->pshmem) { 2474 pci_free_consistent(adapter->pcidev, 2475 sizeof(struct slic_shmem), 2476 adapter->pshmem, adapter->phys_shmem); 2477 adapter->pshmem = NULL; 2478 adapter->phys_shmem = (dma_addr_t) NULL; 2479 } 2480 2481 if (adapter->pingtimerset) { 2482 adapter->pingtimerset = 0; 2483 del_timer(&adapter->pingtimer); 2484 } 2485 2486 slic_rspqueue_free(adapter); 2487 slic_cmdq_free(adapter); 2488 slic_rcvqueue_free(adapter); 2489} 2490 2491/* 2492 * Allocate a mcast_address structure to hold the multicast address. 2493 * Link it in. 2494 */ 2495static int slic_mcast_add_list(struct adapter *adapter, char *address) 2496{ 2497 struct mcast_address *mcaddr, *mlist; 2498 2499 /* Check to see if it already exists */ 2500 mlist = adapter->mcastaddrs; 2501 while (mlist) { 2502 if (!compare_ether_addr(mlist->address, address)) 2503 return 0; 2504 mlist = mlist->next; 2505 } 2506 2507 /* Doesn't already exist. Allocate a structure to hold it */ 2508 mcaddr = kmalloc(sizeof(struct mcast_address), GFP_ATOMIC); 2509 if (mcaddr == NULL) 2510 return 1; 2511 2512 memcpy(mcaddr->address, address, 6); 2513 2514 mcaddr->next = adapter->mcastaddrs; 2515 adapter->mcastaddrs = mcaddr; 2516 2517 return 0; 2518} 2519 2520static void slic_mcast_set_list(struct net_device *dev) 2521{ 2522 struct adapter *adapter = netdev_priv(dev); 2523 int status = 0; 2524 char *addresses; 2525 struct netdev_hw_addr *ha; 2526 2527 ASSERT(adapter); 2528 2529 netdev_for_each_mc_addr(ha, dev) { 2530 addresses = (char *) &ha->addr; 2531 status = slic_mcast_add_list(adapter, addresses); 2532 if (status != 0) 2533 break; 2534 slic_mcast_set_bit(adapter, addresses); 2535 } 2536 2537 if (adapter->devflags_prev != dev->flags) { 2538 adapter->macopts = MAC_DIRECTED; 2539 if (dev->flags) { 2540 if (dev->flags & IFF_BROADCAST) 2541 adapter->macopts |= MAC_BCAST; 2542 if (dev->flags & IFF_PROMISC) 2543 adapter->macopts |= MAC_PROMISC; 2544 if (dev->flags & IFF_ALLMULTI) 2545 adapter->macopts |= MAC_ALLMCAST; 2546 if (dev->flags & IFF_MULTICAST) 2547 adapter->macopts |= MAC_MCAST; 2548 } 2549 adapter->devflags_prev = dev->flags; 2550 slic_config_set(adapter, true); 2551 } else { 2552 if (status == 0) 2553 slic_mcast_set_mask(adapter); 2554 } 2555 return; 2556} 2557 2558#define XMIT_FAIL_LINK_STATE 1 2559#define XMIT_FAIL_ZERO_LENGTH 2 2560#define XMIT_FAIL_HOSTCMD_FAIL 3 2561 2562static void slic_xmit_build_request(struct adapter *adapter, 2563 struct slic_hostcmd *hcmd, struct sk_buff *skb) 2564{ 2565 struct slic_host64_cmd *ihcmd; 2566 ulong phys_addr; 2567 2568 ihcmd = &hcmd->cmd64; 2569 2570 ihcmd->flags = (adapter->port << IHFLG_IFSHFT); 2571 ihcmd->command = IHCMD_XMT_REQ; 2572 ihcmd->u.slic_buffers.totlen = skb->len; 2573 phys_addr = pci_map_single(adapter->pcidev, skb->data, skb->len, 2574 PCI_DMA_TODEVICE); 2575 ihcmd->u.slic_buffers.bufs[0].paddrl = SLIC_GET_ADDR_LOW(phys_addr); 2576 ihcmd->u.slic_buffers.bufs[0].paddrh = SLIC_GET_ADDR_HIGH(phys_addr); 2577 ihcmd->u.slic_buffers.bufs[0].length = skb->len; 2578#if defined(CONFIG_X86_64) 2579 hcmd->cmdsize = (u32) ((((u64)&ihcmd->u.slic_buffers.bufs[1] - 2580 (u64) hcmd) + 31) >> 5); 2581#elif defined(CONFIG_X86) 2582 hcmd->cmdsize = ((((u32) &ihcmd->u.slic_buffers.bufs[1] - 2583 (u32) hcmd) + 31) >> 5); 2584#else 2585 Stop Compilation; 2586#endif 2587} 2588 2589static void slic_xmit_fail(struct adapter *adapter, 2590 struct sk_buff *skb, 2591 void *cmd, u32 skbtype, u32 status) 2592{ 2593 if (adapter->xmitq_full) 2594 netif_stop_queue(adapter->netdev); 2595 if ((cmd == NULL) && (status <= XMIT_FAIL_HOSTCMD_FAIL)) { 2596 switch (status) { 2597 case XMIT_FAIL_LINK_STATE: 2598 dev_err(&adapter->netdev->dev, 2599 "reject xmit skb[%p: %x] linkstate[%s] " 2600 "adapter[%s:%d] card[%s:%d]\n", 2601 skb, skb->pkt_type, 2602 SLIC_LINKSTATE(adapter->linkstate), 2603 SLIC_ADAPTER_STATE(adapter->state), 2604 adapter->state, 2605 SLIC_CARD_STATE(adapter->card->state), 2606 adapter->card->state); 2607 break; 2608 case XMIT_FAIL_ZERO_LENGTH: 2609 dev_err(&adapter->netdev->dev, 2610 "xmit_start skb->len == 0 skb[%p] type[%x]\n", 2611 skb, skb->pkt_type); 2612 break; 2613 case XMIT_FAIL_HOSTCMD_FAIL: 2614 dev_err(&adapter->netdev->dev, 2615 "xmit_start skb[%p] type[%x] No host commands " 2616 "available\n", skb, skb->pkt_type); 2617 break; 2618 default: 2619 ASSERT(0); 2620 } 2621 } 2622 dev_kfree_skb(skb); 2623 adapter->netdev->stats.tx_dropped++; 2624} 2625 2626static void slic_rcv_handle_error(struct adapter *adapter, 2627 struct slic_rcvbuf *rcvbuf) 2628{ 2629 struct slic_hddr_wds *hdr = (struct slic_hddr_wds *)rcvbuf->data; 2630 struct net_device *netdev = adapter->netdev; 2631 2632 if (adapter->devid != SLIC_1GB_DEVICE_ID) { 2633 if (hdr->frame_status14 & VRHSTAT_802OE) 2634 adapter->if_events.oflow802++; 2635 if (hdr->frame_status14 & VRHSTAT_TPOFLO) 2636 adapter->if_events.Tprtoflow++; 2637 if (hdr->frame_status_b14 & VRHSTATB_802UE) 2638 adapter->if_events.uflow802++; 2639 if (hdr->frame_status_b14 & VRHSTATB_RCVE) { 2640 adapter->if_events.rcvearly++; 2641 netdev->stats.rx_fifo_errors++; 2642 } 2643 if (hdr->frame_status_b14 & VRHSTATB_BUFF) { 2644 adapter->if_events.Bufov++; 2645 netdev->stats.rx_over_errors++; 2646 } 2647 if (hdr->frame_status_b14 & VRHSTATB_CARRE) { 2648 adapter->if_events.Carre++; 2649 netdev->stats.tx_carrier_errors++; 2650 } 2651 if (hdr->frame_status_b14 & VRHSTATB_LONGE) 2652 adapter->if_events.Longe++; 2653 if (hdr->frame_status_b14 & VRHSTATB_PREA) 2654 adapter->if_events.Invp++; 2655 if (hdr->frame_status_b14 & VRHSTATB_CRC) { 2656 adapter->if_events.Crc++; 2657 netdev->stats.rx_crc_errors++; 2658 } 2659 if (hdr->frame_status_b14 & VRHSTATB_DRBL) 2660 adapter->if_events.Drbl++; 2661 if (hdr->frame_status_b14 & VRHSTATB_CODE) 2662 adapter->if_events.Code++; 2663 if (hdr->frame_status_b14 & VRHSTATB_TPCSUM) 2664 adapter->if_events.TpCsum++; 2665 if (hdr->frame_status_b14 & VRHSTATB_TPHLEN) 2666 adapter->if_events.TpHlen++; 2667 if (hdr->frame_status_b14 & VRHSTATB_IPCSUM) 2668 adapter->if_events.IpCsum++; 2669 if (hdr->frame_status_b14 & VRHSTATB_IPLERR) 2670 adapter->if_events.IpLen++; 2671 if (hdr->frame_status_b14 & VRHSTATB_IPHERR) 2672 adapter->if_events.IpHlen++; 2673 } else { 2674 if (hdr->frame_statusGB & VGBSTAT_XPERR) { 2675 u32 xerr = hdr->frame_statusGB >> VGBSTAT_XERRSHFT; 2676 2677 if (xerr == VGBSTAT_XCSERR) 2678 adapter->if_events.TpCsum++; 2679 if (xerr == VGBSTAT_XUFLOW) 2680 adapter->if_events.Tprtoflow++; 2681 if (xerr == VGBSTAT_XHLEN) 2682 adapter->if_events.TpHlen++; 2683 } 2684 if (hdr->frame_statusGB & VGBSTAT_NETERR) { 2685 u32 nerr = 2686 (hdr-> 2687 frame_statusGB >> VGBSTAT_NERRSHFT) & 2688 VGBSTAT_NERRMSK; 2689 if (nerr == VGBSTAT_NCSERR) 2690 adapter->if_events.IpCsum++; 2691 if (nerr == VGBSTAT_NUFLOW) 2692 adapter->if_events.IpLen++; 2693 if (nerr == VGBSTAT_NHLEN) 2694 adapter->if_events.IpHlen++; 2695 } 2696 if (hdr->frame_statusGB & VGBSTAT_LNKERR) { 2697 u32 lerr = hdr->frame_statusGB & VGBSTAT_LERRMSK; 2698 2699 if (lerr == VGBSTAT_LDEARLY) 2700 adapter->if_events.rcvearly++; 2701 if (lerr == VGBSTAT_LBOFLO) 2702 adapter->if_events.Bufov++; 2703 if (lerr == VGBSTAT_LCODERR) 2704 adapter->if_events.Code++; 2705 if (lerr == VGBSTAT_LDBLNBL) 2706 adapter->if_events.Drbl++; 2707 if (lerr == VGBSTAT_LCRCERR) 2708 adapter->if_events.Crc++; 2709 if (lerr == VGBSTAT_LOFLO) 2710 adapter->if_events.oflow802++; 2711 if (lerr == VGBSTAT_LUFLO) 2712 adapter->if_events.uflow802++; 2713 } 2714 } 2715 return; 2716} 2717 2718#define TCP_OFFLOAD_FRAME_PUSHFLAG 0x10000000 2719#define M_FAST_PATH 0x0040 2720 2721static void slic_rcv_handler(struct adapter *adapter) 2722{ 2723 struct net_device *netdev = adapter->netdev; 2724 struct sk_buff *skb; 2725 struct slic_rcvbuf *rcvbuf; 2726 u32 frames = 0; 2727 2728 while ((skb = slic_rcvqueue_getnext(adapter))) { 2729 u32 rx_bytes; 2730 2731 ASSERT(skb->head); 2732 rcvbuf = (struct slic_rcvbuf *)skb->head; 2733 adapter->card->events++; 2734 if (rcvbuf->status & IRHDDR_ERR) { 2735 adapter->rx_errors++; 2736 slic_rcv_handle_error(adapter, rcvbuf); 2737 slic_rcvqueue_reinsert(adapter, skb); 2738 continue; 2739 } 2740 2741 if (!slic_mac_filter(adapter, (struct ether_header *) 2742 rcvbuf->data)) { 2743 slic_rcvqueue_reinsert(adapter, skb); 2744 continue; 2745 } 2746 skb_pull(skb, SLIC_RCVBUF_HEADSIZE); 2747 rx_bytes = (rcvbuf->length & IRHDDR_FLEN_MSK); 2748 skb_put(skb, rx_bytes); 2749 netdev->stats.rx_packets++; 2750 netdev->stats.rx_bytes += rx_bytes; 2751#if SLIC_OFFLOAD_IP_CHECKSUM 2752 skb->ip_summed = CHECKSUM_UNNECESSARY; 2753#endif 2754 2755 skb->dev = adapter->netdev; 2756 skb->protocol = eth_type_trans(skb, skb->dev); 2757 netif_rx(skb); 2758 2759 ++frames; 2760#if SLIC_INTERRUPT_PROCESS_LIMIT 2761 if (frames >= SLIC_RCVQ_MAX_PROCESS_ISR) { 2762 adapter->rcv_interrupt_yields++; 2763 break; 2764 } 2765#endif 2766 } 2767 adapter->max_isr_rcvs = max(adapter->max_isr_rcvs, frames); 2768} 2769 2770static void slic_xmit_complete(struct adapter *adapter) 2771{ 2772 struct slic_hostcmd *hcmd; 2773 struct slic_rspbuf *rspbuf; 2774 u32 frames = 0; 2775 struct slic_handle_word slic_handle_word; 2776 2777 do { 2778 rspbuf = slic_rspqueue_getnext(adapter); 2779 if (!rspbuf) 2780 break; 2781 adapter->xmit_completes++; 2782 adapter->card->events++; 2783 /* 2784 Get the complete host command buffer 2785 */ 2786 slic_handle_word.handle_token = rspbuf->hosthandle; 2787 ASSERT(slic_handle_word.handle_index); 2788 ASSERT(slic_handle_word.handle_index <= SLIC_CMDQ_MAXCMDS); 2789 hcmd = 2790 (struct slic_hostcmd *) 2791 adapter->slic_handles[slic_handle_word.handle_index]. 2792 address; 2793/* hcmd = (struct slic_hostcmd *) rspbuf->hosthandle; */ 2794 ASSERT(hcmd); 2795 ASSERT(hcmd->pslic_handle == 2796 &adapter->slic_handles[slic_handle_word.handle_index]); 2797 if (hcmd->type == SLIC_CMD_DUMB) { 2798 if (hcmd->skb) 2799 dev_kfree_skb_irq(hcmd->skb); 2800 slic_cmdq_putdone_irq(adapter, hcmd); 2801 } 2802 rspbuf->status = 0; 2803 rspbuf->hosthandle = 0; 2804 frames++; 2805 } while (1); 2806 adapter->max_isr_xmits = max(adapter->max_isr_xmits, frames); 2807} 2808 2809static irqreturn_t slic_interrupt(int irq, void *dev_id) 2810{ 2811 struct net_device *dev = (struct net_device *)dev_id; 2812 struct adapter *adapter = netdev_priv(dev); 2813 u32 isr; 2814 2815 if ((adapter->pshmem) && (adapter->pshmem->isr)) { 2816 slic_reg32_write(&adapter->slic_regs->slic_icr, 2817 ICR_INT_MASK, FLUSH); 2818 isr = adapter->isrcopy = adapter->pshmem->isr; 2819 adapter->pshmem->isr = 0; 2820 adapter->num_isrs++; 2821 switch (adapter->card->state) { 2822 case CARD_UP: 2823 if (isr & ~ISR_IO) { 2824 if (isr & ISR_ERR) { 2825 adapter->error_interrupts++; 2826 if (isr & ISR_RMISS) { 2827 int count; 2828 int pre_count; 2829 int errors; 2830 2831 struct slic_rcvqueue *rcvq = 2832 &adapter->rcvqueue; 2833 2834 adapter-> 2835 error_rmiss_interrupts++; 2836 if (!rcvq->errors) 2837 rcv_count = rcvq->count; 2838 pre_count = rcvq->count; 2839 errors = rcvq->errors; 2840 2841 while (rcvq->count < 2842 SLIC_RCVQ_FILLTHRESH) { 2843 count = 2844 slic_rcvqueue_fill 2845 (adapter); 2846 if (!count) 2847 break; 2848 } 2849 } else if (isr & ISR_XDROP) { 2850 dev_err(&dev->dev, 2851 "isr & ISR_ERR [%x] " 2852 "ISR_XDROP \n", isr); 2853 } else { 2854 dev_err(&dev->dev, 2855 "isr & ISR_ERR [%x]\n", 2856 isr); 2857 } 2858 } 2859 2860 if (isr & ISR_LEVENT) { 2861 adapter->linkevent_interrupts++; 2862 slic_link_event_handler(adapter); 2863 } 2864 2865 if ((isr & ISR_UPC) || 2866 (isr & ISR_UPCERR) || (isr & ISR_UPCBSY)) { 2867 adapter->upr_interrupts++; 2868 slic_upr_request_complete(adapter, isr); 2869 } 2870 } 2871 2872 if (isr & ISR_RCV) { 2873 adapter->rcv_interrupts++; 2874 slic_rcv_handler(adapter); 2875 } 2876 2877 if (isr & ISR_CMD) { 2878 adapter->xmit_interrupts++; 2879 slic_xmit_complete(adapter); 2880 } 2881 break; 2882 2883 case CARD_DOWN: 2884 if ((isr & ISR_UPC) || 2885 (isr & ISR_UPCERR) || (isr & ISR_UPCBSY)) { 2886 adapter->upr_interrupts++; 2887 slic_upr_request_complete(adapter, isr); 2888 } 2889 break; 2890 2891 default: 2892 break; 2893 } 2894 2895 adapter->isrcopy = 0; 2896 adapter->all_reg_writes += 2; 2897 adapter->isr_reg_writes++; 2898 slic_reg32_write(&adapter->slic_regs->slic_isr, 0, FLUSH); 2899 } else { 2900 adapter->false_interrupts++; 2901 } 2902 return IRQ_HANDLED; 2903} 2904 2905#define NORMAL_ETHFRAME 0 2906 2907static netdev_tx_t slic_xmit_start(struct sk_buff *skb, struct net_device *dev) 2908{ 2909 struct sliccard *card; 2910 struct adapter *adapter = netdev_priv(dev); 2911 struct slic_hostcmd *hcmd = NULL; 2912 u32 status = 0; 2913 u32 skbtype = NORMAL_ETHFRAME; 2914 void *offloadcmd = NULL; 2915 2916 card = adapter->card; 2917 ASSERT(card); 2918 if ((adapter->linkstate != LINK_UP) || 2919 (adapter->state != ADAPT_UP) || (card->state != CARD_UP)) { 2920 status = XMIT_FAIL_LINK_STATE; 2921 goto xmit_fail; 2922 2923 } else if (skb->len == 0) { 2924 status = XMIT_FAIL_ZERO_LENGTH; 2925 goto xmit_fail; 2926 } 2927 2928 if (skbtype == NORMAL_ETHFRAME) { 2929 hcmd = slic_cmdq_getfree(adapter); 2930 if (!hcmd) { 2931 adapter->xmitq_full = 1; 2932 status = XMIT_FAIL_HOSTCMD_FAIL; 2933 goto xmit_fail; 2934 } 2935 ASSERT(hcmd->pslic_handle); 2936 ASSERT(hcmd->cmd64.hosthandle == 2937 hcmd->pslic_handle->token.handle_token); 2938 hcmd->skb = skb; 2939 hcmd->busy = 1; 2940 hcmd->type = SLIC_CMD_DUMB; 2941 if (skbtype == NORMAL_ETHFRAME) 2942 slic_xmit_build_request(adapter, hcmd, skb); 2943 } 2944 dev->stats.tx_packets++; 2945 dev->stats.tx_bytes += skb->len; 2946 2947#ifdef DEBUG_DUMP 2948 if (adapter->kill_card) { 2949 struct slic_host64_cmd ihcmd; 2950 2951 ihcmd = &hcmd->cmd64; 2952 2953 ihcmd->flags |= 0x40; 2954 adapter->kill_card = 0; /* only do this once */ 2955 } 2956#endif 2957 if (hcmd->paddrh == 0) { 2958 slic_reg32_write(&adapter->slic_regs->slic_cbar, 2959 (hcmd->paddrl | hcmd->cmdsize), DONT_FLUSH); 2960 } else { 2961 slic_reg64_write(adapter, &adapter->slic_regs->slic_cbar64, 2962 (hcmd->paddrl | hcmd->cmdsize), 2963 &adapter->slic_regs->slic_addr_upper, 2964 hcmd->paddrh, DONT_FLUSH); 2965 } 2966xmit_done: 2967 return NETDEV_TX_OK; 2968xmit_fail: 2969 slic_xmit_fail(adapter, skb, offloadcmd, skbtype, status); 2970 goto xmit_done; 2971} 2972 2973 2974static void slic_adapter_freeresources(struct adapter *adapter) 2975{ 2976 slic_init_cleanup(adapter); 2977 adapter->error_interrupts = 0; 2978 adapter->rcv_interrupts = 0; 2979 adapter->xmit_interrupts = 0; 2980 adapter->linkevent_interrupts = 0; 2981 adapter->upr_interrupts = 0; 2982 adapter->num_isrs = 0; 2983 adapter->xmit_completes = 0; 2984 adapter->rcv_broadcasts = 0; 2985 adapter->rcv_multicasts = 0; 2986 adapter->rcv_unicasts = 0; 2987} 2988 2989static int slic_adapter_allocresources(struct adapter *adapter) 2990{ 2991 if (!adapter->intrregistered) { 2992 int retval; 2993 2994 spin_unlock_irqrestore(&slic_global.driver_lock.lock, 2995 slic_global.driver_lock.flags); 2996 2997 retval = request_irq(adapter->netdev->irq, 2998 &slic_interrupt, 2999 IRQF_SHARED, 3000 adapter->netdev->name, adapter->netdev); 3001 3002 spin_lock_irqsave(&slic_global.driver_lock.lock, 3003 slic_global.driver_lock.flags); 3004 3005 if (retval) { 3006 dev_err(&adapter->netdev->dev, 3007 "request_irq (%s) FAILED [%x]\n", 3008 adapter->netdev->name, retval); 3009 return retval; 3010 } 3011 adapter->intrregistered = 1; 3012 } 3013 return 0; 3014} 3015 3016/* 3017 * slic_if_init 3018 * 3019 * Perform initialization of our slic interface. 3020 * 3021 */ 3022static int slic_if_init(struct adapter *adapter) 3023{ 3024 struct sliccard *card = adapter->card; 3025 struct net_device *dev = adapter->netdev; 3026 __iomem struct slic_regs *slic_regs = adapter->slic_regs; 3027 struct slic_shmem *pshmem; 3028 int rc; 3029 3030 ASSERT(card); 3031 3032 /* adapter should be down at this point */ 3033 if (adapter->state != ADAPT_DOWN) { 3034 dev_err(&dev->dev, "%s: adapter->state != ADAPT_DOWN\n", 3035 __func__); 3036 rc = -EIO; 3037 goto err; 3038 } 3039 ASSERT(adapter->linkstate == LINK_DOWN); 3040 3041 adapter->devflags_prev = dev->flags; 3042 adapter->macopts = MAC_DIRECTED; 3043 if (dev->flags) { 3044 if (dev->flags & IFF_BROADCAST) 3045 adapter->macopts |= MAC_BCAST; 3046 if (dev->flags & IFF_PROMISC) 3047 adapter->macopts |= MAC_PROMISC; 3048 if (dev->flags & IFF_ALLMULTI) 3049 adapter->macopts |= MAC_ALLMCAST; 3050 if (dev->flags & IFF_MULTICAST) 3051 adapter->macopts |= MAC_MCAST; 3052 } 3053 rc = slic_adapter_allocresources(adapter); 3054 if (rc) { 3055 dev_err(&dev->dev, 3056 "%s: slic_adapter_allocresources FAILED %x\n", 3057 __func__, rc); 3058 slic_adapter_freeresources(adapter); 3059 goto err; 3060 } 3061 3062 if (!adapter->queues_initialized) { 3063 if ((rc = slic_rspqueue_init(adapter))) 3064 goto err; 3065 if ((rc = slic_cmdq_init(adapter))) 3066 goto err; 3067 if ((rc = slic_rcvqueue_init(adapter))) 3068 goto err; 3069 adapter->queues_initialized = 1; 3070 } 3071 3072 slic_reg32_write(&slic_regs->slic_icr, ICR_INT_OFF, FLUSH); 3073 mdelay(1); 3074 3075 if (!adapter->isp_initialized) { 3076 pshmem = (struct slic_shmem *)adapter->phys_shmem; 3077 3078 spin_lock_irqsave(&adapter->bit64reglock.lock, 3079 adapter->bit64reglock.flags); 3080 3081#if defined(CONFIG_X86_64) 3082 slic_reg32_write(&slic_regs->slic_addr_upper, 3083 SLIC_GET_ADDR_HIGH(&pshmem->isr), DONT_FLUSH); 3084 slic_reg32_write(&slic_regs->slic_isp, 3085 SLIC_GET_ADDR_LOW(&pshmem->isr), FLUSH); 3086#elif defined(CONFIG_X86) 3087 slic_reg32_write(&slic_regs->slic_addr_upper, 0, DONT_FLUSH); 3088 slic_reg32_write(&slic_regs->slic_isp, (u32)&pshmem->isr, FLUSH); 3089#else 3090 Stop Compilations 3091#endif 3092 spin_unlock_irqrestore(&adapter->bit64reglock.lock, 3093 adapter->bit64reglock.flags); 3094 adapter->isp_initialized = 1; 3095 } 3096 3097 adapter->state = ADAPT_UP; 3098 if (!card->loadtimerset) { 3099 init_timer(&card->loadtimer); 3100 card->loadtimer.expires = 3101 jiffies + (SLIC_LOADTIMER_PERIOD * HZ); 3102 card->loadtimer.data = (ulong) card; 3103 card->loadtimer.function = &slic_timer_load_check; 3104 add_timer(&card->loadtimer); 3105 3106 card->loadtimerset = 1; 3107 } 3108 3109 if (!adapter->pingtimerset) { 3110 init_timer(&adapter->pingtimer); 3111 adapter->pingtimer.expires = 3112 jiffies + (PING_TIMER_INTERVAL * HZ); 3113 adapter->pingtimer.data = (ulong) dev; 3114 adapter->pingtimer.function = &slic_timer_ping; 3115 add_timer(&adapter->pingtimer); 3116 adapter->pingtimerset = 1; 3117 adapter->card->pingstatus = ISR_PINGMASK; 3118 } 3119 3120 /* 3121 * clear any pending events, then enable interrupts 3122 */ 3123 adapter->isrcopy = 0; 3124 adapter->pshmem->isr = 0; 3125 slic_reg32_write(&slic_regs->slic_isr, 0, FLUSH); 3126 slic_reg32_write(&slic_regs->slic_icr, ICR_INT_ON, FLUSH); 3127 3128 slic_link_config(adapter, LINK_AUTOSPEED, LINK_AUTOD); 3129 slic_link_event_handler(adapter); 3130 3131err: 3132 return rc; 3133} 3134 3135static int slic_entry_open(struct net_device *dev) 3136{ 3137 struct adapter *adapter = netdev_priv(dev); 3138 struct sliccard *card = adapter->card; 3139 u32 locked = 0; 3140 int status; 3141 3142 ASSERT(adapter); 3143 ASSERT(card); 3144 3145 netif_stop_queue(adapter->netdev); 3146 3147 spin_lock_irqsave(&slic_global.driver_lock.lock, 3148 slic_global.driver_lock.flags); 3149 locked = 1; 3150 if (!adapter->activated) { 3151 card->adapters_activated++; 3152 slic_global.num_slic_ports_active++; 3153 adapter->activated = 1; 3154 } 3155 status = slic_if_init(adapter); 3156 3157 if (status != 0) { 3158 if (adapter->activated) { 3159 card->adapters_activated--; 3160 slic_global.num_slic_ports_active--; 3161 adapter->activated = 0; 3162 } 3163 if (locked) { 3164 spin_unlock_irqrestore(&slic_global.driver_lock.lock, 3165 slic_global.driver_lock.flags); 3166 locked = 0; 3167 } 3168 return status; 3169 } 3170 if (!card->master) 3171 card->master = adapter; 3172 3173 if (locked) { 3174 spin_unlock_irqrestore(&slic_global.driver_lock.lock, 3175 slic_global.driver_lock.flags); 3176 locked = 0; 3177 } 3178 3179 return 0; 3180} 3181 3182static void slic_card_cleanup(struct sliccard *card) 3183{ 3184 if (card->loadtimerset) { 3185 card->loadtimerset = 0; 3186 del_timer(&card->loadtimer); 3187 } 3188 3189 slic_debug_card_destroy(card); 3190 3191 kfree(card); 3192} 3193 3194static void __devexit slic_entry_remove(struct pci_dev *pcidev) 3195{ 3196 struct net_device *dev = pci_get_drvdata(pcidev); 3197 u32 mmio_start = 0; 3198 uint mmio_len = 0; 3199 struct adapter *adapter = netdev_priv(dev); 3200 struct sliccard *card; 3201 struct mcast_address *mcaddr, *mlist; 3202 3203 ASSERT(adapter); 3204 slic_adapter_freeresources(adapter); 3205 slic_unmap_mmio_space(adapter); 3206 unregister_netdev(dev); 3207 3208 mmio_start = pci_resource_start(pcidev, 0); 3209 mmio_len = pci_resource_len(pcidev, 0); 3210 3211 release_mem_region(mmio_start, mmio_len); 3212 3213 iounmap((void __iomem *)dev->base_addr); 3214 /* free multicast addresses */ 3215 mlist = adapter->mcastaddrs; 3216 while (mlist) { 3217 mcaddr = mlist; 3218 mlist = mlist->next; 3219 kfree(mcaddr); 3220 } 3221 ASSERT(adapter->card); 3222 card = adapter->card; 3223 ASSERT(card->adapters_allocated); 3224 card->adapters_allocated--; 3225 adapter->allocated = 0; 3226 if (!card->adapters_allocated) { 3227 struct sliccard *curr_card = slic_global.slic_card; 3228 if (curr_card == card) { 3229 slic_global.slic_card = card->next; 3230 } else { 3231 while (curr_card->next != card) 3232 curr_card = curr_card->next; 3233 ASSERT(curr_card); 3234 curr_card->next = card->next; 3235 } 3236 ASSERT(slic_global.num_slic_cards); 3237 slic_global.num_slic_cards--; 3238 slic_card_cleanup(card); 3239 } 3240 kfree(dev); 3241 pci_release_regions(pcidev); 3242} 3243 3244static int slic_entry_halt(struct net_device *dev) 3245{ 3246 struct adapter *adapter = netdev_priv(dev); 3247 struct sliccard *card = adapter->card; 3248 __iomem struct slic_regs *slic_regs = adapter->slic_regs; 3249 3250 spin_lock_irqsave(&slic_global.driver_lock.lock, 3251 slic_global.driver_lock.flags); 3252 ASSERT(card); 3253 netif_stop_queue(adapter->netdev); 3254 adapter->state = ADAPT_DOWN; 3255 adapter->linkstate = LINK_DOWN; 3256 adapter->upr_list = NULL; 3257 adapter->upr_busy = 0; 3258 adapter->devflags_prev = 0; 3259 ASSERT(card->adapter[adapter->cardindex] == adapter); 3260 slic_reg32_write(&slic_regs->slic_icr, ICR_INT_OFF, FLUSH); 3261 adapter->all_reg_writes++; 3262 adapter->icr_reg_writes++; 3263 slic_config_clear(adapter); 3264 if (adapter->activated) { 3265 card->adapters_activated--; 3266 slic_global.num_slic_ports_active--; 3267 adapter->activated = 0; 3268 } 3269#ifdef AUTOMATIC_RESET 3270 slic_reg32_write(&slic_regs->slic_reset_iface, 0, FLUSH); 3271#endif 3272 /* 3273 * Reset the adapter's cmd queues 3274 */ 3275 slic_cmdq_reset(adapter); 3276 3277#ifdef AUTOMATIC_RESET 3278 if (!card->adapters_activated) 3279 slic_card_init(card, adapter); 3280#endif 3281 3282 spin_unlock_irqrestore(&slic_global.driver_lock.lock, 3283 slic_global.driver_lock.flags); 3284 return 0; 3285} 3286 3287static struct net_device_stats *slic_get_stats(struct net_device *dev) 3288{ 3289 struct adapter *adapter = netdev_priv(dev); 3290 3291 ASSERT(adapter); 3292 dev->stats.collisions = adapter->slic_stats.iface.xmit_collisions; 3293 dev->stats.rx_errors = adapter->slic_stats.iface.rcv_errors; 3294 dev->stats.tx_errors = adapter->slic_stats.iface.xmt_errors; 3295 dev->stats.rx_missed_errors = adapter->slic_stats.iface.rcv_discards; 3296 dev->stats.tx_heartbeat_errors = 0; 3297 dev->stats.tx_aborted_errors = 0; 3298 dev->stats.tx_window_errors = 0; 3299 dev->stats.tx_fifo_errors = 0; 3300 dev->stats.rx_frame_errors = 0; 3301 dev->stats.rx_length_errors = 0; 3302 3303 return &dev->stats; 3304} 3305 3306static int slic_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) 3307{ 3308 struct adapter *adapter = netdev_priv(dev); 3309 struct ethtool_cmd edata; 3310 struct ethtool_cmd ecmd; 3311 u32 data[7]; 3312 u32 intagg; 3313 3314 ASSERT(rq); 3315 switch (cmd) { 3316 case SIOCSLICSETINTAGG: 3317 if (copy_from_user(data, rq->ifr_data, 28)) 3318 return -EFAULT; 3319 intagg = data[0]; 3320 dev_err(&dev->dev, "%s: set interrupt aggregation to %d\n", 3321 __func__, intagg); 3322 slic_intagg_set(adapter, intagg); 3323 return 0; 3324 3325#ifdef SLIC_TRACE_DUMP_ENABLED 3326 case SIOCSLICTRACEDUMP: 3327 { 3328 u32 value; 3329 DBG_IOCTL("slic_ioctl SIOCSLIC_TRACE_DUMP\n"); 3330 3331 if (copy_from_user(data, rq->ifr_data, 28)) { 3332 PRINT_ERROR 3333 ("slic: copy_from_user FAILED getting initial simba param\n"); 3334 return -EFAULT; 3335 } 3336 3337 value = data[0]; 3338 if (tracemon_request == SLIC_DUMP_DONE) { 3339 PRINT_ERROR 3340 ("ATK Diagnostic Trace Dump Requested\n"); 3341 tracemon_request = SLIC_DUMP_REQUESTED; 3342 tracemon_request_type = value; 3343 tracemon_timestamp = jiffies; 3344 } else if ((tracemon_request == SLIC_DUMP_REQUESTED) || 3345 (tracemon_request == 3346 SLIC_DUMP_IN_PROGRESS)) { 3347 PRINT_ERROR 3348 ("ATK Diagnostic Trace Dump Requested but already in progress... ignore\n"); 3349 } else { 3350 PRINT_ERROR 3351 ("ATK Diagnostic Trace Dump Requested\n"); 3352 tracemon_request = SLIC_DUMP_REQUESTED; 3353 tracemon_request_type = value; 3354 tracemon_timestamp = jiffies; 3355 } 3356 return 0; 3357 } 3358#endif 3359 case SIOCETHTOOL: 3360 ASSERT(adapter); 3361 if (copy_from_user(&ecmd, rq->ifr_data, sizeof(ecmd))) 3362 return -EFAULT; 3363 3364 if (ecmd.cmd == ETHTOOL_GSET) { 3365 edata.supported = (SUPPORTED_10baseT_Half | 3366 SUPPORTED_10baseT_Full | 3367 SUPPORTED_100baseT_Half | 3368 SUPPORTED_100baseT_Full | 3369 SUPPORTED_Autoneg | SUPPORTED_MII); 3370 edata.port = PORT_MII; 3371 edata.transceiver = XCVR_INTERNAL; 3372 edata.phy_address = 0; 3373 if (adapter->linkspeed == LINK_100MB) 3374 edata.speed = SPEED_100; 3375 else if (adapter->linkspeed == LINK_10MB) 3376 edata.speed = SPEED_10; 3377 else 3378 edata.speed = 0; 3379 3380 if (adapter->linkduplex == LINK_FULLD) 3381 edata.duplex = DUPLEX_FULL; 3382 else 3383 edata.duplex = DUPLEX_HALF; 3384 3385 edata.autoneg = AUTONEG_ENABLE; 3386 edata.maxtxpkt = 1; 3387 edata.maxrxpkt = 1; 3388 if (copy_to_user(rq->ifr_data, &edata, sizeof(edata))) 3389 return -EFAULT; 3390 3391 } else if (ecmd.cmd == ETHTOOL_SSET) { 3392 if (!capable(CAP_NET_ADMIN)) 3393 return -EPERM; 3394 3395 if (adapter->linkspeed == LINK_100MB) 3396 edata.speed = SPEED_100; 3397 else if (adapter->linkspeed == LINK_10MB) 3398 edata.speed = SPEED_10; 3399 else 3400 edata.speed = 0; 3401 3402 if (adapter->linkduplex == LINK_FULLD) 3403 edata.duplex = DUPLEX_FULL; 3404 else 3405 edata.duplex = DUPLEX_HALF; 3406 3407 edata.autoneg = AUTONEG_ENABLE; 3408 edata.maxtxpkt = 1; 3409 edata.maxrxpkt = 1; 3410 if ((ecmd.speed != edata.speed) || 3411 (ecmd.duplex != edata.duplex)) { 3412 u32 speed; 3413 u32 duplex; 3414 3415 if (ecmd.speed == SPEED_10) 3416 speed = 0; 3417 else 3418 speed = PCR_SPEED_100; 3419 if (ecmd.duplex == DUPLEX_FULL) 3420 duplex = PCR_DUPLEX_FULL; 3421 else 3422 duplex = 0; 3423 slic_link_config(adapter, speed, duplex); 3424 slic_link_event_handler(adapter); 3425 } 3426 } 3427 return 0; 3428 default: 3429 return -EOPNOTSUPP; 3430 } 3431} 3432 3433static void slic_config_pci(struct pci_dev *pcidev) 3434{ 3435 u16 pci_command; 3436 u16 new_command; 3437 3438 pci_read_config_word(pcidev, PCI_COMMAND, &pci_command); 3439 3440 new_command = pci_command | PCI_COMMAND_MASTER 3441 | PCI_COMMAND_MEMORY 3442 | PCI_COMMAND_INVALIDATE 3443 | PCI_COMMAND_PARITY | PCI_COMMAND_SERR | PCI_COMMAND_FAST_BACK; 3444 if (pci_command != new_command) 3445 pci_write_config_word(pcidev, PCI_COMMAND, new_command); 3446} 3447 3448static int slic_card_init(struct sliccard *card, struct adapter *adapter) 3449{ 3450 __iomem struct slic_regs *slic_regs = adapter->slic_regs; 3451 struct slic_eeprom *peeprom; 3452 struct oslic_eeprom *pOeeprom; 3453 dma_addr_t phys_config; 3454 u32 phys_configh; 3455 u32 phys_configl; 3456 u32 i = 0; 3457 struct slic_shmem *pshmem; 3458 int status; 3459 uint macaddrs = card->card_size; 3460 ushort eecodesize; 3461 ushort dramsize; 3462 ushort ee_chksum; 3463 ushort calc_chksum; 3464 struct slic_config_mac *pmac; 3465 unsigned char fruformat; 3466 unsigned char oemfruformat; 3467 struct atk_fru *patkfru; 3468 union oemfru *poemfru; 3469 3470 /* Reset everything except PCI configuration space */ 3471 slic_soft_reset(adapter); 3472 3473 /* Download the microcode */ 3474 status = slic_card_download(adapter); 3475 3476 if (status != 0) { 3477 dev_err(&adapter->pcidev->dev, 3478 "download failed bus %d slot %d\n", 3479 adapter->busnumber, adapter->slotnumber); 3480 return status; 3481 } 3482 3483 if (!card->config_set) { 3484 peeprom = pci_alloc_consistent(adapter->pcidev, 3485 sizeof(struct slic_eeprom), 3486 &phys_config); 3487 3488 phys_configl = SLIC_GET_ADDR_LOW(phys_config); 3489 phys_configh = SLIC_GET_ADDR_HIGH(phys_config); 3490 3491 if (!peeprom) { 3492 dev_err(&adapter->pcidev->dev, 3493 "eeprom read failed to get memory " 3494 "bus %d slot %d\n", adapter->busnumber, 3495 adapter->slotnumber); 3496 return -ENOMEM; 3497 } else { 3498 memset(peeprom, 0, sizeof(struct slic_eeprom)); 3499 } 3500 slic_reg32_write(&slic_regs->slic_icr, ICR_INT_OFF, FLUSH); 3501 mdelay(1); 3502 pshmem = (struct slic_shmem *)adapter->phys_shmem; 3503 3504 spin_lock_irqsave(&adapter->bit64reglock.lock, 3505 adapter->bit64reglock.flags); 3506 slic_reg32_write(&slic_regs->slic_addr_upper, 0, DONT_FLUSH); 3507 slic_reg32_write(&slic_regs->slic_isp, 3508 SLIC_GET_ADDR_LOW(&pshmem->isr), FLUSH); 3509 spin_unlock_irqrestore(&adapter->bit64reglock.lock, 3510 adapter->bit64reglock.flags); 3511 3512 slic_config_get(adapter, phys_configl, phys_configh); 3513 3514 for (;;) { 3515 if (adapter->pshmem->isr) { 3516 if (adapter->pshmem->isr & ISR_UPC) { 3517 adapter->pshmem->isr = 0; 3518 slic_reg64_write(adapter, 3519 &slic_regs->slic_isp, 0, 3520 &slic_regs->slic_addr_upper, 3521 0, FLUSH); 3522 slic_reg32_write(&slic_regs->slic_isr, 3523 0, FLUSH); 3524 3525 slic_upr_request_complete(adapter, 0); 3526 break; 3527 } else { 3528 adapter->pshmem->isr = 0; 3529 slic_reg32_write(&slic_regs->slic_isr, 3530 0, FLUSH); 3531 } 3532 } else { 3533 mdelay(1); 3534 i++; 3535 if (i > 5000) { 3536 dev_err(&adapter->pcidev->dev, 3537 "%d config data fetch timed out!\n", 3538 adapter->port); 3539 slic_reg64_write(adapter, 3540 &slic_regs->slic_isp, 0, 3541 &slic_regs->slic_addr_upper, 3542 0, FLUSH); 3543 return -EINVAL; 3544 } 3545 } 3546 } 3547 3548 switch (adapter->devid) { 3549 /* Oasis card */ 3550 case SLIC_2GB_DEVICE_ID: 3551 /* extract EEPROM data and pointers to EEPROM data */ 3552 pOeeprom = (struct oslic_eeprom *) peeprom; 3553 eecodesize = pOeeprom->EecodeSize; 3554 dramsize = pOeeprom->DramSize; 3555 pmac = pOeeprom->MacInfo; 3556 fruformat = pOeeprom->FruFormat; 3557 patkfru = &pOeeprom->AtkFru; 3558 oemfruformat = pOeeprom->OemFruFormat; 3559 poemfru = &pOeeprom->OemFru; 3560 macaddrs = 2; 3561 /* Minor kludge for Oasis card 3562 get 2 MAC addresses from the 3563 EEPROM to ensure that function 1 3564 gets the Port 1 MAC address */ 3565 break; 3566 default: 3567 /* extract EEPROM data and pointers to EEPROM data */ 3568 eecodesize = peeprom->EecodeSize; 3569 dramsize = peeprom->DramSize; 3570 pmac = peeprom->u2.mac.MacInfo; 3571 fruformat = peeprom->FruFormat; 3572 patkfru = &peeprom->AtkFru; 3573 oemfruformat = peeprom->OemFruFormat; 3574 poemfru = &peeprom->OemFru; 3575 break; 3576 } 3577 3578 card->config.EepromValid = false; 3579 3580 /* see if the EEPROM is valid by checking it's checksum */ 3581 if ((eecodesize <= MAX_EECODE_SIZE) && 3582 (eecodesize >= MIN_EECODE_SIZE)) { 3583 3584 ee_chksum = 3585 *(u16 *) ((char *) peeprom + (eecodesize - 2)); 3586 /* 3587 calculate the EEPROM checksum 3588 */ 3589 calc_chksum = 3590 ~slic_eeprom_cksum((char *) peeprom, 3591 (eecodesize - 2)); 3592 /* 3593 if the ucdoe chksum flag bit worked, 3594 we wouldn't need this shit 3595 */ 3596 if (ee_chksum == calc_chksum) 3597 card->config.EepromValid = true; 3598 } 3599 /* copy in the DRAM size */ 3600 card->config.DramSize = dramsize; 3601 3602 /* copy in the MAC address(es) */ 3603 for (i = 0; i < macaddrs; i++) { 3604 memcpy(&card->config.MacInfo[i], 3605 &pmac[i], sizeof(struct slic_config_mac)); 3606 } 3607 3608 /* copy the Alacritech FRU information */ 3609 card->config.FruFormat = fruformat; 3610 memcpy(&card->config.AtkFru, patkfru, 3611 sizeof(struct atk_fru)); 3612 3613 pci_free_consistent(adapter->pcidev, 3614 sizeof(struct slic_eeprom), 3615 peeprom, phys_config); 3616 3617 if ((!card->config.EepromValid) && 3618 (adapter->reg_params.fail_on_bad_eeprom)) { 3619 slic_reg64_write(adapter, &slic_regs->slic_isp, 0, 3620 &slic_regs->slic_addr_upper, 3621 0, FLUSH); 3622 dev_err(&adapter->pcidev->dev, 3623 "unsupported CONFIGURATION EEPROM invalid\n"); 3624 return -EINVAL; 3625 } 3626 3627 card->config_set = 1; 3628 } 3629 3630 if (slic_card_download_gbrcv(adapter)) { 3631 dev_err(&adapter->pcidev->dev, 3632 "unable to download GB receive microcode\n"); 3633 return -EINVAL; 3634 } 3635 3636 if (slic_global.dynamic_intagg) 3637 slic_intagg_set(adapter, 0); 3638 else 3639 slic_intagg_set(adapter, intagg_delay); 3640 3641 /* 3642 * Initialize ping status to "ok" 3643 */ 3644 card->pingstatus = ISR_PINGMASK; 3645 3646 /* 3647 * Lastly, mark our card state as up and return success 3648 */ 3649 card->state = CARD_UP; 3650 card->reset_in_progress = 0; 3651 3652 return 0; 3653} 3654 3655static void slic_init_driver(void) 3656{ 3657 if (slic_first_init) { 3658 slic_first_init = 0; 3659 spin_lock_init(&slic_global.driver_lock.lock); 3660 slic_debug_init(); 3661 } 3662} 3663 3664static void slic_init_adapter(struct net_device *netdev, 3665 struct pci_dev *pcidev, 3666 const struct pci_device_id *pci_tbl_entry, 3667 void __iomem *memaddr, int chip_idx) 3668{ 3669 ushort index; 3670 struct slic_handle *pslic_handle; 3671 struct adapter *adapter = netdev_priv(netdev); 3672 3673/* adapter->pcidev = pcidev;*/ 3674 adapter->vendid = pci_tbl_entry->vendor; 3675 adapter->devid = pci_tbl_entry->device; 3676 adapter->subsysid = pci_tbl_entry->subdevice; 3677 adapter->busnumber = pcidev->bus->number; 3678 adapter->slotnumber = ((pcidev->devfn >> 3) & 0x1F); 3679 adapter->functionnumber = (pcidev->devfn & 0x7); 3680 adapter->memorylength = pci_resource_len(pcidev, 0); 3681 adapter->slic_regs = (__iomem struct slic_regs *)memaddr; 3682 adapter->irq = pcidev->irq; 3683/* adapter->netdev = netdev;*/ 3684 adapter->next_netdevice = head_netdevice; 3685 head_netdevice = netdev; 3686 adapter->chipid = chip_idx; 3687 adapter->port = 0; /*adapter->functionnumber;*/ 3688 adapter->cardindex = adapter->port; 3689 adapter->memorybase = memaddr; 3690 spin_lock_init(&adapter->upr_lock.lock); 3691 spin_lock_init(&adapter->bit64reglock.lock); 3692 spin_lock_init(&adapter->adapter_lock.lock); 3693 spin_lock_init(&adapter->reset_lock.lock); 3694 spin_lock_init(&adapter->handle_lock.lock); 3695 3696 adapter->card_size = 1; 3697 /* 3698 Initialize slic_handle array 3699 */ 3700 ASSERT(SLIC_CMDQ_MAXCMDS <= 0xFFFF); 3701 /* 3702 Start with 1. 0 is an invalid host handle. 3703 */ 3704 for (index = 1, pslic_handle = &adapter->slic_handles[1]; 3705 index < SLIC_CMDQ_MAXCMDS; index++, pslic_handle++) { 3706 3707 pslic_handle->token.handle_index = index; 3708 pslic_handle->type = SLIC_HANDLE_FREE; 3709 pslic_handle->next = adapter->pfree_slic_handles; 3710 adapter->pfree_slic_handles = pslic_handle; 3711 } 3712 adapter->pshmem = (struct slic_shmem *) 3713 pci_alloc_consistent(adapter->pcidev, 3714 sizeof(struct slic_shmem), 3715 &adapter-> 3716 phys_shmem); 3717 ASSERT(adapter->pshmem); 3718 3719 memset(adapter->pshmem, 0, sizeof(struct slic_shmem)); 3720 3721 return; 3722} 3723 3724static const struct net_device_ops slic_netdev_ops = { 3725 .ndo_open = slic_entry_open, 3726 .ndo_stop = slic_entry_halt, 3727 .ndo_start_xmit = slic_xmit_start, 3728 .ndo_do_ioctl = slic_ioctl, 3729 .ndo_set_mac_address = slic_mac_set_address, 3730 .ndo_get_stats = slic_get_stats, 3731 .ndo_set_multicast_list = slic_mcast_set_list, 3732 .ndo_validate_addr = eth_validate_addr, 3733 .ndo_change_mtu = eth_change_mtu, 3734}; 3735 3736static u32 slic_card_locate(struct adapter *adapter) 3737{ 3738 struct sliccard *card = slic_global.slic_card; 3739 struct physcard *physcard = slic_global.phys_card; 3740 ushort card_hostid; 3741 u16 __iomem *hostid_reg; 3742 uint i; 3743 uint rdhostid_offset = 0; 3744 3745 switch (adapter->devid) { 3746 case SLIC_2GB_DEVICE_ID: 3747 rdhostid_offset = SLIC_RDHOSTID_2GB; 3748 break; 3749 case SLIC_1GB_DEVICE_ID: 3750 rdhostid_offset = SLIC_RDHOSTID_1GB; 3751 break; 3752 default: 3753 ASSERT(0); 3754 break; 3755 } 3756 3757 hostid_reg = 3758 (u16 __iomem *) (((u8 __iomem *) (adapter->slic_regs)) + 3759 rdhostid_offset); 3760 3761 /* read the 16 bit hostid from SRAM */ 3762 card_hostid = (ushort) readw(hostid_reg); 3763 3764 /* Initialize a new card structure if need be */ 3765 if (card_hostid == SLIC_HOSTID_DEFAULT) { 3766 card = kzalloc(sizeof(struct sliccard), GFP_KERNEL); 3767 if (card == NULL) 3768 return -ENOMEM; 3769 3770 card->next = slic_global.slic_card; 3771 slic_global.slic_card = card; 3772 card->busnumber = adapter->busnumber; 3773 card->slotnumber = adapter->slotnumber; 3774 3775 /* Find an available cardnum */ 3776 for (i = 0; i < SLIC_MAX_CARDS; i++) { 3777 if (slic_global.cardnuminuse[i] == 0) { 3778 slic_global.cardnuminuse[i] = 1; 3779 card->cardnum = i; 3780 break; 3781 } 3782 } 3783 slic_global.num_slic_cards++; 3784 3785 slic_debug_card_create(card); 3786 } else { 3787 /* Card exists, find the card this adapter belongs to */ 3788 while (card) { 3789 if (card->cardnum == card_hostid) 3790 break; 3791 card = card->next; 3792 } 3793 } 3794 3795 ASSERT(card); 3796 if (!card) 3797 return -ENXIO; 3798 /* Put the adapter in the card's adapter list */ 3799 ASSERT(card->adapter[adapter->port] == NULL); 3800 if (!card->adapter[adapter->port]) { 3801 card->adapter[adapter->port] = adapter; 3802 adapter->card = card; 3803 } 3804 3805 card->card_size = 1; /* one port per *logical* card */ 3806 3807 while (physcard) { 3808 for (i = 0; i < SLIC_MAX_PORTS; i++) { 3809 if (!physcard->adapter[i]) 3810 continue; 3811 else 3812 break; 3813 } 3814 ASSERT(i != SLIC_MAX_PORTS); 3815 if (physcard->adapter[i]->slotnumber == adapter->slotnumber) 3816 break; 3817 physcard = physcard->next; 3818 } 3819 if (!physcard) { 3820 /* no structure allocated for this physical card yet */ 3821 physcard = kzalloc(sizeof(struct physcard), GFP_ATOMIC); 3822 ASSERT(physcard); 3823 3824 physcard->next = slic_global.phys_card; 3825 slic_global.phys_card = physcard; 3826 physcard->adapters_allocd = 1; 3827 } else { 3828 physcard->adapters_allocd++; 3829 } 3830 /* Note - this is ZERO relative */ 3831 adapter->physport = physcard->adapters_allocd - 1; 3832 3833 ASSERT(physcard->adapter[adapter->physport] == NULL); 3834 physcard->adapter[adapter->physport] = adapter; 3835 adapter->physcard = physcard; 3836 3837 return 0; 3838} 3839 3840static int __devinit slic_entry_probe(struct pci_dev *pcidev, 3841 const struct pci_device_id *pci_tbl_entry) 3842{ 3843 static int cards_found; 3844 static int did_version; 3845 int err = -ENODEV; 3846 struct net_device *netdev; 3847 struct adapter *adapter; 3848 void __iomem *memmapped_ioaddr = NULL; 3849 u32 status = 0; 3850 ulong mmio_start = 0; 3851 ulong mmio_len = 0; 3852 struct sliccard *card = NULL; 3853 int pci_using_dac = 0; 3854 3855 slic_global.dynamic_intagg = dynamic_intagg; 3856 3857 err = pci_enable_device(pcidev); 3858 3859 if (err) 3860 return err; 3861 3862 if (slic_debug > 0 && did_version++ == 0) { 3863 printk(KERN_DEBUG "%s\n", slic_banner); 3864 printk(KERN_DEBUG "%s\n", slic_proc_version); 3865 } 3866 3867 if (!pci_set_dma_mask(pcidev, DMA_BIT_MASK(64))) { 3868 pci_using_dac = 1; 3869 if (pci_set_consistent_dma_mask(pcidev, DMA_BIT_MASK(64))) { 3870 dev_err(&pcidev->dev, "unable to obtain 64-bit DMA for " 3871 "consistent allocations\n"); 3872 goto err_out_disable_pci; 3873 } 3874 } else if (pci_set_dma_mask(pcidev, DMA_BIT_MASK(32))) { 3875 pci_using_dac = 0; 3876 pci_set_consistent_dma_mask(pcidev, DMA_BIT_MASK(32)); 3877 } else { 3878 dev_err(&pcidev->dev, "no usable DMA configuration\n"); 3879 goto err_out_disable_pci; 3880 } 3881 3882 err = pci_request_regions(pcidev, DRV_NAME); 3883 if (err) { 3884 dev_err(&pcidev->dev, "can't obtain PCI resources\n"); 3885 goto err_out_disable_pci; 3886 } 3887 3888 pci_set_master(pcidev); 3889 3890 netdev = alloc_etherdev(sizeof(struct adapter)); 3891 if (!netdev) { 3892 err = -ENOMEM; 3893 goto err_out_exit_slic_probe; 3894 } 3895 3896 SET_NETDEV_DEV(netdev, &pcidev->dev); 3897 3898 pci_set_drvdata(pcidev, netdev); 3899 adapter = netdev_priv(netdev); 3900 adapter->netdev = netdev; 3901 adapter->pcidev = pcidev; 3902 if (pci_using_dac) 3903 netdev->features |= NETIF_F_HIGHDMA; 3904 3905 mmio_start = pci_resource_start(pcidev, 0); 3906 mmio_len = pci_resource_len(pcidev, 0); 3907 3908 3909/* memmapped_ioaddr = (u32)ioremap_nocache(mmio_start, mmio_len);*/ 3910 memmapped_ioaddr = ioremap(mmio_start, mmio_len); 3911 if (!memmapped_ioaddr) { 3912 dev_err(&pcidev->dev, "cannot remap MMIO region %lx @ %lx\n", 3913 mmio_len, mmio_start); 3914 goto err_out_free_netdev; 3915 } 3916 3917 slic_config_pci(pcidev); 3918 3919 slic_init_driver(); 3920 3921 slic_init_adapter(netdev, 3922 pcidev, pci_tbl_entry, memmapped_ioaddr, cards_found); 3923 3924 status = slic_card_locate(adapter); 3925 if (status) { 3926 dev_err(&pcidev->dev, "cannot locate card\n"); 3927 goto err_out_free_mmio_region; 3928 } 3929 3930 card = adapter->card; 3931 3932 if (!adapter->allocated) { 3933 card->adapters_allocated++; 3934 adapter->allocated = 1; 3935 } 3936 3937 status = slic_card_init(card, adapter); 3938 3939 if (status != 0) { 3940 card->state = CARD_FAIL; 3941 adapter->state = ADAPT_FAIL; 3942 adapter->linkstate = LINK_DOWN; 3943 dev_err(&pcidev->dev, "FAILED status[%x]\n", status); 3944 } else { 3945 slic_adapter_set_hwaddr(adapter); 3946 } 3947 3948 netdev->base_addr = (unsigned long)adapter->memorybase; 3949 netdev->irq = adapter->irq; 3950 netdev->netdev_ops = &slic_netdev_ops; 3951 3952 slic_debug_adapter_create(adapter); 3953 3954 strcpy(netdev->name, "eth%d"); 3955 err = register_netdev(netdev); 3956 if (err) { 3957 dev_err(&pcidev->dev, "Cannot register net device, aborting.\n"); 3958 goto err_out_unmap; 3959 } 3960 3961 cards_found++; 3962 3963 return status; 3964 3965err_out_unmap: 3966 iounmap(memmapped_ioaddr); 3967err_out_free_mmio_region: 3968 release_mem_region(mmio_start, mmio_len); 3969err_out_free_netdev: 3970 free_netdev(netdev); 3971err_out_exit_slic_probe: 3972 pci_release_regions(pcidev); 3973err_out_disable_pci: 3974 pci_disable_device(pcidev); 3975 return err; 3976} 3977 3978static struct pci_driver slic_driver = { 3979 .name = DRV_NAME, 3980 .id_table = slic_pci_tbl, 3981 .probe = slic_entry_probe, 3982 .remove = __devexit_p(slic_entry_remove), 3983}; 3984 3985static int __init slic_module_init(void) 3986{ 3987 slic_init_driver(); 3988 3989 if (debug >= 0 && slic_debug != debug) 3990 printk(KERN_DEBUG KBUILD_MODNAME ": debug level is %d.\n", 3991 debug); 3992 if (debug >= 0) 3993 slic_debug = debug; 3994 3995 return pci_register_driver(&slic_driver); 3996} 3997 3998static void __exit slic_module_cleanup(void) 3999{ 4000 pci_unregister_driver(&slic_driver); 4001 slic_debug_cleanup(); 4002} 4003 4004module_init(slic_module_init); 4005module_exit(slic_module_cleanup); 4006