1/* 2 * drivers/serial/serial_txx9.c 3 * 4 * Derived from many drivers using generic_serial interface, 5 * especially serial_tx3912.c by Steven J. Hill and r39xx_serial.c 6 * (was in Linux/VR tree) by Jim Pick. 7 * 8 * Copyright (C) 1999 Harald Koerfgen 9 * Copyright (C) 2000 Jim Pick <jim@jimpick.com> 10 * Copyright (C) 2001 Steven J. Hill (sjhill@realitydiluted.com) 11 * Copyright (C) 2000-2002 Toshiba Corporation 12 * 13 * This program is free software; you can redistribute it and/or modify 14 * it under the terms of the GNU General Public License version 2 as 15 * published by the Free Software Foundation. 16 * 17 * Serial driver for TX3927/TX4927/TX4925/TX4938 internal SIO controller 18 */ 19 20#if defined(CONFIG_SERIAL_TXX9_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) 21#define SUPPORT_SYSRQ 22#endif 23 24#include <linux/module.h> 25#include <linux/ioport.h> 26#include <linux/init.h> 27#include <linux/console.h> 28#include <linux/delay.h> 29#include <linux/platform_device.h> 30#include <linux/pci.h> 31#include <linux/serial_core.h> 32#include <linux/serial.h> 33 34#include <asm/io.h> 35 36static char *serial_version = "1.11"; 37static char *serial_name = "TX39/49 Serial driver"; 38 39#define PASS_LIMIT 256 40 41#if !defined(CONFIG_SERIAL_TXX9_STDSERIAL) 42/* "ttyS" is used for standard serial driver */ 43#define TXX9_TTY_NAME "ttyTX" 44#define TXX9_TTY_MINOR_START 196 45#define TXX9_TTY_MAJOR 204 46#else 47/* acts like standard serial driver */ 48#define TXX9_TTY_NAME "ttyS" 49#define TXX9_TTY_MINOR_START 64 50#define TXX9_TTY_MAJOR TTY_MAJOR 51#endif 52 53/* flag aliases */ 54#define UPF_TXX9_HAVE_CTS_LINE UPF_BUGGY_UART 55#define UPF_TXX9_USE_SCLK UPF_MAGIC_MULTIPLIER 56 57#ifdef CONFIG_PCI 58/* support for Toshiba TC86C001 SIO */ 59#define ENABLE_SERIAL_TXX9_PCI 60#endif 61 62/* 63 * Number of serial ports 64 */ 65#define UART_NR CONFIG_SERIAL_TXX9_NR_UARTS 66 67struct uart_txx9_port { 68 struct uart_port port; 69 /* No additional info for now */ 70}; 71 72#define TXX9_REGION_SIZE 0x24 73 74/* TXX9 Serial Registers */ 75#define TXX9_SILCR 0x00 76#define TXX9_SIDICR 0x04 77#define TXX9_SIDISR 0x08 78#define TXX9_SICISR 0x0c 79#define TXX9_SIFCR 0x10 80#define TXX9_SIFLCR 0x14 81#define TXX9_SIBGR 0x18 82#define TXX9_SITFIFO 0x1c 83#define TXX9_SIRFIFO 0x20 84 85/* SILCR : Line Control */ 86#define TXX9_SILCR_SCS_MASK 0x00000060 87#define TXX9_SILCR_SCS_IMCLK 0x00000000 88#define TXX9_SILCR_SCS_IMCLK_BG 0x00000020 89#define TXX9_SILCR_SCS_SCLK 0x00000040 90#define TXX9_SILCR_SCS_SCLK_BG 0x00000060 91#define TXX9_SILCR_UEPS 0x00000010 92#define TXX9_SILCR_UPEN 0x00000008 93#define TXX9_SILCR_USBL_MASK 0x00000004 94#define TXX9_SILCR_USBL_1BIT 0x00000000 95#define TXX9_SILCR_USBL_2BIT 0x00000004 96#define TXX9_SILCR_UMODE_MASK 0x00000003 97#define TXX9_SILCR_UMODE_8BIT 0x00000000 98#define TXX9_SILCR_UMODE_7BIT 0x00000001 99 100/* SIDICR : DMA/Int. Control */ 101#define TXX9_SIDICR_TDE 0x00008000 102#define TXX9_SIDICR_RDE 0x00004000 103#define TXX9_SIDICR_TIE 0x00002000 104#define TXX9_SIDICR_RIE 0x00001000 105#define TXX9_SIDICR_SPIE 0x00000800 106#define TXX9_SIDICR_CTSAC 0x00000600 107#define TXX9_SIDICR_STIE_MASK 0x0000003f 108#define TXX9_SIDICR_STIE_OERS 0x00000020 109#define TXX9_SIDICR_STIE_CTSS 0x00000010 110#define TXX9_SIDICR_STIE_RBRKD 0x00000008 111#define TXX9_SIDICR_STIE_TRDY 0x00000004 112#define TXX9_SIDICR_STIE_TXALS 0x00000002 113#define TXX9_SIDICR_STIE_UBRKD 0x00000001 114 115/* SIDISR : DMA/Int. Status */ 116#define TXX9_SIDISR_UBRK 0x00008000 117#define TXX9_SIDISR_UVALID 0x00004000 118#define TXX9_SIDISR_UFER 0x00002000 119#define TXX9_SIDISR_UPER 0x00001000 120#define TXX9_SIDISR_UOER 0x00000800 121#define TXX9_SIDISR_ERI 0x00000400 122#define TXX9_SIDISR_TOUT 0x00000200 123#define TXX9_SIDISR_TDIS 0x00000100 124#define TXX9_SIDISR_RDIS 0x00000080 125#define TXX9_SIDISR_STIS 0x00000040 126#define TXX9_SIDISR_RFDN_MASK 0x0000001f 127 128/* SICISR : Change Int. Status */ 129#define TXX9_SICISR_OERS 0x00000020 130#define TXX9_SICISR_CTSS 0x00000010 131#define TXX9_SICISR_RBRKD 0x00000008 132#define TXX9_SICISR_TRDY 0x00000004 133#define TXX9_SICISR_TXALS 0x00000002 134#define TXX9_SICISR_UBRKD 0x00000001 135 136/* SIFCR : FIFO Control */ 137#define TXX9_SIFCR_SWRST 0x00008000 138#define TXX9_SIFCR_RDIL_MASK 0x00000180 139#define TXX9_SIFCR_RDIL_1 0x00000000 140#define TXX9_SIFCR_RDIL_4 0x00000080 141#define TXX9_SIFCR_RDIL_8 0x00000100 142#define TXX9_SIFCR_RDIL_12 0x00000180 143#define TXX9_SIFCR_RDIL_MAX 0x00000180 144#define TXX9_SIFCR_TDIL_MASK 0x00000018 145#define TXX9_SIFCR_TDIL_MASK 0x00000018 146#define TXX9_SIFCR_TDIL_1 0x00000000 147#define TXX9_SIFCR_TDIL_4 0x00000001 148#define TXX9_SIFCR_TDIL_8 0x00000010 149#define TXX9_SIFCR_TDIL_MAX 0x00000010 150#define TXX9_SIFCR_TFRST 0x00000004 151#define TXX9_SIFCR_RFRST 0x00000002 152#define TXX9_SIFCR_FRSTE 0x00000001 153#define TXX9_SIO_TX_FIFO 8 154#define TXX9_SIO_RX_FIFO 16 155 156/* SIFLCR : Flow Control */ 157#define TXX9_SIFLCR_RCS 0x00001000 158#define TXX9_SIFLCR_TES 0x00000800 159#define TXX9_SIFLCR_RTSSC 0x00000200 160#define TXX9_SIFLCR_RSDE 0x00000100 161#define TXX9_SIFLCR_TSDE 0x00000080 162#define TXX9_SIFLCR_RTSTL_MASK 0x0000001e 163#define TXX9_SIFLCR_RTSTL_MAX 0x0000001e 164#define TXX9_SIFLCR_TBRK 0x00000001 165 166/* SIBGR : Baudrate Control */ 167#define TXX9_SIBGR_BCLK_MASK 0x00000300 168#define TXX9_SIBGR_BCLK_T0 0x00000000 169#define TXX9_SIBGR_BCLK_T2 0x00000100 170#define TXX9_SIBGR_BCLK_T4 0x00000200 171#define TXX9_SIBGR_BCLK_T6 0x00000300 172#define TXX9_SIBGR_BRD_MASK 0x000000ff 173 174static inline unsigned int sio_in(struct uart_txx9_port *up, int offset) 175{ 176 switch (up->port.iotype) { 177 default: 178 return __raw_readl(up->port.membase + offset); 179 case UPIO_PORT: 180 return inl(up->port.iobase + offset); 181 } 182} 183 184static inline void 185sio_out(struct uart_txx9_port *up, int offset, int value) 186{ 187 switch (up->port.iotype) { 188 default: 189 __raw_writel(value, up->port.membase + offset); 190 break; 191 case UPIO_PORT: 192 outl(value, up->port.iobase + offset); 193 break; 194 } 195} 196 197static inline void 198sio_mask(struct uart_txx9_port *up, int offset, unsigned int value) 199{ 200 sio_out(up, offset, sio_in(up, offset) & ~value); 201} 202static inline void 203sio_set(struct uart_txx9_port *up, int offset, unsigned int value) 204{ 205 sio_out(up, offset, sio_in(up, offset) | value); 206} 207 208static inline void 209sio_quot_set(struct uart_txx9_port *up, int quot) 210{ 211 quot >>= 1; 212 if (quot < 256) 213 sio_out(up, TXX9_SIBGR, quot | TXX9_SIBGR_BCLK_T0); 214 else if (quot < (256 << 2)) 215 sio_out(up, TXX9_SIBGR, (quot >> 2) | TXX9_SIBGR_BCLK_T2); 216 else if (quot < (256 << 4)) 217 sio_out(up, TXX9_SIBGR, (quot >> 4) | TXX9_SIBGR_BCLK_T4); 218 else if (quot < (256 << 6)) 219 sio_out(up, TXX9_SIBGR, (quot >> 6) | TXX9_SIBGR_BCLK_T6); 220 else 221 sio_out(up, TXX9_SIBGR, 0xff | TXX9_SIBGR_BCLK_T6); 222} 223 224static struct uart_txx9_port *to_uart_txx9_port(struct uart_port *port) 225{ 226 return container_of(port, struct uart_txx9_port, port); 227} 228 229static void serial_txx9_stop_tx(struct uart_port *port) 230{ 231 struct uart_txx9_port *up = to_uart_txx9_port(port); 232 sio_mask(up, TXX9_SIDICR, TXX9_SIDICR_TIE); 233} 234 235static void serial_txx9_start_tx(struct uart_port *port) 236{ 237 struct uart_txx9_port *up = to_uart_txx9_port(port); 238 sio_set(up, TXX9_SIDICR, TXX9_SIDICR_TIE); 239} 240 241static void serial_txx9_stop_rx(struct uart_port *port) 242{ 243 struct uart_txx9_port *up = to_uart_txx9_port(port); 244 up->port.read_status_mask &= ~TXX9_SIDISR_RDIS; 245} 246 247static void serial_txx9_enable_ms(struct uart_port *port) 248{ 249 /* TXX9-SIO can not control DTR... */ 250} 251 252static void serial_txx9_initialize(struct uart_port *port) 253{ 254 struct uart_txx9_port *up = to_uart_txx9_port(port); 255 unsigned int tmout = 10000; 256 257 sio_out(up, TXX9_SIFCR, TXX9_SIFCR_SWRST); 258 mmiowb(); 259 udelay(1); 260 while ((sio_in(up, TXX9_SIFCR) & TXX9_SIFCR_SWRST) && --tmout) 261 udelay(1); 262 /* TX Int by FIFO Empty, RX Int by Receiving 1 char. */ 263 sio_set(up, TXX9_SIFCR, 264 TXX9_SIFCR_TDIL_MAX | TXX9_SIFCR_RDIL_1); 265 /* initial settings */ 266 sio_out(up, TXX9_SILCR, 267 TXX9_SILCR_UMODE_8BIT | TXX9_SILCR_USBL_1BIT | 268 ((up->port.flags & UPF_TXX9_USE_SCLK) ? 269 TXX9_SILCR_SCS_SCLK_BG : TXX9_SILCR_SCS_IMCLK_BG)); 270 sio_quot_set(up, uart_get_divisor(port, 9600)); 271 sio_out(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSTL_MAX /* 15 */); 272 sio_out(up, TXX9_SIDICR, 0); 273} 274 275static inline void 276receive_chars(struct uart_txx9_port *up, unsigned int *status) 277{ 278 struct tty_struct *tty = up->port.state->port.tty; 279 unsigned char ch; 280 unsigned int disr = *status; 281 int max_count = 256; 282 char flag; 283 unsigned int next_ignore_status_mask; 284 285 do { 286 ch = sio_in(up, TXX9_SIRFIFO); 287 flag = TTY_NORMAL; 288 up->port.icount.rx++; 289 290 /* mask out RFDN_MASK bit added by previous overrun */ 291 next_ignore_status_mask = 292 up->port.ignore_status_mask & ~TXX9_SIDISR_RFDN_MASK; 293 if (unlikely(disr & (TXX9_SIDISR_UBRK | TXX9_SIDISR_UPER | 294 TXX9_SIDISR_UFER | TXX9_SIDISR_UOER))) { 295 /* 296 * For statistics only 297 */ 298 if (disr & TXX9_SIDISR_UBRK) { 299 disr &= ~(TXX9_SIDISR_UFER | TXX9_SIDISR_UPER); 300 up->port.icount.brk++; 301 /* 302 * We do the SysRQ and SAK checking 303 * here because otherwise the break 304 * may get masked by ignore_status_mask 305 * or read_status_mask. 306 */ 307 if (uart_handle_break(&up->port)) 308 goto ignore_char; 309 } else if (disr & TXX9_SIDISR_UPER) 310 up->port.icount.parity++; 311 else if (disr & TXX9_SIDISR_UFER) 312 up->port.icount.frame++; 313 if (disr & TXX9_SIDISR_UOER) { 314 up->port.icount.overrun++; 315 /* 316 * The receiver read buffer still hold 317 * a char which caused overrun. 318 * Ignore next char by adding RFDN_MASK 319 * to ignore_status_mask temporarily. 320 */ 321 next_ignore_status_mask |= 322 TXX9_SIDISR_RFDN_MASK; 323 } 324 325 /* 326 * Mask off conditions which should be ingored. 327 */ 328 disr &= up->port.read_status_mask; 329 330 if (disr & TXX9_SIDISR_UBRK) { 331 flag = TTY_BREAK; 332 } else if (disr & TXX9_SIDISR_UPER) 333 flag = TTY_PARITY; 334 else if (disr & TXX9_SIDISR_UFER) 335 flag = TTY_FRAME; 336 } 337 if (uart_handle_sysrq_char(&up->port, ch)) 338 goto ignore_char; 339 340 uart_insert_char(&up->port, disr, TXX9_SIDISR_UOER, ch, flag); 341 342 ignore_char: 343 up->port.ignore_status_mask = next_ignore_status_mask; 344 disr = sio_in(up, TXX9_SIDISR); 345 } while (!(disr & TXX9_SIDISR_UVALID) && (max_count-- > 0)); 346 spin_unlock(&up->port.lock); 347 tty_flip_buffer_push(tty); 348 spin_lock(&up->port.lock); 349 *status = disr; 350} 351 352static inline void transmit_chars(struct uart_txx9_port *up) 353{ 354 struct circ_buf *xmit = &up->port.state->xmit; 355 int count; 356 357 if (up->port.x_char) { 358 sio_out(up, TXX9_SITFIFO, up->port.x_char); 359 up->port.icount.tx++; 360 up->port.x_char = 0; 361 return; 362 } 363 if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) { 364 serial_txx9_stop_tx(&up->port); 365 return; 366 } 367 368 count = TXX9_SIO_TX_FIFO; 369 do { 370 sio_out(up, TXX9_SITFIFO, xmit->buf[xmit->tail]); 371 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); 372 up->port.icount.tx++; 373 if (uart_circ_empty(xmit)) 374 break; 375 } while (--count > 0); 376 377 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) 378 uart_write_wakeup(&up->port); 379 380 if (uart_circ_empty(xmit)) 381 serial_txx9_stop_tx(&up->port); 382} 383 384static irqreturn_t serial_txx9_interrupt(int irq, void *dev_id) 385{ 386 int pass_counter = 0; 387 struct uart_txx9_port *up = dev_id; 388 unsigned int status; 389 390 while (1) { 391 spin_lock(&up->port.lock); 392 status = sio_in(up, TXX9_SIDISR); 393 if (!(sio_in(up, TXX9_SIDICR) & TXX9_SIDICR_TIE)) 394 status &= ~TXX9_SIDISR_TDIS; 395 if (!(status & (TXX9_SIDISR_TDIS | TXX9_SIDISR_RDIS | 396 TXX9_SIDISR_TOUT))) { 397 spin_unlock(&up->port.lock); 398 break; 399 } 400 401 if (status & TXX9_SIDISR_RDIS) 402 receive_chars(up, &status); 403 if (status & TXX9_SIDISR_TDIS) 404 transmit_chars(up); 405 /* Clear TX/RX Int. Status */ 406 sio_mask(up, TXX9_SIDISR, 407 TXX9_SIDISR_TDIS | TXX9_SIDISR_RDIS | 408 TXX9_SIDISR_TOUT); 409 spin_unlock(&up->port.lock); 410 411 if (pass_counter++ > PASS_LIMIT) 412 break; 413 } 414 415 return pass_counter ? IRQ_HANDLED : IRQ_NONE; 416} 417 418static unsigned int serial_txx9_tx_empty(struct uart_port *port) 419{ 420 struct uart_txx9_port *up = to_uart_txx9_port(port); 421 unsigned long flags; 422 unsigned int ret; 423 424 spin_lock_irqsave(&up->port.lock, flags); 425 ret = (sio_in(up, TXX9_SICISR) & TXX9_SICISR_TXALS) ? TIOCSER_TEMT : 0; 426 spin_unlock_irqrestore(&up->port.lock, flags); 427 428 return ret; 429} 430 431static unsigned int serial_txx9_get_mctrl(struct uart_port *port) 432{ 433 struct uart_txx9_port *up = to_uart_txx9_port(port); 434 unsigned int ret; 435 436 /* no modem control lines */ 437 ret = TIOCM_CAR | TIOCM_DSR; 438 ret |= (sio_in(up, TXX9_SIFLCR) & TXX9_SIFLCR_RTSSC) ? 0 : TIOCM_RTS; 439 ret |= (sio_in(up, TXX9_SICISR) & TXX9_SICISR_CTSS) ? 0 : TIOCM_CTS; 440 441 return ret; 442} 443 444static void serial_txx9_set_mctrl(struct uart_port *port, unsigned int mctrl) 445{ 446 struct uart_txx9_port *up = to_uart_txx9_port(port); 447 448 if (mctrl & TIOCM_RTS) 449 sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSSC); 450 else 451 sio_set(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSSC); 452} 453 454static void serial_txx9_break_ctl(struct uart_port *port, int break_state) 455{ 456 struct uart_txx9_port *up = to_uart_txx9_port(port); 457 unsigned long flags; 458 459 spin_lock_irqsave(&up->port.lock, flags); 460 if (break_state == -1) 461 sio_set(up, TXX9_SIFLCR, TXX9_SIFLCR_TBRK); 462 else 463 sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_TBRK); 464 spin_unlock_irqrestore(&up->port.lock, flags); 465} 466 467#if defined(CONFIG_SERIAL_TXX9_CONSOLE) || CONFIG_CONSOLE_POLL 468/* 469 * Wait for transmitter & holding register to empty 470 */ 471static void wait_for_xmitr(struct uart_txx9_port *up) 472{ 473 unsigned int tmout = 10000; 474 475 /* Wait up to 10ms for the character(s) to be sent. */ 476 while (--tmout && 477 !(sio_in(up, TXX9_SICISR) & TXX9_SICISR_TXALS)) 478 udelay(1); 479 480 /* Wait up to 1s for flow control if necessary */ 481 if (up->port.flags & UPF_CONS_FLOW) { 482 tmout = 1000000; 483 while (--tmout && 484 (sio_in(up, TXX9_SICISR) & TXX9_SICISR_CTSS)) 485 udelay(1); 486 } 487} 488#endif 489 490#ifdef CONFIG_CONSOLE_POLL 491/* 492 * Console polling routines for writing and reading from the uart while 493 * in an interrupt or debug context. 494 */ 495 496static int serial_txx9_get_poll_char(struct uart_port *port) 497{ 498 unsigned int ier; 499 unsigned char c; 500 struct uart_txx9_port *up = to_uart_txx9_port(port); 501 502 /* 503 * First save the IER then disable the interrupts 504 */ 505 ier = sio_in(up, TXX9_SIDICR); 506 sio_out(up, TXX9_SIDICR, 0); 507 508 while (sio_in(up, TXX9_SIDISR) & TXX9_SIDISR_UVALID) 509 ; 510 511 c = sio_in(up, TXX9_SIRFIFO); 512 513 /* 514 * Finally, clear RX interrupt status 515 * and restore the IER 516 */ 517 sio_mask(up, TXX9_SIDISR, TXX9_SIDISR_RDIS); 518 sio_out(up, TXX9_SIDICR, ier); 519 return c; 520} 521 522 523static void serial_txx9_put_poll_char(struct uart_port *port, unsigned char c) 524{ 525 unsigned int ier; 526 struct uart_txx9_port *up = to_uart_txx9_port(port); 527 528 /* 529 * First save the IER then disable the interrupts 530 */ 531 ier = sio_in(up, TXX9_SIDICR); 532 sio_out(up, TXX9_SIDICR, 0); 533 534 wait_for_xmitr(up); 535 /* 536 * Send the character out. 537 * If a LF, also do CR... 538 */ 539 sio_out(up, TXX9_SITFIFO, c); 540 if (c == 10) { 541 wait_for_xmitr(up); 542 sio_out(up, TXX9_SITFIFO, 13); 543 } 544 545 /* 546 * Finally, wait for transmitter to become empty 547 * and restore the IER 548 */ 549 wait_for_xmitr(up); 550 sio_out(up, TXX9_SIDICR, ier); 551} 552 553#endif /* CONFIG_CONSOLE_POLL */ 554 555static int serial_txx9_startup(struct uart_port *port) 556{ 557 struct uart_txx9_port *up = to_uart_txx9_port(port); 558 unsigned long flags; 559 int retval; 560 561 /* 562 * Clear the FIFO buffers and disable them. 563 * (they will be reenabled in set_termios()) 564 */ 565 sio_set(up, TXX9_SIFCR, 566 TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE); 567 /* clear reset */ 568 sio_mask(up, TXX9_SIFCR, 569 TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE); 570 sio_out(up, TXX9_SIDICR, 0); 571 572 /* 573 * Clear the interrupt registers. 574 */ 575 sio_out(up, TXX9_SIDISR, 0); 576 577 retval = request_irq(up->port.irq, serial_txx9_interrupt, 578 IRQF_SHARED, "serial_txx9", up); 579 if (retval) 580 return retval; 581 582 /* 583 * Now, initialize the UART 584 */ 585 spin_lock_irqsave(&up->port.lock, flags); 586 serial_txx9_set_mctrl(&up->port, up->port.mctrl); 587 spin_unlock_irqrestore(&up->port.lock, flags); 588 589 /* Enable RX/TX */ 590 sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_RSDE | TXX9_SIFLCR_TSDE); 591 592 /* 593 * Finally, enable interrupts. 594 */ 595 sio_set(up, TXX9_SIDICR, TXX9_SIDICR_RIE); 596 597 return 0; 598} 599 600static void serial_txx9_shutdown(struct uart_port *port) 601{ 602 struct uart_txx9_port *up = to_uart_txx9_port(port); 603 unsigned long flags; 604 605 /* 606 * Disable interrupts from this port 607 */ 608 sio_out(up, TXX9_SIDICR, 0); /* disable all intrs */ 609 610 spin_lock_irqsave(&up->port.lock, flags); 611 serial_txx9_set_mctrl(&up->port, up->port.mctrl); 612 spin_unlock_irqrestore(&up->port.lock, flags); 613 614 /* 615 * Disable break condition 616 */ 617 sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_TBRK); 618 619#ifdef CONFIG_SERIAL_TXX9_CONSOLE 620 if (up->port.cons && up->port.line == up->port.cons->index) { 621 free_irq(up->port.irq, up); 622 return; 623 } 624#endif 625 /* reset FIFOs */ 626 sio_set(up, TXX9_SIFCR, 627 TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE); 628 /* clear reset */ 629 sio_mask(up, TXX9_SIFCR, 630 TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE); 631 632 /* Disable RX/TX */ 633 sio_set(up, TXX9_SIFLCR, TXX9_SIFLCR_RSDE | TXX9_SIFLCR_TSDE); 634 635 free_irq(up->port.irq, up); 636} 637 638static void 639serial_txx9_set_termios(struct uart_port *port, struct ktermios *termios, 640 struct ktermios *old) 641{ 642 struct uart_txx9_port *up = to_uart_txx9_port(port); 643 unsigned int cval, fcr = 0; 644 unsigned long flags; 645 unsigned int baud, quot; 646 647 /* 648 * We don't support modem control lines. 649 */ 650 termios->c_cflag &= ~(HUPCL | CMSPAR); 651 termios->c_cflag |= CLOCAL; 652 653 cval = sio_in(up, TXX9_SILCR); 654 /* byte size and parity */ 655 cval &= ~TXX9_SILCR_UMODE_MASK; 656 switch (termios->c_cflag & CSIZE) { 657 case CS7: 658 cval |= TXX9_SILCR_UMODE_7BIT; 659 break; 660 default: 661 case CS5: /* not supported */ 662 case CS6: /* not supported */ 663 case CS8: 664 cval |= TXX9_SILCR_UMODE_8BIT; 665 break; 666 } 667 668 cval &= ~TXX9_SILCR_USBL_MASK; 669 if (termios->c_cflag & CSTOPB) 670 cval |= TXX9_SILCR_USBL_2BIT; 671 else 672 cval |= TXX9_SILCR_USBL_1BIT; 673 cval &= ~(TXX9_SILCR_UPEN | TXX9_SILCR_UEPS); 674 if (termios->c_cflag & PARENB) 675 cval |= TXX9_SILCR_UPEN; 676 if (!(termios->c_cflag & PARODD)) 677 cval |= TXX9_SILCR_UEPS; 678 679 /* 680 * Ask the core to calculate the divisor for us. 681 */ 682 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16/2); 683 quot = uart_get_divisor(port, baud); 684 685 /* Set up FIFOs */ 686 /* TX Int by FIFO Empty, RX Int by Receiving 1 char. */ 687 fcr = TXX9_SIFCR_TDIL_MAX | TXX9_SIFCR_RDIL_1; 688 689 /* 690 * Ok, we're now changing the port state. Do it with 691 * interrupts disabled. 692 */ 693 spin_lock_irqsave(&up->port.lock, flags); 694 695 /* 696 * Update the per-port timeout. 697 */ 698 uart_update_timeout(port, termios->c_cflag, baud); 699 700 up->port.read_status_mask = TXX9_SIDISR_UOER | 701 TXX9_SIDISR_TDIS | TXX9_SIDISR_RDIS; 702 if (termios->c_iflag & INPCK) 703 up->port.read_status_mask |= TXX9_SIDISR_UFER | TXX9_SIDISR_UPER; 704 if (termios->c_iflag & (BRKINT | PARMRK)) 705 up->port.read_status_mask |= TXX9_SIDISR_UBRK; 706 707 /* 708 * Characteres to ignore 709 */ 710 up->port.ignore_status_mask = 0; 711 if (termios->c_iflag & IGNPAR) 712 up->port.ignore_status_mask |= TXX9_SIDISR_UPER | TXX9_SIDISR_UFER; 713 if (termios->c_iflag & IGNBRK) { 714 up->port.ignore_status_mask |= TXX9_SIDISR_UBRK; 715 /* 716 * If we're ignoring parity and break indicators, 717 * ignore overruns too (for real raw support). 718 */ 719 if (termios->c_iflag & IGNPAR) 720 up->port.ignore_status_mask |= TXX9_SIDISR_UOER; 721 } 722 723 /* 724 * ignore all characters if CREAD is not set 725 */ 726 if ((termios->c_cflag & CREAD) == 0) 727 up->port.ignore_status_mask |= TXX9_SIDISR_RDIS; 728 729 /* CTS flow control flag */ 730 if ((termios->c_cflag & CRTSCTS) && 731 (up->port.flags & UPF_TXX9_HAVE_CTS_LINE)) { 732 sio_set(up, TXX9_SIFLCR, 733 TXX9_SIFLCR_RCS | TXX9_SIFLCR_TES); 734 } else { 735 sio_mask(up, TXX9_SIFLCR, 736 TXX9_SIFLCR_RCS | TXX9_SIFLCR_TES); 737 } 738 739 sio_out(up, TXX9_SILCR, cval); 740 sio_quot_set(up, quot); 741 sio_out(up, TXX9_SIFCR, fcr); 742 743 serial_txx9_set_mctrl(&up->port, up->port.mctrl); 744 spin_unlock_irqrestore(&up->port.lock, flags); 745} 746 747static void 748serial_txx9_pm(struct uart_port *port, unsigned int state, 749 unsigned int oldstate) 750{ 751 /* 752 * If oldstate was -1 this is called from 753 * uart_configure_port(). In this case do not initialize the 754 * port now, because the port was already initialized (for 755 * non-console port) or should not be initialized here (for 756 * console port). If we initialized the port here we lose 757 * serial console settings. 758 */ 759 if (state == 0 && oldstate != -1) 760 serial_txx9_initialize(port); 761} 762 763static int serial_txx9_request_resource(struct uart_txx9_port *up) 764{ 765 unsigned int size = TXX9_REGION_SIZE; 766 int ret = 0; 767 768 switch (up->port.iotype) { 769 default: 770 if (!up->port.mapbase) 771 break; 772 773 if (!request_mem_region(up->port.mapbase, size, "serial_txx9")) { 774 ret = -EBUSY; 775 break; 776 } 777 778 if (up->port.flags & UPF_IOREMAP) { 779 up->port.membase = ioremap(up->port.mapbase, size); 780 if (!up->port.membase) { 781 release_mem_region(up->port.mapbase, size); 782 ret = -ENOMEM; 783 } 784 } 785 break; 786 787 case UPIO_PORT: 788 if (!request_region(up->port.iobase, size, "serial_txx9")) 789 ret = -EBUSY; 790 break; 791 } 792 return ret; 793} 794 795static void serial_txx9_release_resource(struct uart_txx9_port *up) 796{ 797 unsigned int size = TXX9_REGION_SIZE; 798 799 switch (up->port.iotype) { 800 default: 801 if (!up->port.mapbase) 802 break; 803 804 if (up->port.flags & UPF_IOREMAP) { 805 iounmap(up->port.membase); 806 up->port.membase = NULL; 807 } 808 809 release_mem_region(up->port.mapbase, size); 810 break; 811 812 case UPIO_PORT: 813 release_region(up->port.iobase, size); 814 break; 815 } 816} 817 818static void serial_txx9_release_port(struct uart_port *port) 819{ 820 struct uart_txx9_port *up = to_uart_txx9_port(port); 821 serial_txx9_release_resource(up); 822} 823 824static int serial_txx9_request_port(struct uart_port *port) 825{ 826 struct uart_txx9_port *up = to_uart_txx9_port(port); 827 return serial_txx9_request_resource(up); 828} 829 830static void serial_txx9_config_port(struct uart_port *port, int uflags) 831{ 832 struct uart_txx9_port *up = to_uart_txx9_port(port); 833 int ret; 834 835 /* 836 * Find the region that we can probe for. This in turn 837 * tells us whether we can probe for the type of port. 838 */ 839 ret = serial_txx9_request_resource(up); 840 if (ret < 0) 841 return; 842 port->type = PORT_TXX9; 843 up->port.fifosize = TXX9_SIO_TX_FIFO; 844 845#ifdef CONFIG_SERIAL_TXX9_CONSOLE 846 if (up->port.line == up->port.cons->index) 847 return; 848#endif 849 serial_txx9_initialize(port); 850} 851 852static const char * 853serial_txx9_type(struct uart_port *port) 854{ 855 return "txx9"; 856} 857 858static struct uart_ops serial_txx9_pops = { 859 .tx_empty = serial_txx9_tx_empty, 860 .set_mctrl = serial_txx9_set_mctrl, 861 .get_mctrl = serial_txx9_get_mctrl, 862 .stop_tx = serial_txx9_stop_tx, 863 .start_tx = serial_txx9_start_tx, 864 .stop_rx = serial_txx9_stop_rx, 865 .enable_ms = serial_txx9_enable_ms, 866 .break_ctl = serial_txx9_break_ctl, 867 .startup = serial_txx9_startup, 868 .shutdown = serial_txx9_shutdown, 869 .set_termios = serial_txx9_set_termios, 870 .pm = serial_txx9_pm, 871 .type = serial_txx9_type, 872 .release_port = serial_txx9_release_port, 873 .request_port = serial_txx9_request_port, 874 .config_port = serial_txx9_config_port, 875#ifdef CONFIG_CONSOLE_POLL 876 .poll_get_char = serial_txx9_get_poll_char, 877 .poll_put_char = serial_txx9_put_poll_char, 878#endif 879}; 880 881static struct uart_txx9_port serial_txx9_ports[UART_NR]; 882 883static void __init serial_txx9_register_ports(struct uart_driver *drv, 884 struct device *dev) 885{ 886 int i; 887 888 for (i = 0; i < UART_NR; i++) { 889 struct uart_txx9_port *up = &serial_txx9_ports[i]; 890 891 up->port.line = i; 892 up->port.ops = &serial_txx9_pops; 893 up->port.dev = dev; 894 if (up->port.iobase || up->port.mapbase) 895 uart_add_one_port(drv, &up->port); 896 } 897} 898 899#ifdef CONFIG_SERIAL_TXX9_CONSOLE 900 901static void serial_txx9_console_putchar(struct uart_port *port, int ch) 902{ 903 struct uart_txx9_port *up = to_uart_txx9_port(port); 904 905 wait_for_xmitr(up); 906 sio_out(up, TXX9_SITFIFO, ch); 907} 908 909/* 910 * Print a string to the serial port trying not to disturb 911 * any possible real use of the port... 912 * 913 * The console_lock must be held when we get here. 914 */ 915static void 916serial_txx9_console_write(struct console *co, const char *s, unsigned int count) 917{ 918 struct uart_txx9_port *up = &serial_txx9_ports[co->index]; 919 unsigned int ier, flcr; 920 921 /* 922 * First save the UER then disable the interrupts 923 */ 924 ier = sio_in(up, TXX9_SIDICR); 925 sio_out(up, TXX9_SIDICR, 0); 926 /* 927 * Disable flow-control if enabled (and unnecessary) 928 */ 929 flcr = sio_in(up, TXX9_SIFLCR); 930 if (!(up->port.flags & UPF_CONS_FLOW) && (flcr & TXX9_SIFLCR_TES)) 931 sio_out(up, TXX9_SIFLCR, flcr & ~TXX9_SIFLCR_TES); 932 933 uart_console_write(&up->port, s, count, serial_txx9_console_putchar); 934 935 /* 936 * Finally, wait for transmitter to become empty 937 * and restore the IER 938 */ 939 wait_for_xmitr(up); 940 sio_out(up, TXX9_SIFLCR, flcr); 941 sio_out(up, TXX9_SIDICR, ier); 942} 943 944static int __init serial_txx9_console_setup(struct console *co, char *options) 945{ 946 struct uart_port *port; 947 struct uart_txx9_port *up; 948 int baud = 9600; 949 int bits = 8; 950 int parity = 'n'; 951 int flow = 'n'; 952 953 /* 954 * Check whether an invalid uart number has been specified, and 955 * if so, search for the first available port that does have 956 * console support. 957 */ 958 if (co->index >= UART_NR) 959 co->index = 0; 960 up = &serial_txx9_ports[co->index]; 961 port = &up->port; 962 if (!port->ops) 963 return -ENODEV; 964 965 serial_txx9_initialize(&up->port); 966 967 if (options) 968 uart_parse_options(options, &baud, &parity, &bits, &flow); 969 970 return uart_set_options(port, co, baud, parity, bits, flow); 971} 972 973static struct uart_driver serial_txx9_reg; 974static struct console serial_txx9_console = { 975 .name = TXX9_TTY_NAME, 976 .write = serial_txx9_console_write, 977 .device = uart_console_device, 978 .setup = serial_txx9_console_setup, 979 .flags = CON_PRINTBUFFER, 980 .index = -1, 981 .data = &serial_txx9_reg, 982}; 983 984static int __init serial_txx9_console_init(void) 985{ 986 register_console(&serial_txx9_console); 987 return 0; 988} 989console_initcall(serial_txx9_console_init); 990 991#define SERIAL_TXX9_CONSOLE &serial_txx9_console 992#else 993#define SERIAL_TXX9_CONSOLE NULL 994#endif 995 996static struct uart_driver serial_txx9_reg = { 997 .owner = THIS_MODULE, 998 .driver_name = "serial_txx9", 999 .dev_name = TXX9_TTY_NAME, 1000 .major = TXX9_TTY_MAJOR, 1001 .minor = TXX9_TTY_MINOR_START, 1002 .nr = UART_NR, 1003 .cons = SERIAL_TXX9_CONSOLE, 1004}; 1005 1006int __init early_serial_txx9_setup(struct uart_port *port) 1007{ 1008 if (port->line >= ARRAY_SIZE(serial_txx9_ports)) 1009 return -ENODEV; 1010 1011 serial_txx9_ports[port->line].port = *port; 1012 serial_txx9_ports[port->line].port.ops = &serial_txx9_pops; 1013 serial_txx9_ports[port->line].port.flags |= 1014 UPF_BOOT_AUTOCONF | UPF_FIXED_PORT; 1015 return 0; 1016} 1017 1018static DEFINE_MUTEX(serial_txx9_mutex); 1019 1020/** 1021 * serial_txx9_register_port - register a serial port 1022 * @port: serial port template 1023 * 1024 * Configure the serial port specified by the request. 1025 * 1026 * The port is then probed and if necessary the IRQ is autodetected 1027 * If this fails an error is returned. 1028 * 1029 * On success the port is ready to use and the line number is returned. 1030 */ 1031static int __devinit serial_txx9_register_port(struct uart_port *port) 1032{ 1033 int i; 1034 struct uart_txx9_port *uart; 1035 int ret = -ENOSPC; 1036 1037 mutex_lock(&serial_txx9_mutex); 1038 for (i = 0; i < UART_NR; i++) { 1039 uart = &serial_txx9_ports[i]; 1040 if (uart_match_port(&uart->port, port)) { 1041 uart_remove_one_port(&serial_txx9_reg, &uart->port); 1042 break; 1043 } 1044 } 1045 if (i == UART_NR) { 1046 /* Find unused port */ 1047 for (i = 0; i < UART_NR; i++) { 1048 uart = &serial_txx9_ports[i]; 1049 if (!(uart->port.iobase || uart->port.mapbase)) 1050 break; 1051 } 1052 } 1053 if (i < UART_NR) { 1054 uart->port.iobase = port->iobase; 1055 uart->port.membase = port->membase; 1056 uart->port.irq = port->irq; 1057 uart->port.uartclk = port->uartclk; 1058 uart->port.iotype = port->iotype; 1059 uart->port.flags = port->flags 1060 | UPF_BOOT_AUTOCONF | UPF_FIXED_PORT; 1061 uart->port.mapbase = port->mapbase; 1062 if (port->dev) 1063 uart->port.dev = port->dev; 1064 ret = uart_add_one_port(&serial_txx9_reg, &uart->port); 1065 if (ret == 0) 1066 ret = uart->port.line; 1067 } 1068 mutex_unlock(&serial_txx9_mutex); 1069 return ret; 1070} 1071 1072/** 1073 * serial_txx9_unregister_port - remove a txx9 serial port at runtime 1074 * @line: serial line number 1075 * 1076 * Remove one serial port. This may not be called from interrupt 1077 * context. We hand the port back to the our control. 1078 */ 1079static void __devexit serial_txx9_unregister_port(int line) 1080{ 1081 struct uart_txx9_port *uart = &serial_txx9_ports[line]; 1082 1083 mutex_lock(&serial_txx9_mutex); 1084 uart_remove_one_port(&serial_txx9_reg, &uart->port); 1085 uart->port.flags = 0; 1086 uart->port.type = PORT_UNKNOWN; 1087 uart->port.iobase = 0; 1088 uart->port.mapbase = 0; 1089 uart->port.membase = NULL; 1090 uart->port.dev = NULL; 1091 mutex_unlock(&serial_txx9_mutex); 1092} 1093 1094/* 1095 * Register a set of serial devices attached to a platform device. 1096 */ 1097static int __devinit serial_txx9_probe(struct platform_device *dev) 1098{ 1099 struct uart_port *p = dev->dev.platform_data; 1100 struct uart_port port; 1101 int ret, i; 1102 1103 memset(&port, 0, sizeof(struct uart_port)); 1104 for (i = 0; p && p->uartclk != 0; p++, i++) { 1105 port.iobase = p->iobase; 1106 port.membase = p->membase; 1107 port.irq = p->irq; 1108 port.uartclk = p->uartclk; 1109 port.iotype = p->iotype; 1110 port.flags = p->flags; 1111 port.mapbase = p->mapbase; 1112 port.dev = &dev->dev; 1113 ret = serial_txx9_register_port(&port); 1114 if (ret < 0) { 1115 dev_err(&dev->dev, "unable to register port at index %d " 1116 "(IO%lx MEM%llx IRQ%d): %d\n", i, 1117 p->iobase, (unsigned long long)p->mapbase, 1118 p->irq, ret); 1119 } 1120 } 1121 return 0; 1122} 1123 1124/* 1125 * Remove serial ports registered against a platform device. 1126 */ 1127static int __devexit serial_txx9_remove(struct platform_device *dev) 1128{ 1129 int i; 1130 1131 for (i = 0; i < UART_NR; i++) { 1132 struct uart_txx9_port *up = &serial_txx9_ports[i]; 1133 1134 if (up->port.dev == &dev->dev) 1135 serial_txx9_unregister_port(i); 1136 } 1137 return 0; 1138} 1139 1140#ifdef CONFIG_PM 1141static int serial_txx9_suspend(struct platform_device *dev, pm_message_t state) 1142{ 1143 int i; 1144 1145 for (i = 0; i < UART_NR; i++) { 1146 struct uart_txx9_port *up = &serial_txx9_ports[i]; 1147 1148 if (up->port.type != PORT_UNKNOWN && up->port.dev == &dev->dev) 1149 uart_suspend_port(&serial_txx9_reg, &up->port); 1150 } 1151 1152 return 0; 1153} 1154 1155static int serial_txx9_resume(struct platform_device *dev) 1156{ 1157 int i; 1158 1159 for (i = 0; i < UART_NR; i++) { 1160 struct uart_txx9_port *up = &serial_txx9_ports[i]; 1161 1162 if (up->port.type != PORT_UNKNOWN && up->port.dev == &dev->dev) 1163 uart_resume_port(&serial_txx9_reg, &up->port); 1164 } 1165 1166 return 0; 1167} 1168#endif 1169 1170static struct platform_driver serial_txx9_plat_driver = { 1171 .probe = serial_txx9_probe, 1172 .remove = __devexit_p(serial_txx9_remove), 1173#ifdef CONFIG_PM 1174 .suspend = serial_txx9_suspend, 1175 .resume = serial_txx9_resume, 1176#endif 1177 .driver = { 1178 .name = "serial_txx9", 1179 .owner = THIS_MODULE, 1180 }, 1181}; 1182 1183#ifdef ENABLE_SERIAL_TXX9_PCI 1184/* 1185 * Probe one serial board. Unfortunately, there is no rhyme nor reason 1186 * to the arrangement of serial ports on a PCI card. 1187 */ 1188static int __devinit 1189pciserial_txx9_init_one(struct pci_dev *dev, const struct pci_device_id *ent) 1190{ 1191 struct uart_port port; 1192 int line; 1193 int rc; 1194 1195 rc = pci_enable_device(dev); 1196 if (rc) 1197 return rc; 1198 1199 memset(&port, 0, sizeof(port)); 1200 port.ops = &serial_txx9_pops; 1201 port.flags |= UPF_TXX9_HAVE_CTS_LINE; 1202 port.uartclk = 66670000; 1203 port.irq = dev->irq; 1204 port.iotype = UPIO_PORT; 1205 port.iobase = pci_resource_start(dev, 1); 1206 port.dev = &dev->dev; 1207 line = serial_txx9_register_port(&port); 1208 if (line < 0) { 1209 printk(KERN_WARNING "Couldn't register serial port %s: %d\n", pci_name(dev), line); 1210 pci_disable_device(dev); 1211 return line; 1212 } 1213 pci_set_drvdata(dev, &serial_txx9_ports[line]); 1214 1215 return 0; 1216} 1217 1218static void __devexit pciserial_txx9_remove_one(struct pci_dev *dev) 1219{ 1220 struct uart_txx9_port *up = pci_get_drvdata(dev); 1221 1222 pci_set_drvdata(dev, NULL); 1223 1224 if (up) { 1225 serial_txx9_unregister_port(up->port.line); 1226 pci_disable_device(dev); 1227 } 1228} 1229 1230#ifdef CONFIG_PM 1231static int pciserial_txx9_suspend_one(struct pci_dev *dev, pm_message_t state) 1232{ 1233 struct uart_txx9_port *up = pci_get_drvdata(dev); 1234 1235 if (up) 1236 uart_suspend_port(&serial_txx9_reg, &up->port); 1237 pci_save_state(dev); 1238 pci_set_power_state(dev, pci_choose_state(dev, state)); 1239 return 0; 1240} 1241 1242static int pciserial_txx9_resume_one(struct pci_dev *dev) 1243{ 1244 struct uart_txx9_port *up = pci_get_drvdata(dev); 1245 1246 pci_set_power_state(dev, PCI_D0); 1247 pci_restore_state(dev); 1248 if (up) 1249 uart_resume_port(&serial_txx9_reg, &up->port); 1250 return 0; 1251} 1252#endif 1253 1254static const struct pci_device_id serial_txx9_pci_tbl[] = { 1255 { PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA_2, PCI_DEVICE_ID_TOSHIBA_TC86C001_MISC) }, 1256 { 0, } 1257}; 1258 1259static struct pci_driver serial_txx9_pci_driver = { 1260 .name = "serial_txx9", 1261 .probe = pciserial_txx9_init_one, 1262 .remove = __devexit_p(pciserial_txx9_remove_one), 1263#ifdef CONFIG_PM 1264 .suspend = pciserial_txx9_suspend_one, 1265 .resume = pciserial_txx9_resume_one, 1266#endif 1267 .id_table = serial_txx9_pci_tbl, 1268}; 1269 1270MODULE_DEVICE_TABLE(pci, serial_txx9_pci_tbl); 1271#endif /* ENABLE_SERIAL_TXX9_PCI */ 1272 1273static struct platform_device *serial_txx9_plat_devs; 1274 1275static int __init serial_txx9_init(void) 1276{ 1277 int ret; 1278 1279 printk(KERN_INFO "%s version %s\n", serial_name, serial_version); 1280 1281 ret = uart_register_driver(&serial_txx9_reg); 1282 if (ret) 1283 goto out; 1284 1285 serial_txx9_plat_devs = platform_device_alloc("serial_txx9", -1); 1286 if (!serial_txx9_plat_devs) { 1287 ret = -ENOMEM; 1288 goto unreg_uart_drv; 1289 } 1290 1291 ret = platform_device_add(serial_txx9_plat_devs); 1292 if (ret) 1293 goto put_dev; 1294 1295 serial_txx9_register_ports(&serial_txx9_reg, 1296 &serial_txx9_plat_devs->dev); 1297 1298 ret = platform_driver_register(&serial_txx9_plat_driver); 1299 if (ret) 1300 goto del_dev; 1301 1302#ifdef ENABLE_SERIAL_TXX9_PCI 1303 ret = pci_register_driver(&serial_txx9_pci_driver); 1304#endif 1305 if (ret == 0) 1306 goto out; 1307 1308 del_dev: 1309 platform_device_del(serial_txx9_plat_devs); 1310 put_dev: 1311 platform_device_put(serial_txx9_plat_devs); 1312 unreg_uart_drv: 1313 uart_unregister_driver(&serial_txx9_reg); 1314 out: 1315 return ret; 1316} 1317 1318static void __exit serial_txx9_exit(void) 1319{ 1320 int i; 1321 1322#ifdef ENABLE_SERIAL_TXX9_PCI 1323 pci_unregister_driver(&serial_txx9_pci_driver); 1324#endif 1325 platform_driver_unregister(&serial_txx9_plat_driver); 1326 platform_device_unregister(serial_txx9_plat_devs); 1327 for (i = 0; i < UART_NR; i++) { 1328 struct uart_txx9_port *up = &serial_txx9_ports[i]; 1329 if (up->port.iobase || up->port.mapbase) 1330 uart_remove_one_port(&serial_txx9_reg, &up->port); 1331 } 1332 1333 uart_unregister_driver(&serial_txx9_reg); 1334} 1335 1336module_init(serial_txx9_init); 1337module_exit(serial_txx9_exit); 1338 1339MODULE_LICENSE("GPL"); 1340MODULE_DESCRIPTION("TX39/49 serial driver"); 1341 1342MODULE_ALIAS_CHARDEV_MAJOR(TXX9_TTY_MAJOR); 1343