1/* 2 * NinjaSCSI-32Bi Cardbus, NinjaSCSI-32UDE PCI/CardBus SCSI driver 3 * Copyright (C) 2001, 2002, 2003 4 * YOKOTA Hiroshi <yokota@netlab.is.tsukuba.ac.jp> 5 * GOTO Masanori <gotom@debian.or.jp>, <gotom@debian.org> 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License as published by 9 * the Free Software Foundation; either version 2, or (at your option) 10 * any later version. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * GNU General Public License for more details. 16 * 17 * 18 * Revision History: 19 * 1.0: Initial Release. 20 * 1.1: Add /proc SDTR status. 21 * Remove obsolete error handler nsp32_reset. 22 * Some clean up. 23 * 1.2: PowerPC (big endian) support. 24 */ 25 26#include <linux/module.h> 27#include <linux/init.h> 28#include <linux/kernel.h> 29#include <linux/string.h> 30#include <linux/timer.h> 31#include <linux/ioport.h> 32#include <linux/major.h> 33#include <linux/blkdev.h> 34#include <linux/interrupt.h> 35#include <linux/pci.h> 36#include <linux/delay.h> 37#include <linux/ctype.h> 38#include <linux/dma-mapping.h> 39 40#include <asm/dma.h> 41#include <asm/system.h> 42#include <asm/io.h> 43 44#include <scsi/scsi.h> 45#include <scsi/scsi_cmnd.h> 46#include <scsi/scsi_device.h> 47#include <scsi/scsi_host.h> 48#include <scsi/scsi_ioctl.h> 49 50#include "nsp32.h" 51 52 53/*********************************************************************** 54 * Module parameters 55 */ 56static int trans_mode = 0; /* default: BIOS */ 57module_param (trans_mode, int, 0); 58MODULE_PARM_DESC(trans_mode, "transfer mode (0: BIOS(default) 1: Async 2: Ultra20M"); 59#define ASYNC_MODE 1 60#define ULTRA20M_MODE 2 61 62static int auto_param = 0; /* default: ON */ 63module_param (auto_param, bool, 0); 64MODULE_PARM_DESC(auto_param, "AutoParameter mode (0: ON(default) 1: OFF)"); 65 66static int disc_priv = 1; /* default: OFF */ 67module_param (disc_priv, bool, 0); 68MODULE_PARM_DESC(disc_priv, "disconnection privilege mode (0: ON 1: OFF(default))"); 69 70MODULE_AUTHOR("YOKOTA Hiroshi <yokota@netlab.is.tsukuba.ac.jp>, GOTO Masanori <gotom@debian.or.jp>"); 71MODULE_DESCRIPTION("Workbit NinjaSCSI-32Bi/UDE CardBus/PCI SCSI host bus adapter module"); 72MODULE_LICENSE("GPL"); 73 74static const char *nsp32_release_version = "1.2"; 75 76 77/**************************************************************************** 78 * Supported hardware 79 */ 80static struct pci_device_id nsp32_pci_table[] __devinitdata = { 81 { 82 .vendor = PCI_VENDOR_ID_IODATA, 83 .device = PCI_DEVICE_ID_NINJASCSI_32BI_CBSC_II, 84 .subvendor = PCI_ANY_ID, 85 .subdevice = PCI_ANY_ID, 86 .driver_data = MODEL_IODATA, 87 }, 88 { 89 .vendor = PCI_VENDOR_ID_WORKBIT, 90 .device = PCI_DEVICE_ID_NINJASCSI_32BI_KME, 91 .subvendor = PCI_ANY_ID, 92 .subdevice = PCI_ANY_ID, 93 .driver_data = MODEL_KME, 94 }, 95 { 96 .vendor = PCI_VENDOR_ID_WORKBIT, 97 .device = PCI_DEVICE_ID_NINJASCSI_32BI_WBT, 98 .subvendor = PCI_ANY_ID, 99 .subdevice = PCI_ANY_ID, 100 .driver_data = MODEL_WORKBIT, 101 }, 102 { 103 .vendor = PCI_VENDOR_ID_WORKBIT, 104 .device = PCI_DEVICE_ID_WORKBIT_STANDARD, 105 .subvendor = PCI_ANY_ID, 106 .subdevice = PCI_ANY_ID, 107 .driver_data = MODEL_PCI_WORKBIT, 108 }, 109 { 110 .vendor = PCI_VENDOR_ID_WORKBIT, 111 .device = PCI_DEVICE_ID_NINJASCSI_32BI_LOGITEC, 112 .subvendor = PCI_ANY_ID, 113 .subdevice = PCI_ANY_ID, 114 .driver_data = MODEL_LOGITEC, 115 }, 116 { 117 .vendor = PCI_VENDOR_ID_WORKBIT, 118 .device = PCI_DEVICE_ID_NINJASCSI_32BIB_LOGITEC, 119 .subvendor = PCI_ANY_ID, 120 .subdevice = PCI_ANY_ID, 121 .driver_data = MODEL_PCI_LOGITEC, 122 }, 123 { 124 .vendor = PCI_VENDOR_ID_WORKBIT, 125 .device = PCI_DEVICE_ID_NINJASCSI_32UDE_MELCO, 126 .subvendor = PCI_ANY_ID, 127 .subdevice = PCI_ANY_ID, 128 .driver_data = MODEL_PCI_MELCO, 129 }, 130 { 131 .vendor = PCI_VENDOR_ID_WORKBIT, 132 .device = PCI_DEVICE_ID_NINJASCSI_32UDE_MELCO_II, 133 .subvendor = PCI_ANY_ID, 134 .subdevice = PCI_ANY_ID, 135 .driver_data = MODEL_PCI_MELCO, 136 }, 137 {0,0,}, 138}; 139MODULE_DEVICE_TABLE(pci, nsp32_pci_table); 140 141static nsp32_hw_data nsp32_data_base; /* probe <-> detect glue */ 142 143 144/* 145 * Period/AckWidth speed conversion table 146 * 147 * Note: This period/ackwidth speed table must be in descending order. 148 */ 149static nsp32_sync_table nsp32_sync_table_40M[] = { 150 /* {PNo, AW, SP, EP, SREQ smpl} Speed(MB/s) Period AckWidth */ 151 {0x1, 0, 0x0c, 0x0c, SMPL_40M}, /* 20.0 : 50ns, 25ns */ 152 {0x2, 0, 0x0d, 0x18, SMPL_40M}, /* 13.3 : 75ns, 25ns */ 153 {0x3, 1, 0x19, 0x19, SMPL_40M}, /* 10.0 : 100ns, 50ns */ 154 {0x4, 1, 0x1a, 0x1f, SMPL_20M}, /* 8.0 : 125ns, 50ns */ 155 {0x5, 2, 0x20, 0x25, SMPL_20M}, /* 6.7 : 150ns, 75ns */ 156 {0x6, 2, 0x26, 0x31, SMPL_20M}, /* 5.7 : 175ns, 75ns */ 157 {0x7, 3, 0x32, 0x32, SMPL_20M}, /* 5.0 : 200ns, 100ns */ 158 {0x8, 3, 0x33, 0x38, SMPL_10M}, /* 4.4 : 225ns, 100ns */ 159 {0x9, 3, 0x39, 0x3e, SMPL_10M}, /* 4.0 : 250ns, 100ns */ 160}; 161 162static nsp32_sync_table nsp32_sync_table_20M[] = { 163 {0x1, 0, 0x19, 0x19, SMPL_40M}, /* 10.0 : 100ns, 50ns */ 164 {0x2, 0, 0x1a, 0x25, SMPL_20M}, /* 6.7 : 150ns, 50ns */ 165 {0x3, 1, 0x26, 0x32, SMPL_20M}, /* 5.0 : 200ns, 100ns */ 166 {0x4, 1, 0x33, 0x3e, SMPL_10M}, /* 4.0 : 250ns, 100ns */ 167 {0x5, 2, 0x3f, 0x4b, SMPL_10M}, /* 3.3 : 300ns, 150ns */ 168 {0x6, 2, 0x4c, 0x57, SMPL_10M}, /* 2.8 : 350ns, 150ns */ 169 {0x7, 3, 0x58, 0x64, SMPL_10M}, /* 2.5 : 400ns, 200ns */ 170 {0x8, 3, 0x65, 0x70, SMPL_10M}, /* 2.2 : 450ns, 200ns */ 171 {0x9, 3, 0x71, 0x7d, SMPL_10M}, /* 2.0 : 500ns, 200ns */ 172}; 173 174static nsp32_sync_table nsp32_sync_table_pci[] = { 175 {0x1, 0, 0x0c, 0x0f, SMPL_40M}, /* 16.6 : 60ns, 30ns */ 176 {0x2, 0, 0x10, 0x16, SMPL_40M}, /* 11.1 : 90ns, 30ns */ 177 {0x3, 1, 0x17, 0x1e, SMPL_20M}, /* 8.3 : 120ns, 60ns */ 178 {0x4, 1, 0x1f, 0x25, SMPL_20M}, /* 6.7 : 150ns, 60ns */ 179 {0x5, 2, 0x26, 0x2d, SMPL_20M}, /* 5.6 : 180ns, 90ns */ 180 {0x6, 2, 0x2e, 0x34, SMPL_10M}, /* 4.8 : 210ns, 90ns */ 181 {0x7, 3, 0x35, 0x3c, SMPL_10M}, /* 4.2 : 240ns, 120ns */ 182 {0x8, 3, 0x3d, 0x43, SMPL_10M}, /* 3.7 : 270ns, 120ns */ 183 {0x9, 3, 0x44, 0x4b, SMPL_10M}, /* 3.3 : 300ns, 120ns */ 184}; 185 186/* 187 * function declaration 188 */ 189/* module entry point */ 190static int __devinit nsp32_probe (struct pci_dev *, const struct pci_device_id *); 191static void __devexit nsp32_remove(struct pci_dev *); 192static int __init init_nsp32 (void); 193static void __exit exit_nsp32 (void); 194 195/* struct struct scsi_host_template */ 196static int nsp32_proc_info (struct Scsi_Host *, char *, char **, off_t, int, int); 197 198static int nsp32_detect (struct pci_dev *pdev); 199static int nsp32_queuecommand(struct scsi_cmnd *, 200 void (*done)(struct scsi_cmnd *)); 201static const char *nsp32_info (struct Scsi_Host *); 202static int nsp32_release (struct Scsi_Host *); 203 204/* SCSI error handler */ 205static int nsp32_eh_abort (struct scsi_cmnd *); 206static int nsp32_eh_bus_reset (struct scsi_cmnd *); 207static int nsp32_eh_host_reset(struct scsi_cmnd *); 208 209/* generate SCSI message */ 210static void nsp32_build_identify(struct scsi_cmnd *); 211static void nsp32_build_nop (struct scsi_cmnd *); 212static void nsp32_build_reject (struct scsi_cmnd *); 213static void nsp32_build_sdtr (struct scsi_cmnd *, unsigned char, unsigned char); 214 215/* SCSI message handler */ 216static int nsp32_busfree_occur(struct scsi_cmnd *, unsigned short); 217static void nsp32_msgout_occur (struct scsi_cmnd *); 218static void nsp32_msgin_occur (struct scsi_cmnd *, unsigned long, unsigned short); 219 220static int nsp32_setup_sg_table (struct scsi_cmnd *); 221static int nsp32_selection_autopara(struct scsi_cmnd *); 222static int nsp32_selection_autoscsi(struct scsi_cmnd *); 223static void nsp32_scsi_done (struct scsi_cmnd *); 224static int nsp32_arbitration (struct scsi_cmnd *, unsigned int); 225static int nsp32_reselection (struct scsi_cmnd *, unsigned char); 226static void nsp32_adjust_busfree (struct scsi_cmnd *, unsigned int); 227static void nsp32_restart_autoscsi (struct scsi_cmnd *, unsigned short); 228 229/* SCSI SDTR */ 230static void nsp32_analyze_sdtr (struct scsi_cmnd *); 231static int nsp32_search_period_entry(nsp32_hw_data *, nsp32_target *, unsigned char); 232static void nsp32_set_async (nsp32_hw_data *, nsp32_target *); 233static void nsp32_set_max_sync (nsp32_hw_data *, nsp32_target *, unsigned char *, unsigned char *); 234static void nsp32_set_sync_entry (nsp32_hw_data *, nsp32_target *, int, unsigned char); 235 236/* SCSI bus status handler */ 237static void nsp32_wait_req (nsp32_hw_data *, int); 238static void nsp32_wait_sack (nsp32_hw_data *, int); 239static void nsp32_sack_assert (nsp32_hw_data *); 240static void nsp32_sack_negate (nsp32_hw_data *); 241static void nsp32_do_bus_reset(nsp32_hw_data *); 242 243/* hardware interrupt handler */ 244static irqreturn_t do_nsp32_isr(int, void *); 245 246/* initialize hardware */ 247static int nsp32hw_init(nsp32_hw_data *); 248 249/* EEPROM handler */ 250static int nsp32_getprom_param (nsp32_hw_data *); 251static int nsp32_getprom_at24 (nsp32_hw_data *); 252static int nsp32_getprom_c16 (nsp32_hw_data *); 253static void nsp32_prom_start (nsp32_hw_data *); 254static void nsp32_prom_stop (nsp32_hw_data *); 255static int nsp32_prom_read (nsp32_hw_data *, int); 256static int nsp32_prom_read_bit (nsp32_hw_data *); 257static void nsp32_prom_write_bit(nsp32_hw_data *, int); 258static void nsp32_prom_set (nsp32_hw_data *, int, int); 259static int nsp32_prom_get (nsp32_hw_data *, int); 260 261/* debug/warning/info message */ 262static void nsp32_message (const char *, int, char *, char *, ...); 263#ifdef NSP32_DEBUG 264static void nsp32_dmessage(const char *, int, int, char *, ...); 265#endif 266 267/* 268 * max_sectors is currently limited up to 128. 269 */ 270static struct scsi_host_template nsp32_template = { 271 .proc_name = "nsp32", 272 .name = "Workbit NinjaSCSI-32Bi/UDE", 273 .proc_info = nsp32_proc_info, 274 .info = nsp32_info, 275 .queuecommand = nsp32_queuecommand, 276 .can_queue = 1, 277 .sg_tablesize = NSP32_SG_SIZE, 278 .max_sectors = 128, 279 .cmd_per_lun = 1, 280 .this_id = NSP32_HOST_SCSIID, 281 .use_clustering = DISABLE_CLUSTERING, 282 .eh_abort_handler = nsp32_eh_abort, 283 .eh_bus_reset_handler = nsp32_eh_bus_reset, 284 .eh_host_reset_handler = nsp32_eh_host_reset, 285/* .highmem_io = 1, */ 286}; 287 288#include "nsp32_io.h" 289 290/*********************************************************************** 291 * debug, error print 292 */ 293#ifndef NSP32_DEBUG 294# define NSP32_DEBUG_MASK 0x000000 295# define nsp32_msg(type, args...) nsp32_message ("", 0, (type), args) 296# define nsp32_dbg(mask, args...) /* */ 297#else 298# define NSP32_DEBUG_MASK 0xffffff 299# define nsp32_msg(type, args...) \ 300 nsp32_message (__func__, __LINE__, (type), args) 301# define nsp32_dbg(mask, args...) \ 302 nsp32_dmessage(__func__, __LINE__, (mask), args) 303#endif 304 305#define NSP32_DEBUG_QUEUECOMMAND BIT(0) 306#define NSP32_DEBUG_REGISTER BIT(1) 307#define NSP32_DEBUG_AUTOSCSI BIT(2) 308#define NSP32_DEBUG_INTR BIT(3) 309#define NSP32_DEBUG_SGLIST BIT(4) 310#define NSP32_DEBUG_BUSFREE BIT(5) 311#define NSP32_DEBUG_CDB_CONTENTS BIT(6) 312#define NSP32_DEBUG_RESELECTION BIT(7) 313#define NSP32_DEBUG_MSGINOCCUR BIT(8) 314#define NSP32_DEBUG_EEPROM BIT(9) 315#define NSP32_DEBUG_MSGOUTOCCUR BIT(10) 316#define NSP32_DEBUG_BUSRESET BIT(11) 317#define NSP32_DEBUG_RESTART BIT(12) 318#define NSP32_DEBUG_SYNC BIT(13) 319#define NSP32_DEBUG_WAIT BIT(14) 320#define NSP32_DEBUG_TARGETFLAG BIT(15) 321#define NSP32_DEBUG_PROC BIT(16) 322#define NSP32_DEBUG_INIT BIT(17) 323#define NSP32_SPECIAL_PRINT_REGISTER BIT(20) 324 325#define NSP32_DEBUG_BUF_LEN 100 326 327static void nsp32_message(const char *func, int line, char *type, char *fmt, ...) 328{ 329 va_list args; 330 char buf[NSP32_DEBUG_BUF_LEN]; 331 332 va_start(args, fmt); 333 vsnprintf(buf, sizeof(buf), fmt, args); 334 va_end(args); 335 336#ifndef NSP32_DEBUG 337 printk("%snsp32: %s\n", type, buf); 338#else 339 printk("%snsp32: %s (%d): %s\n", type, func, line, buf); 340#endif 341} 342 343#ifdef NSP32_DEBUG 344static void nsp32_dmessage(const char *func, int line, int mask, char *fmt, ...) 345{ 346 va_list args; 347 char buf[NSP32_DEBUG_BUF_LEN]; 348 349 va_start(args, fmt); 350 vsnprintf(buf, sizeof(buf), fmt, args); 351 va_end(args); 352 353 if (mask & NSP32_DEBUG_MASK) { 354 printk("nsp32-debug: 0x%x %s (%d): %s\n", mask, func, line, buf); 355 } 356} 357#endif 358 359#ifdef NSP32_DEBUG 360# include "nsp32_debug.c" 361#else 362# define show_command(arg) /* */ 363# define show_busphase(arg) /* */ 364# define show_autophase(arg) /* */ 365#endif 366 367/* 368 * IDENTIFY Message 369 */ 370static void nsp32_build_identify(struct scsi_cmnd *SCpnt) 371{ 372 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata; 373 int pos = data->msgout_len; 374 int mode = FALSE; 375 376 if (disc_priv == 0) { 377 /* mode = TRUE; */ 378 } 379 380 data->msgoutbuf[pos] = IDENTIFY(mode, SCpnt->device->lun); pos++; 381 382 data->msgout_len = pos; 383} 384 385/* 386 * SDTR Message Routine 387 */ 388static void nsp32_build_sdtr(struct scsi_cmnd *SCpnt, 389 unsigned char period, 390 unsigned char offset) 391{ 392 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata; 393 int pos = data->msgout_len; 394 395 data->msgoutbuf[pos] = EXTENDED_MESSAGE; pos++; 396 data->msgoutbuf[pos] = EXTENDED_SDTR_LEN; pos++; 397 data->msgoutbuf[pos] = EXTENDED_SDTR; pos++; 398 data->msgoutbuf[pos] = period; pos++; 399 data->msgoutbuf[pos] = offset; pos++; 400 401 data->msgout_len = pos; 402} 403 404/* 405 * No Operation Message 406 */ 407static void nsp32_build_nop(struct scsi_cmnd *SCpnt) 408{ 409 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata; 410 int pos = data->msgout_len; 411 412 if (pos != 0) { 413 nsp32_msg(KERN_WARNING, 414 "Some messages are already contained!"); 415 return; 416 } 417 418 data->msgoutbuf[pos] = NOP; pos++; 419 data->msgout_len = pos; 420} 421 422/* 423 * Reject Message 424 */ 425static void nsp32_build_reject(struct scsi_cmnd *SCpnt) 426{ 427 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata; 428 int pos = data->msgout_len; 429 430 data->msgoutbuf[pos] = MESSAGE_REJECT; pos++; 431 data->msgout_len = pos; 432} 433 434/* 435 * timer 436 */ 437 438 439/* 440 * set SCSI command and other parameter to asic, and start selection phase 441 */ 442static int nsp32_selection_autopara(struct scsi_cmnd *SCpnt) 443{ 444 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata; 445 unsigned int base = SCpnt->device->host->io_port; 446 unsigned int host_id = SCpnt->device->host->this_id; 447 unsigned char target = scmd_id(SCpnt); 448 nsp32_autoparam *param = data->autoparam; 449 unsigned char phase; 450 int i, ret; 451 unsigned int msgout; 452 u16_le s; 453 454 nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "in"); 455 456 /* 457 * check bus free 458 */ 459 phase = nsp32_read1(base, SCSI_BUS_MONITOR); 460 if (phase != BUSMON_BUS_FREE) { 461 nsp32_msg(KERN_WARNING, "bus busy"); 462 show_busphase(phase & BUSMON_PHASE_MASK); 463 SCpnt->result = DID_BUS_BUSY << 16; 464 return FALSE; 465 } 466 467 /* 468 * message out 469 * 470 * Note: If the range of msgout_len is 1 - 3, fill scsi_msgout. 471 * over 3 messages needs another routine. 472 */ 473 if (data->msgout_len == 0) { 474 nsp32_msg(KERN_ERR, "SCSI MsgOut without any message!"); 475 SCpnt->result = DID_ERROR << 16; 476 return FALSE; 477 } else if (data->msgout_len > 0 && data->msgout_len <= 3) { 478 msgout = 0; 479 for (i = 0; i < data->msgout_len; i++) { 480 /* 481 * the sending order of the message is: 482 * MCNT 3: MSG#0 -> MSG#1 -> MSG#2 483 * MCNT 2: MSG#1 -> MSG#2 484 * MCNT 1: MSG#2 485 */ 486 msgout >>= 8; 487 msgout |= ((unsigned int)(data->msgoutbuf[i]) << 24); 488 } 489 msgout |= MV_VALID; /* MV valid */ 490 msgout |= (unsigned int)data->msgout_len; /* len */ 491 } else { 492 /* data->msgout_len > 3 */ 493 msgout = 0; 494 } 495 496 // nsp_dbg(NSP32_DEBUG_AUTOSCSI, "sel time out=0x%x\n", nsp32_read2(base, SEL_TIME_OUT)); 497 // nsp32_write2(base, SEL_TIME_OUT, SEL_TIMEOUT_TIME); 498 499 /* 500 * setup asic parameter 501 */ 502 memset(param, 0, sizeof(nsp32_autoparam)); 503 504 /* cdb */ 505 for (i = 0; i < SCpnt->cmd_len; i++) { 506 param->cdb[4 * i] = SCpnt->cmnd[i]; 507 } 508 509 /* outgoing messages */ 510 param->msgout = cpu_to_le32(msgout); 511 512 /* syncreg, ackwidth, target id, SREQ sampling rate */ 513 param->syncreg = data->cur_target->syncreg; 514 param->ackwidth = data->cur_target->ackwidth; 515 param->target_id = BIT(host_id) | BIT(target); 516 param->sample_reg = data->cur_target->sample_reg; 517 518 // nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "sample rate=0x%x\n", data->cur_target->sample_reg); 519 520 /* command control */ 521 param->command_control = cpu_to_le16(CLEAR_CDB_FIFO_POINTER | 522 AUTOSCSI_START | 523 AUTO_MSGIN_00_OR_04 | 524 AUTO_MSGIN_02 | 525 AUTO_ATN ); 526 527 528 /* transfer control */ 529 s = 0; 530 switch (data->trans_method) { 531 case NSP32_TRANSFER_BUSMASTER: 532 s |= BM_START; 533 break; 534 case NSP32_TRANSFER_MMIO: 535 s |= CB_MMIO_MODE; 536 break; 537 case NSP32_TRANSFER_PIO: 538 s |= CB_IO_MODE; 539 break; 540 default: 541 nsp32_msg(KERN_ERR, "unknown trans_method"); 542 break; 543 } 544 /* 545 * OR-ed BLIEND_MODE, FIFO intr is decreased, instead of PCI bus waits. 546 * For bus master transfer, it's taken off. 547 */ 548 s |= (TRANSFER_GO | ALL_COUNTER_CLR); 549 param->transfer_control = cpu_to_le16(s); 550 551 /* sg table addr */ 552 param->sgt_pointer = cpu_to_le32(data->cur_lunt->sglun_paddr); 553 554 /* 555 * transfer parameter to ASIC 556 */ 557 nsp32_write4(base, SGT_ADR, data->auto_paddr); 558 nsp32_write2(base, COMMAND_CONTROL, CLEAR_CDB_FIFO_POINTER | 559 AUTO_PARAMETER ); 560 561 /* 562 * Check arbitration 563 */ 564 ret = nsp32_arbitration(SCpnt, base); 565 566 return ret; 567} 568 569 570/* 571 * Selection with AUTO SCSI (without AUTO PARAMETER) 572 */ 573static int nsp32_selection_autoscsi(struct scsi_cmnd *SCpnt) 574{ 575 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata; 576 unsigned int base = SCpnt->device->host->io_port; 577 unsigned int host_id = SCpnt->device->host->this_id; 578 unsigned char target = scmd_id(SCpnt); 579 unsigned char phase; 580 int status; 581 unsigned short command = 0; 582 unsigned int msgout = 0; 583 unsigned short execph; 584 int i; 585 586 nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "in"); 587 588 /* 589 * IRQ disable 590 */ 591 nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK); 592 593 /* 594 * check bus line 595 */ 596 phase = nsp32_read1(base, SCSI_BUS_MONITOR); 597 if(((phase & BUSMON_BSY) == 1) || (phase & BUSMON_SEL) == 1) { 598 nsp32_msg(KERN_WARNING, "bus busy"); 599 SCpnt->result = DID_BUS_BUSY << 16; 600 status = 1; 601 goto out; 602 } 603 604 /* 605 * clear execph 606 */ 607 execph = nsp32_read2(base, SCSI_EXECUTE_PHASE); 608 609 /* 610 * clear FIFO counter to set CDBs 611 */ 612 nsp32_write2(base, COMMAND_CONTROL, CLEAR_CDB_FIFO_POINTER); 613 614 /* 615 * set CDB0 - CDB15 616 */ 617 for (i = 0; i < SCpnt->cmd_len; i++) { 618 nsp32_write1(base, COMMAND_DATA, SCpnt->cmnd[i]); 619 } 620 nsp32_dbg(NSP32_DEBUG_CDB_CONTENTS, "CDB[0]=[0x%x]", SCpnt->cmnd[0]); 621 622 /* 623 * set SCSIOUT LATCH(initiator)/TARGET(target) (OR-ed) ID 624 */ 625 nsp32_write1(base, SCSI_OUT_LATCH_TARGET_ID, BIT(host_id) | BIT(target)); 626 627 /* 628 * set SCSI MSGOUT REG 629 * 630 * Note: If the range of msgout_len is 1 - 3, fill scsi_msgout. 631 * over 3 messages needs another routine. 632 */ 633 if (data->msgout_len == 0) { 634 nsp32_msg(KERN_ERR, "SCSI MsgOut without any message!"); 635 SCpnt->result = DID_ERROR << 16; 636 status = 1; 637 goto out; 638 } else if (data->msgout_len > 0 && data->msgout_len <= 3) { 639 msgout = 0; 640 for (i = 0; i < data->msgout_len; i++) { 641 /* 642 * the sending order of the message is: 643 * MCNT 3: MSG#0 -> MSG#1 -> MSG#2 644 * MCNT 2: MSG#1 -> MSG#2 645 * MCNT 1: MSG#2 646 */ 647 msgout >>= 8; 648 msgout |= ((unsigned int)(data->msgoutbuf[i]) << 24); 649 } 650 msgout |= MV_VALID; /* MV valid */ 651 msgout |= (unsigned int)data->msgout_len; /* len */ 652 nsp32_write4(base, SCSI_MSG_OUT, msgout); 653 } else { 654 /* data->msgout_len > 3 */ 655 nsp32_write4(base, SCSI_MSG_OUT, 0); 656 } 657 658 /* 659 * set selection timeout(= 250ms) 660 */ 661 nsp32_write2(base, SEL_TIME_OUT, SEL_TIMEOUT_TIME); 662 663 /* 664 * set SREQ hazard killer sampling rate 665 * 666 * TODO: sample_rate (BASE+0F) is 0 when internal clock = 40MHz. 667 * check other internal clock! 668 */ 669 nsp32_write1(base, SREQ_SMPL_RATE, data->cur_target->sample_reg); 670 671 /* 672 * clear Arbit 673 */ 674 nsp32_write1(base, SET_ARBIT, ARBIT_CLEAR); 675 676 /* 677 * set SYNCREG 678 * Don't set BM_START_ADR before setting this register. 679 */ 680 nsp32_write1(base, SYNC_REG, data->cur_target->syncreg); 681 682 /* 683 * set ACKWIDTH 684 */ 685 nsp32_write1(base, ACK_WIDTH, data->cur_target->ackwidth); 686 687 nsp32_dbg(NSP32_DEBUG_AUTOSCSI, 688 "syncreg=0x%x, ackwidth=0x%x, sgtpaddr=0x%x, id=0x%x", 689 nsp32_read1(base, SYNC_REG), nsp32_read1(base, ACK_WIDTH), 690 nsp32_read4(base, SGT_ADR), nsp32_read1(base, SCSI_OUT_LATCH_TARGET_ID)); 691 nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "msgout_len=%d, msgout=0x%x", 692 data->msgout_len, msgout); 693 694 /* 695 * set SGT ADDR (physical address) 696 */ 697 nsp32_write4(base, SGT_ADR, data->cur_lunt->sglun_paddr); 698 699 /* 700 * set TRANSFER CONTROL REG 701 */ 702 command = 0; 703 command |= (TRANSFER_GO | ALL_COUNTER_CLR); 704 if (data->trans_method & NSP32_TRANSFER_BUSMASTER) { 705 if (scsi_bufflen(SCpnt) > 0) { 706 command |= BM_START; 707 } 708 } else if (data->trans_method & NSP32_TRANSFER_MMIO) { 709 command |= CB_MMIO_MODE; 710 } else if (data->trans_method & NSP32_TRANSFER_PIO) { 711 command |= CB_IO_MODE; 712 } 713 nsp32_write2(base, TRANSFER_CONTROL, command); 714 715 /* 716 * start AUTO SCSI, kick off arbitration 717 */ 718 command = (CLEAR_CDB_FIFO_POINTER | 719 AUTOSCSI_START | 720 AUTO_MSGIN_00_OR_04 | 721 AUTO_MSGIN_02 | 722 AUTO_ATN ); 723 nsp32_write2(base, COMMAND_CONTROL, command); 724 725 /* 726 * Check arbitration 727 */ 728 status = nsp32_arbitration(SCpnt, base); 729 730 out: 731 /* 732 * IRQ enable 733 */ 734 nsp32_write2(base, IRQ_CONTROL, 0); 735 736 return status; 737} 738 739 740/* 741 * Arbitration Status Check 742 * 743 * Note: Arbitration counter is waited during ARBIT_GO is not lifting. 744 * Using udelay(1) consumes CPU time and system time, but 745 * arbitration delay time is defined minimal 2.4us in SCSI 746 * specification, thus udelay works as coarse grained wait timer. 747 */ 748static int nsp32_arbitration(struct scsi_cmnd *SCpnt, unsigned int base) 749{ 750 unsigned char arbit; 751 int status = TRUE; 752 int time = 0; 753 754 do { 755 arbit = nsp32_read1(base, ARBIT_STATUS); 756 time++; 757 } while ((arbit & (ARBIT_WIN | ARBIT_FAIL)) == 0 && 758 (time <= ARBIT_TIMEOUT_TIME)); 759 760 nsp32_dbg(NSP32_DEBUG_AUTOSCSI, 761 "arbit: 0x%x, delay time: %d", arbit, time); 762 763 if (arbit & ARBIT_WIN) { 764 /* Arbitration succeeded */ 765 SCpnt->result = DID_OK << 16; 766 nsp32_index_write1(base, EXT_PORT, LED_ON); /* PCI LED on */ 767 } else if (arbit & ARBIT_FAIL) { 768 /* Arbitration failed */ 769 SCpnt->result = DID_BUS_BUSY << 16; 770 status = FALSE; 771 } else { 772 /* 773 * unknown error or ARBIT_GO timeout, 774 * something lock up! guess no connection. 775 */ 776 nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "arbit timeout"); 777 SCpnt->result = DID_NO_CONNECT << 16; 778 status = FALSE; 779 } 780 781 /* 782 * clear Arbit 783 */ 784 nsp32_write1(base, SET_ARBIT, ARBIT_CLEAR); 785 786 return status; 787} 788 789 790/* 791 * reselection 792 * 793 * Note: This reselection routine is called from msgin_occur, 794 * reselection target id&lun must be already set. 795 * SCSI-2 says IDENTIFY implies RESTORE_POINTER operation. 796 */ 797static int nsp32_reselection(struct scsi_cmnd *SCpnt, unsigned char newlun) 798{ 799 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata; 800 unsigned int host_id = SCpnt->device->host->this_id; 801 unsigned int base = SCpnt->device->host->io_port; 802 unsigned char tmpid, newid; 803 804 nsp32_dbg(NSP32_DEBUG_RESELECTION, "enter"); 805 806 /* 807 * calculate reselected SCSI ID 808 */ 809 tmpid = nsp32_read1(base, RESELECT_ID); 810 tmpid &= (~BIT(host_id)); 811 newid = 0; 812 while (tmpid) { 813 if (tmpid & 1) { 814 break; 815 } 816 tmpid >>= 1; 817 newid++; 818 } 819 820 /* 821 * If reselected New ID:LUN is not existed 822 * or current nexus is not existed, unexpected 823 * reselection is occurred. Send reject message. 824 */ 825 if (newid >= ARRAY_SIZE(data->lunt) || newlun >= ARRAY_SIZE(data->lunt[0])) { 826 nsp32_msg(KERN_WARNING, "unknown id/lun"); 827 return FALSE; 828 } else if(data->lunt[newid][newlun].SCpnt == NULL) { 829 nsp32_msg(KERN_WARNING, "no SCSI command is processing"); 830 return FALSE; 831 } 832 833 data->cur_id = newid; 834 data->cur_lun = newlun; 835 data->cur_target = &(data->target[newid]); 836 data->cur_lunt = &(data->lunt[newid][newlun]); 837 838 /* reset SACK/SavedACK counter (or ALL clear?) */ 839 nsp32_write4(base, CLR_COUNTER, CLRCOUNTER_ALLMASK); 840 841 return TRUE; 842} 843 844 845/* 846 * nsp32_setup_sg_table - build scatter gather list for transfer data 847 * with bus master. 848 * 849 * Note: NinjaSCSI-32Bi/UDE bus master can not transfer over 64KB at a time. 850 */ 851static int nsp32_setup_sg_table(struct scsi_cmnd *SCpnt) 852{ 853 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata; 854 struct scatterlist *sg; 855 nsp32_sgtable *sgt = data->cur_lunt->sglun->sgt; 856 int num, i; 857 u32_le l; 858 859 if (sgt == NULL) { 860 nsp32_dbg(NSP32_DEBUG_SGLIST, "SGT == null"); 861 return FALSE; 862 } 863 864 num = scsi_dma_map(SCpnt); 865 if (!num) 866 return TRUE; 867 else if (num < 0) 868 return FALSE; 869 else { 870 scsi_for_each_sg(SCpnt, sg, num, i) { 871 /* 872 * Build nsp32_sglist, substitute sg dma addresses. 873 */ 874 sgt[i].addr = cpu_to_le32(sg_dma_address(sg)); 875 sgt[i].len = cpu_to_le32(sg_dma_len(sg)); 876 877 if (le32_to_cpu(sgt[i].len) > 0x10000) { 878 nsp32_msg(KERN_ERR, 879 "can't transfer over 64KB at a time, size=0x%lx", le32_to_cpu(sgt[i].len)); 880 return FALSE; 881 } 882 nsp32_dbg(NSP32_DEBUG_SGLIST, 883 "num 0x%x : addr 0x%lx len 0x%lx", 884 i, 885 le32_to_cpu(sgt[i].addr), 886 le32_to_cpu(sgt[i].len )); 887 } 888 889 /* set end mark */ 890 l = le32_to_cpu(sgt[num-1].len); 891 sgt[num-1].len = cpu_to_le32(l | SGTEND); 892 } 893 894 return TRUE; 895} 896 897static int nsp32_queuecommand(struct scsi_cmnd *SCpnt, void (*done)(struct scsi_cmnd *)) 898{ 899 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata; 900 nsp32_target *target; 901 nsp32_lunt *cur_lunt; 902 int ret; 903 904 nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND, 905 "enter. target: 0x%x LUN: 0x%x cmnd: 0x%x cmndlen: 0x%x " 906 "use_sg: 0x%x reqbuf: 0x%lx reqlen: 0x%x", 907 SCpnt->device->id, SCpnt->device->lun, SCpnt->cmnd[0], SCpnt->cmd_len, 908 scsi_sg_count(SCpnt), scsi_sglist(SCpnt), scsi_bufflen(SCpnt)); 909 910 if (data->CurrentSC != NULL) { 911 nsp32_msg(KERN_ERR, "Currentsc != NULL. Cancel this command request"); 912 data->CurrentSC = NULL; 913 SCpnt->result = DID_NO_CONNECT << 16; 914 done(SCpnt); 915 return 0; 916 } 917 918 /* check target ID is not same as this initiator ID */ 919 if (scmd_id(SCpnt) == SCpnt->device->host->this_id) { 920 nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND, "terget==host???"); 921 SCpnt->result = DID_BAD_TARGET << 16; 922 done(SCpnt); 923 return 0; 924 } 925 926 /* check target LUN is allowable value */ 927 if (SCpnt->device->lun >= MAX_LUN) { 928 nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND, "no more lun"); 929 SCpnt->result = DID_BAD_TARGET << 16; 930 done(SCpnt); 931 return 0; 932 } 933 934 show_command(SCpnt); 935 936 SCpnt->scsi_done = done; 937 data->CurrentSC = SCpnt; 938 SCpnt->SCp.Status = CHECK_CONDITION; 939 SCpnt->SCp.Message = 0; 940 scsi_set_resid(SCpnt, scsi_bufflen(SCpnt)); 941 942 SCpnt->SCp.ptr = (char *)scsi_sglist(SCpnt); 943 SCpnt->SCp.this_residual = scsi_bufflen(SCpnt); 944 SCpnt->SCp.buffer = NULL; 945 SCpnt->SCp.buffers_residual = 0; 946 947 /* initialize data */ 948 data->msgout_len = 0; 949 data->msgin_len = 0; 950 cur_lunt = &(data->lunt[SCpnt->device->id][SCpnt->device->lun]); 951 cur_lunt->SCpnt = SCpnt; 952 cur_lunt->save_datp = 0; 953 cur_lunt->msgin03 = FALSE; 954 data->cur_lunt = cur_lunt; 955 data->cur_id = SCpnt->device->id; 956 data->cur_lun = SCpnt->device->lun; 957 958 ret = nsp32_setup_sg_table(SCpnt); 959 if (ret == FALSE) { 960 nsp32_msg(KERN_ERR, "SGT fail"); 961 SCpnt->result = DID_ERROR << 16; 962 nsp32_scsi_done(SCpnt); 963 return 0; 964 } 965 966 /* Build IDENTIFY */ 967 nsp32_build_identify(SCpnt); 968 969 /* 970 * If target is the first time to transfer after the reset 971 * (target don't have SDTR_DONE and SDTR_INITIATOR), sync 972 * message SDTR is needed to do synchronous transfer. 973 */ 974 target = &data->target[scmd_id(SCpnt)]; 975 data->cur_target = target; 976 977 if (!(target->sync_flag & (SDTR_DONE | SDTR_INITIATOR | SDTR_TARGET))) { 978 unsigned char period, offset; 979 980 if (trans_mode != ASYNC_MODE) { 981 nsp32_set_max_sync(data, target, &period, &offset); 982 nsp32_build_sdtr(SCpnt, period, offset); 983 target->sync_flag |= SDTR_INITIATOR; 984 } else { 985 nsp32_set_async(data, target); 986 target->sync_flag |= SDTR_DONE; 987 } 988 989 nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND, 990 "SDTR: entry: %d start_period: 0x%x offset: 0x%x\n", 991 target->limit_entry, period, offset); 992 } else if (target->sync_flag & SDTR_INITIATOR) { 993 /* 994 * It was negotiating SDTR with target, sending from the 995 * initiator, but there are no chance to remove this flag. 996 * Set async because we don't get proper negotiation. 997 */ 998 nsp32_set_async(data, target); 999 target->sync_flag &= ~SDTR_INITIATOR; 1000 target->sync_flag |= SDTR_DONE; 1001 1002 nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND, 1003 "SDTR_INITIATOR: fall back to async"); 1004 } else if (target->sync_flag & SDTR_TARGET) { 1005 /* 1006 * It was negotiating SDTR with target, sending from target, 1007 * but there are no chance to remove this flag. Set async 1008 * because we don't get proper negotiation. 1009 */ 1010 nsp32_set_async(data, target); 1011 target->sync_flag &= ~SDTR_TARGET; 1012 target->sync_flag |= SDTR_DONE; 1013 1014 nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND, 1015 "Unknown SDTR from target is reached, fall back to async."); 1016 } 1017 1018 nsp32_dbg(NSP32_DEBUG_TARGETFLAG, 1019 "target: %d sync_flag: 0x%x syncreg: 0x%x ackwidth: 0x%x", 1020 SCpnt->device->id, target->sync_flag, target->syncreg, 1021 target->ackwidth); 1022 1023 /* Selection */ 1024 if (auto_param == 0) { 1025 ret = nsp32_selection_autopara(SCpnt); 1026 } else { 1027 ret = nsp32_selection_autoscsi(SCpnt); 1028 } 1029 1030 if (ret != TRUE) { 1031 nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND, "selection fail"); 1032 nsp32_scsi_done(SCpnt); 1033 } 1034 1035 return 0; 1036} 1037 1038/* initialize asic */ 1039static int nsp32hw_init(nsp32_hw_data *data) 1040{ 1041 unsigned int base = data->BaseAddress; 1042 unsigned short irq_stat; 1043 unsigned long lc_reg; 1044 unsigned char power; 1045 1046 lc_reg = nsp32_index_read4(base, CFG_LATE_CACHE); 1047 if ((lc_reg & 0xff00) == 0) { 1048 lc_reg |= (0x20 << 8); 1049 nsp32_index_write2(base, CFG_LATE_CACHE, lc_reg & 0xffff); 1050 } 1051 1052 nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK); 1053 nsp32_write2(base, TRANSFER_CONTROL, 0); 1054 nsp32_write4(base, BM_CNT, 0); 1055 nsp32_write2(base, SCSI_EXECUTE_PHASE, 0); 1056 1057 do { 1058 irq_stat = nsp32_read2(base, IRQ_STATUS); 1059 nsp32_dbg(NSP32_DEBUG_INIT, "irq_stat 0x%x", irq_stat); 1060 } while (irq_stat & IRQSTATUS_ANY_IRQ); 1061 1062 /* 1063 * Fill FIFO_FULL_SHLD, FIFO_EMPTY_SHLD. Below parameter is 1064 * designated by specification. 1065 */ 1066 if ((data->trans_method & NSP32_TRANSFER_PIO) || 1067 (data->trans_method & NSP32_TRANSFER_MMIO)) { 1068 nsp32_index_write1(base, FIFO_FULL_SHLD_COUNT, 0x40); 1069 nsp32_index_write1(base, FIFO_EMPTY_SHLD_COUNT, 0x40); 1070 } else if (data->trans_method & NSP32_TRANSFER_BUSMASTER) { 1071 nsp32_index_write1(base, FIFO_FULL_SHLD_COUNT, 0x10); 1072 nsp32_index_write1(base, FIFO_EMPTY_SHLD_COUNT, 0x60); 1073 } else { 1074 nsp32_dbg(NSP32_DEBUG_INIT, "unknown transfer mode"); 1075 } 1076 1077 nsp32_dbg(NSP32_DEBUG_INIT, "full 0x%x emp 0x%x", 1078 nsp32_index_read1(base, FIFO_FULL_SHLD_COUNT), 1079 nsp32_index_read1(base, FIFO_EMPTY_SHLD_COUNT)); 1080 1081 nsp32_index_write1(base, CLOCK_DIV, data->clock); 1082 nsp32_index_write1(base, BM_CYCLE, MEMRD_CMD1 | SGT_AUTO_PARA_MEMED_CMD); 1083 nsp32_write1(base, PARITY_CONTROL, 0); /* parity check is disable */ 1084 1085 /* 1086 * initialize MISC_WRRD register 1087 * 1088 * Note: Designated parameters is obeyed as following: 1089 * MISC_SCSI_DIRECTION_DETECTOR_SELECT: It must be set. 1090 * MISC_MASTER_TERMINATION_SELECT: It must be set. 1091 * MISC_BMREQ_NEGATE_TIMING_SEL: It should be set. 1092 * MISC_AUTOSEL_TIMING_SEL: It should be set. 1093 * MISC_BMSTOP_CHANGE2_NONDATA_PHASE: It should be set. 1094 * MISC_DELAYED_BMSTART: It's selected for safety. 1095 * 1096 * Note: If MISC_BMSTOP_CHANGE2_NONDATA_PHASE is set, then 1097 * we have to set TRANSFERCONTROL_BM_START as 0 and set 1098 * appropriate value before restarting bus master transfer. 1099 */ 1100 nsp32_index_write2(base, MISC_WR, 1101 (SCSI_DIRECTION_DETECTOR_SELECT | 1102 DELAYED_BMSTART | 1103 MASTER_TERMINATION_SELECT | 1104 BMREQ_NEGATE_TIMING_SEL | 1105 AUTOSEL_TIMING_SEL | 1106 BMSTOP_CHANGE2_NONDATA_PHASE)); 1107 1108 nsp32_index_write1(base, TERM_PWR_CONTROL, 0); 1109 power = nsp32_index_read1(base, TERM_PWR_CONTROL); 1110 if (!(power & SENSE)) { 1111 nsp32_msg(KERN_INFO, "term power on"); 1112 nsp32_index_write1(base, TERM_PWR_CONTROL, BPWR); 1113 } 1114 1115 nsp32_write2(base, TIMER_SET, TIMER_STOP); 1116 nsp32_write2(base, TIMER_SET, TIMER_STOP); /* Required 2 times */ 1117 1118 nsp32_write1(base, SYNC_REG, 0); 1119 nsp32_write1(base, ACK_WIDTH, 0); 1120 nsp32_write2(base, SEL_TIME_OUT, SEL_TIMEOUT_TIME); 1121 1122 /* 1123 * enable to select designated IRQ (except for 1124 * IRQSELECT_SERR, IRQSELECT_PERR, IRQSELECT_BMCNTERR) 1125 */ 1126 nsp32_index_write2(base, IRQ_SELECT, IRQSELECT_TIMER_IRQ | 1127 IRQSELECT_SCSIRESET_IRQ | 1128 IRQSELECT_FIFO_SHLD_IRQ | 1129 IRQSELECT_RESELECT_IRQ | 1130 IRQSELECT_PHASE_CHANGE_IRQ | 1131 IRQSELECT_AUTO_SCSI_SEQ_IRQ | 1132 // IRQSELECT_BMCNTERR_IRQ | 1133 IRQSELECT_TARGET_ABORT_IRQ | 1134 IRQSELECT_MASTER_ABORT_IRQ ); 1135 nsp32_write2(base, IRQ_CONTROL, 0); 1136 1137 /* PCI LED off */ 1138 nsp32_index_write1(base, EXT_PORT_DDR, LED_OFF); 1139 nsp32_index_write1(base, EXT_PORT, LED_OFF); 1140 1141 return TRUE; 1142} 1143 1144 1145/* interrupt routine */ 1146static irqreturn_t do_nsp32_isr(int irq, void *dev_id) 1147{ 1148 nsp32_hw_data *data = dev_id; 1149 unsigned int base = data->BaseAddress; 1150 struct scsi_cmnd *SCpnt = data->CurrentSC; 1151 unsigned short auto_stat, irq_stat, trans_stat; 1152 unsigned char busmon, busphase; 1153 unsigned long flags; 1154 int ret; 1155 int handled = 0; 1156 struct Scsi_Host *host = data->Host; 1157 1158 spin_lock_irqsave(host->host_lock, flags); 1159 1160 /* 1161 * IRQ check, then enable IRQ mask 1162 */ 1163 irq_stat = nsp32_read2(base, IRQ_STATUS); 1164 nsp32_dbg(NSP32_DEBUG_INTR, 1165 "enter IRQ: %d, IRQstatus: 0x%x", irq, irq_stat); 1166 /* is this interrupt comes from Ninja asic? */ 1167 if ((irq_stat & IRQSTATUS_ANY_IRQ) == 0) { 1168 nsp32_dbg(NSP32_DEBUG_INTR, "shared interrupt: irq other 0x%x", irq_stat); 1169 goto out2; 1170 } 1171 handled = 1; 1172 nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK); 1173 1174 busmon = nsp32_read1(base, SCSI_BUS_MONITOR); 1175 busphase = busmon & BUSMON_PHASE_MASK; 1176 1177 trans_stat = nsp32_read2(base, TRANSFER_STATUS); 1178 if ((irq_stat == 0xffff) && (trans_stat == 0xffff)) { 1179 nsp32_msg(KERN_INFO, "card disconnect"); 1180 if (data->CurrentSC != NULL) { 1181 nsp32_msg(KERN_INFO, "clean up current SCSI command"); 1182 SCpnt->result = DID_BAD_TARGET << 16; 1183 nsp32_scsi_done(SCpnt); 1184 } 1185 goto out; 1186 } 1187 1188 /* Timer IRQ */ 1189 if (irq_stat & IRQSTATUS_TIMER_IRQ) { 1190 nsp32_dbg(NSP32_DEBUG_INTR, "timer stop"); 1191 nsp32_write2(base, TIMER_SET, TIMER_STOP); 1192 goto out; 1193 } 1194 1195 /* SCSI reset */ 1196 if (irq_stat & IRQSTATUS_SCSIRESET_IRQ) { 1197 nsp32_msg(KERN_INFO, "detected someone do bus reset"); 1198 nsp32_do_bus_reset(data); 1199 if (SCpnt != NULL) { 1200 SCpnt->result = DID_RESET << 16; 1201 nsp32_scsi_done(SCpnt); 1202 } 1203 goto out; 1204 } 1205 1206 if (SCpnt == NULL) { 1207 nsp32_msg(KERN_WARNING, "SCpnt==NULL this can't be happened"); 1208 nsp32_msg(KERN_WARNING, "irq_stat=0x%x trans_stat=0x%x", irq_stat, trans_stat); 1209 goto out; 1210 } 1211 1212 /* 1213 * AutoSCSI Interrupt. 1214 * Note: This interrupt is occurred when AutoSCSI is finished. Then 1215 * check SCSIEXECUTEPHASE, and do appropriate action. Each phases are 1216 * recorded when AutoSCSI sequencer has been processed. 1217 */ 1218 if(irq_stat & IRQSTATUS_AUTOSCSI_IRQ) { 1219 /* getting SCSI executed phase */ 1220 auto_stat = nsp32_read2(base, SCSI_EXECUTE_PHASE); 1221 nsp32_write2(base, SCSI_EXECUTE_PHASE, 0); 1222 1223 /* Selection Timeout, go busfree phase. */ 1224 if (auto_stat & SELECTION_TIMEOUT) { 1225 nsp32_dbg(NSP32_DEBUG_INTR, 1226 "selection timeout occurred"); 1227 1228 SCpnt->result = DID_TIME_OUT << 16; 1229 nsp32_scsi_done(SCpnt); 1230 goto out; 1231 } 1232 1233 if (auto_stat & MSGOUT_PHASE) { 1234 /* 1235 * MsgOut phase was processed. 1236 * If MSG_IN_OCCUER is not set, then MsgOut phase is 1237 * completed. Thus, msgout_len must reset. Otherwise, 1238 * nothing to do here. If MSG_OUT_OCCUER is occurred, 1239 * then we will encounter the condition and check. 1240 */ 1241 if (!(auto_stat & MSG_IN_OCCUER) && 1242 (data->msgout_len <= 3)) { 1243 /* 1244 * !MSG_IN_OCCUER && msgout_len <=3 1245 * ---> AutoSCSI with MSGOUTreg is processed. 1246 */ 1247 data->msgout_len = 0; 1248 }; 1249 1250 nsp32_dbg(NSP32_DEBUG_INTR, "MsgOut phase processed"); 1251 } 1252 1253 if ((auto_stat & DATA_IN_PHASE) && 1254 (scsi_get_resid(SCpnt) > 0) && 1255 ((nsp32_read2(base, FIFO_REST_CNT) & FIFO_REST_MASK) != 0)) { 1256 printk( "auto+fifo\n"); 1257 //nsp32_pio_read(SCpnt); 1258 } 1259 1260 if (auto_stat & (DATA_IN_PHASE | DATA_OUT_PHASE)) { 1261 /* DATA_IN_PHASE/DATA_OUT_PHASE was processed. */ 1262 nsp32_dbg(NSP32_DEBUG_INTR, 1263 "Data in/out phase processed"); 1264 1265 /* read BMCNT, SGT pointer addr */ 1266 nsp32_dbg(NSP32_DEBUG_INTR, "BMCNT=0x%lx", 1267 nsp32_read4(base, BM_CNT)); 1268 nsp32_dbg(NSP32_DEBUG_INTR, "addr=0x%lx", 1269 nsp32_read4(base, SGT_ADR)); 1270 nsp32_dbg(NSP32_DEBUG_INTR, "SACK=0x%lx", 1271 nsp32_read4(base, SACK_CNT)); 1272 nsp32_dbg(NSP32_DEBUG_INTR, "SSACK=0x%lx", 1273 nsp32_read4(base, SAVED_SACK_CNT)); 1274 1275 scsi_set_resid(SCpnt, 0); /* all data transfered! */ 1276 } 1277 1278 /* 1279 * MsgIn Occur 1280 */ 1281 if (auto_stat & MSG_IN_OCCUER) { 1282 nsp32_msgin_occur(SCpnt, irq_stat, auto_stat); 1283 } 1284 1285 /* 1286 * MsgOut Occur 1287 */ 1288 if (auto_stat & MSG_OUT_OCCUER) { 1289 nsp32_msgout_occur(SCpnt); 1290 } 1291 1292 /* 1293 * Bus Free Occur 1294 */ 1295 if (auto_stat & BUS_FREE_OCCUER) { 1296 ret = nsp32_busfree_occur(SCpnt, auto_stat); 1297 if (ret == TRUE) { 1298 goto out; 1299 } 1300 } 1301 1302 if (auto_stat & STATUS_PHASE) { 1303 /* 1304 * Read CSB and substitute CSB for SCpnt->result 1305 * to save status phase stutas byte. 1306 * scsi error handler checks host_byte (DID_*: 1307 * low level driver to indicate status), then checks 1308 * status_byte (SCSI status byte). 1309 */ 1310 SCpnt->result = (int)nsp32_read1(base, SCSI_CSB_IN); 1311 } 1312 1313 if (auto_stat & ILLEGAL_PHASE) { 1314 /* Illegal phase is detected. SACK is not back. */ 1315 nsp32_msg(KERN_WARNING, 1316 "AUTO SCSI ILLEGAL PHASE OCCUR!!!!"); 1317 1318 /* TODO: currently we don't have any action... bus reset? */ 1319 1320 /* 1321 * To send back SACK, assert, wait, and negate. 1322 */ 1323 nsp32_sack_assert(data); 1324 nsp32_wait_req(data, NEGATE); 1325 nsp32_sack_negate(data); 1326 1327 } 1328 1329 if (auto_stat & COMMAND_PHASE) { 1330 /* nothing to do */ 1331 nsp32_dbg(NSP32_DEBUG_INTR, "Command phase processed"); 1332 } 1333 1334 if (auto_stat & AUTOSCSI_BUSY) { 1335 /* AutoSCSI is running */ 1336 } 1337 1338 show_autophase(auto_stat); 1339 } 1340 1341 /* FIFO_SHLD_IRQ */ 1342 if (irq_stat & IRQSTATUS_FIFO_SHLD_IRQ) { 1343 nsp32_dbg(NSP32_DEBUG_INTR, "FIFO IRQ"); 1344 1345 switch(busphase) { 1346 case BUSPHASE_DATA_OUT: 1347 nsp32_dbg(NSP32_DEBUG_INTR, "fifo/write"); 1348 1349 //nsp32_pio_write(SCpnt); 1350 1351 break; 1352 1353 case BUSPHASE_DATA_IN: 1354 nsp32_dbg(NSP32_DEBUG_INTR, "fifo/read"); 1355 1356 //nsp32_pio_read(SCpnt); 1357 1358 break; 1359 1360 case BUSPHASE_STATUS: 1361 nsp32_dbg(NSP32_DEBUG_INTR, "fifo/status"); 1362 1363 SCpnt->SCp.Status = nsp32_read1(base, SCSI_CSB_IN); 1364 1365 break; 1366 default: 1367 nsp32_dbg(NSP32_DEBUG_INTR, "fifo/other phase"); 1368 nsp32_dbg(NSP32_DEBUG_INTR, "irq_stat=0x%x trans_stat=0x%x", irq_stat, trans_stat); 1369 show_busphase(busphase); 1370 break; 1371 } 1372 1373 goto out; 1374 } 1375 1376 /* Phase Change IRQ */ 1377 if (irq_stat & IRQSTATUS_PHASE_CHANGE_IRQ) { 1378 nsp32_dbg(NSP32_DEBUG_INTR, "phase change IRQ"); 1379 1380 switch(busphase) { 1381 case BUSPHASE_MESSAGE_IN: 1382 nsp32_dbg(NSP32_DEBUG_INTR, "phase chg/msg in"); 1383 nsp32_msgin_occur(SCpnt, irq_stat, 0); 1384 break; 1385 default: 1386 nsp32_msg(KERN_WARNING, "phase chg/other phase?"); 1387 nsp32_msg(KERN_WARNING, "irq_stat=0x%x trans_stat=0x%x\n", 1388 irq_stat, trans_stat); 1389 show_busphase(busphase); 1390 break; 1391 } 1392 goto out; 1393 } 1394 1395 /* PCI_IRQ */ 1396 if (irq_stat & IRQSTATUS_PCI_IRQ) { 1397 nsp32_dbg(NSP32_DEBUG_INTR, "PCI IRQ occurred"); 1398 /* Do nothing */ 1399 } 1400 1401 /* BMCNTERR_IRQ */ 1402 if (irq_stat & IRQSTATUS_BMCNTERR_IRQ) { 1403 nsp32_msg(KERN_ERR, "Received unexpected BMCNTERR IRQ! "); 1404 /* 1405 * TODO: To be implemented improving bus master 1406 * transfer reliability when BMCNTERR is occurred in 1407 * AutoSCSI phase described in specification. 1408 */ 1409 } 1410 1411 1412 out: 1413 /* disable IRQ mask */ 1414 nsp32_write2(base, IRQ_CONTROL, 0); 1415 1416 out2: 1417 spin_unlock_irqrestore(host->host_lock, flags); 1418 1419 nsp32_dbg(NSP32_DEBUG_INTR, "exit"); 1420 1421 return IRQ_RETVAL(handled); 1422} 1423 1424#undef SPRINTF 1425#define SPRINTF(args...) \ 1426 do { \ 1427 if(length > (pos - buffer)) { \ 1428 pos += snprintf(pos, length - (pos - buffer) + 1, ## args); \ 1429 nsp32_dbg(NSP32_DEBUG_PROC, "buffer=0x%p pos=0x%p length=%d %d\n", buffer, pos, length, length - (pos - buffer));\ 1430 } \ 1431 } while(0) 1432 1433static int nsp32_proc_info(struct Scsi_Host *host, char *buffer, char **start, 1434 off_t offset, int length, int inout) 1435{ 1436 char *pos = buffer; 1437 int thislength; 1438 unsigned long flags; 1439 nsp32_hw_data *data; 1440 int hostno; 1441 unsigned int base; 1442 unsigned char mode_reg; 1443 int id, speed; 1444 long model; 1445 1446 /* Write is not supported, just return. */ 1447 if (inout == TRUE) { 1448 return -EINVAL; 1449 } 1450 1451 hostno = host->host_no; 1452 data = (nsp32_hw_data *)host->hostdata; 1453 base = host->io_port; 1454 1455 SPRINTF("NinjaSCSI-32 status\n\n"); 1456 SPRINTF("Driver version: %s, $Revision: 1.33 $\n", nsp32_release_version); 1457 SPRINTF("SCSI host No.: %d\n", hostno); 1458 SPRINTF("IRQ: %d\n", host->irq); 1459 SPRINTF("IO: 0x%lx-0x%lx\n", host->io_port, host->io_port + host->n_io_port - 1); 1460 SPRINTF("MMIO(virtual address): 0x%lx-0x%lx\n", host->base, host->base + data->MmioLength - 1); 1461 SPRINTF("sg_tablesize: %d\n", host->sg_tablesize); 1462 SPRINTF("Chip revision: 0x%x\n", (nsp32_read2(base, INDEX_REG) >> 8) & 0xff); 1463 1464 mode_reg = nsp32_index_read1(base, CHIP_MODE); 1465 model = data->pci_devid->driver_data; 1466 1467#ifdef CONFIG_PM 1468 SPRINTF("Power Management: %s\n", (mode_reg & OPTF) ? "yes" : "no"); 1469#endif 1470 SPRINTF("OEM: %ld, %s\n", (mode_reg & (OEM0|OEM1)), nsp32_model[model]); 1471 1472 spin_lock_irqsave(&(data->Lock), flags); 1473 SPRINTF("CurrentSC: 0x%p\n\n", data->CurrentSC); 1474 spin_unlock_irqrestore(&(data->Lock), flags); 1475 1476 1477 SPRINTF("SDTR status\n"); 1478 for (id = 0; id < ARRAY_SIZE(data->target); id++) { 1479 1480 SPRINTF("id %d: ", id); 1481 1482 if (id == host->this_id) { 1483 SPRINTF("----- NinjaSCSI-32 host adapter\n"); 1484 continue; 1485 } 1486 1487 if (data->target[id].sync_flag == SDTR_DONE) { 1488 if (data->target[id].period == 0 && 1489 data->target[id].offset == ASYNC_OFFSET ) { 1490 SPRINTF("async"); 1491 } else { 1492 SPRINTF(" sync"); 1493 } 1494 } else { 1495 SPRINTF(" none"); 1496 } 1497 1498 if (data->target[id].period != 0) { 1499 1500 speed = 1000000 / (data->target[id].period * 4); 1501 1502 SPRINTF(" transfer %d.%dMB/s, offset %d", 1503 speed / 1000, 1504 speed % 1000, 1505 data->target[id].offset 1506 ); 1507 } 1508 SPRINTF("\n"); 1509 } 1510 1511 1512 thislength = pos - (buffer + offset); 1513 1514 if(thislength < 0) { 1515 *start = NULL; 1516 return 0; 1517 } 1518 1519 1520 thislength = min(thislength, length); 1521 *start = buffer + offset; 1522 1523 return thislength; 1524} 1525#undef SPRINTF 1526 1527 1528 1529/* 1530 * Reset parameters and call scsi_done for data->cur_lunt. 1531 * Be careful setting SCpnt->result = DID_* before calling this function. 1532 */ 1533static void nsp32_scsi_done(struct scsi_cmnd *SCpnt) 1534{ 1535 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata; 1536 unsigned int base = SCpnt->device->host->io_port; 1537 1538 scsi_dma_unmap(SCpnt); 1539 1540 /* 1541 * clear TRANSFERCONTROL_BM_START 1542 */ 1543 nsp32_write2(base, TRANSFER_CONTROL, 0); 1544 nsp32_write4(base, BM_CNT, 0); 1545 1546 /* 1547 * call scsi_done 1548 */ 1549 (*SCpnt->scsi_done)(SCpnt); 1550 1551 /* 1552 * reset parameters 1553 */ 1554 data->cur_lunt->SCpnt = NULL; 1555 data->cur_lunt = NULL; 1556 data->cur_target = NULL; 1557 data->CurrentSC = NULL; 1558} 1559 1560 1561/* 1562 * Bus Free Occur 1563 * 1564 * Current Phase is BUSFREE. AutoSCSI is automatically execute BUSFREE phase 1565 * with ACK reply when below condition is matched: 1566 * MsgIn 00: Command Complete. 1567 * MsgIn 02: Save Data Pointer. 1568 * MsgIn 04: Diconnect. 1569 * In other case, unexpected BUSFREE is detected. 1570 */ 1571static int nsp32_busfree_occur(struct scsi_cmnd *SCpnt, unsigned short execph) 1572{ 1573 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata; 1574 unsigned int base = SCpnt->device->host->io_port; 1575 1576 nsp32_dbg(NSP32_DEBUG_BUSFREE, "enter execph=0x%x", execph); 1577 show_autophase(execph); 1578 1579 nsp32_write4(base, BM_CNT, 0); 1580 nsp32_write2(base, TRANSFER_CONTROL, 0); 1581 1582 /* 1583 * MsgIn 02: Save Data Pointer 1584 * 1585 * VALID: 1586 * Save Data Pointer is received. Adjust pointer. 1587 * 1588 * NO-VALID: 1589 * SCSI-3 says if Save Data Pointer is not received, then we restart 1590 * processing and we can't adjust any SCSI data pointer in next data 1591 * phase. 1592 */ 1593 if (execph & MSGIN_02_VALID) { 1594 nsp32_dbg(NSP32_DEBUG_BUSFREE, "MsgIn02_Valid"); 1595 1596 /* 1597 * Check sack_cnt/saved_sack_cnt, then adjust sg table if 1598 * needed. 1599 */ 1600 if (!(execph & MSGIN_00_VALID) && 1601 ((execph & DATA_IN_PHASE) || (execph & DATA_OUT_PHASE))) { 1602 unsigned int sacklen, s_sacklen; 1603 1604 /* 1605 * Read SACK count and SAVEDSACK count, then compare. 1606 */ 1607 sacklen = nsp32_read4(base, SACK_CNT ); 1608 s_sacklen = nsp32_read4(base, SAVED_SACK_CNT); 1609 1610 /* 1611 * If SAVEDSACKCNT == 0, it means SavedDataPointer is 1612 * come after data transfering. 1613 */ 1614 if (s_sacklen > 0) { 1615 /* 1616 * Comparing between sack and savedsack to 1617 * check the condition of AutoMsgIn03. 1618 * 1619 * If they are same, set msgin03 == TRUE, 1620 * COMMANDCONTROL_AUTO_MSGIN_03 is enabled at 1621 * reselection. On the other hand, if they 1622 * aren't same, set msgin03 == FALSE, and 1623 * COMMANDCONTROL_AUTO_MSGIN_03 is disabled at 1624 * reselection. 1625 */ 1626 if (sacklen != s_sacklen) { 1627 data->cur_lunt->msgin03 = FALSE; 1628 } else { 1629 data->cur_lunt->msgin03 = TRUE; 1630 } 1631 1632 nsp32_adjust_busfree(SCpnt, s_sacklen); 1633 } 1634 } 1635 1636 /* This value has not substitude with valid value yet... */ 1637 //data->cur_lunt->save_datp = data->cur_datp; 1638 } else { 1639 /* 1640 * no processing. 1641 */ 1642 } 1643 1644 if (execph & MSGIN_03_VALID) { 1645 /* MsgIn03 was valid to be processed. No need processing. */ 1646 } 1647 1648 /* 1649 * target SDTR check 1650 */ 1651 if (data->cur_target->sync_flag & SDTR_INITIATOR) { 1652 /* 1653 * SDTR negotiation pulled by the initiator has not 1654 * finished yet. Fall back to ASYNC mode. 1655 */ 1656 nsp32_set_async(data, data->cur_target); 1657 data->cur_target->sync_flag &= ~SDTR_INITIATOR; 1658 data->cur_target->sync_flag |= SDTR_DONE; 1659 } else if (data->cur_target->sync_flag & SDTR_TARGET) { 1660 /* 1661 * SDTR negotiation pulled by the target has been 1662 * negotiating. 1663 */ 1664 if (execph & (MSGIN_00_VALID | MSGIN_04_VALID)) { 1665 /* 1666 * If valid message is received, then 1667 * negotiation is succeeded. 1668 */ 1669 } else { 1670 /* 1671 * On the contrary, if unexpected bus free is 1672 * occurred, then negotiation is failed. Fall 1673 * back to ASYNC mode. 1674 */ 1675 nsp32_set_async(data, data->cur_target); 1676 } 1677 data->cur_target->sync_flag &= ~SDTR_TARGET; 1678 data->cur_target->sync_flag |= SDTR_DONE; 1679 } 1680 1681 /* 1682 * It is always ensured by SCSI standard that initiator 1683 * switches into Bus Free Phase after 1684 * receiving message 00 (Command Complete), 04 (Disconnect). 1685 * It's the reason that processing here is valid. 1686 */ 1687 if (execph & MSGIN_00_VALID) { 1688 /* MsgIn 00: Command Complete */ 1689 nsp32_dbg(NSP32_DEBUG_BUSFREE, "command complete"); 1690 1691 SCpnt->SCp.Status = nsp32_read1(base, SCSI_CSB_IN); 1692 SCpnt->SCp.Message = 0; 1693 nsp32_dbg(NSP32_DEBUG_BUSFREE, 1694 "normal end stat=0x%x resid=0x%x\n", 1695 SCpnt->SCp.Status, scsi_get_resid(SCpnt)); 1696 SCpnt->result = (DID_OK << 16) | 1697 (SCpnt->SCp.Message << 8) | 1698 (SCpnt->SCp.Status << 0); 1699 nsp32_scsi_done(SCpnt); 1700 /* All operation is done */ 1701 return TRUE; 1702 } else if (execph & MSGIN_04_VALID) { 1703 /* MsgIn 04: Disconnect */ 1704 SCpnt->SCp.Status = nsp32_read1(base, SCSI_CSB_IN); 1705 SCpnt->SCp.Message = 4; 1706 1707 nsp32_dbg(NSP32_DEBUG_BUSFREE, "disconnect"); 1708 return TRUE; 1709 } else { 1710 /* Unexpected bus free */ 1711 nsp32_msg(KERN_WARNING, "unexpected bus free occurred"); 1712 1713 /* DID_ERROR? */ 1714 //SCpnt->result = (DID_OK << 16) | (SCpnt->SCp.Message << 8) | (SCpnt->SCp.Status << 0); 1715 SCpnt->result = DID_ERROR << 16; 1716 nsp32_scsi_done(SCpnt); 1717 return TRUE; 1718 } 1719 return FALSE; 1720} 1721 1722 1723/* 1724 * nsp32_adjust_busfree - adjusting SG table 1725 * 1726 * Note: This driver adjust the SG table using SCSI ACK 1727 * counter instead of BMCNT counter! 1728 */ 1729static void nsp32_adjust_busfree(struct scsi_cmnd *SCpnt, unsigned int s_sacklen) 1730{ 1731 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata; 1732 int old_entry = data->cur_entry; 1733 int new_entry; 1734 int sg_num = data->cur_lunt->sg_num; 1735 nsp32_sgtable *sgt = data->cur_lunt->sglun->sgt; 1736 unsigned int restlen, sentlen; 1737 u32_le len, addr; 1738 1739 nsp32_dbg(NSP32_DEBUG_SGLIST, "old resid=0x%x", scsi_get_resid(SCpnt)); 1740 1741 /* adjust saved SACK count with 4 byte start address boundary */ 1742 s_sacklen -= le32_to_cpu(sgt[old_entry].addr) & 3; 1743 1744 /* 1745 * calculate new_entry from sack count and each sgt[].len 1746 * calculate the byte which is intent to send 1747 */ 1748 sentlen = 0; 1749 for (new_entry = old_entry; new_entry < sg_num; new_entry++) { 1750 sentlen += (le32_to_cpu(sgt[new_entry].len) & ~SGTEND); 1751 if (sentlen > s_sacklen) { 1752 break; 1753 } 1754 } 1755 1756 /* all sgt is processed */ 1757 if (new_entry == sg_num) { 1758 goto last; 1759 } 1760 1761 if (sentlen == s_sacklen) { 1762 /* In this case, it's ok because we are at 1763 the head element of the sg. restlen is correctly calculated. */ 1764 } 1765 1766 /* calculate the rest length for transfering */ 1767 restlen = sentlen - s_sacklen; 1768 1769 /* update adjusting current SG table entry */ 1770 len = le32_to_cpu(sgt[new_entry].len); 1771 addr = le32_to_cpu(sgt[new_entry].addr); 1772 addr += (len - restlen); 1773 sgt[new_entry].addr = cpu_to_le32(addr); 1774 sgt[new_entry].len = cpu_to_le32(restlen); 1775 1776 /* set cur_entry with new_entry */ 1777 data->cur_entry = new_entry; 1778 1779 return; 1780 1781 last: 1782 if (scsi_get_resid(SCpnt) < sentlen) { 1783 nsp32_msg(KERN_ERR, "resid underflow"); 1784 } 1785 1786 scsi_set_resid(SCpnt, scsi_get_resid(SCpnt) - sentlen); 1787 nsp32_dbg(NSP32_DEBUG_SGLIST, "new resid=0x%x", scsi_get_resid(SCpnt)); 1788 1789 /* update hostdata and lun */ 1790 1791 return; 1792} 1793 1794 1795/* 1796 * It's called MsgOut phase occur. 1797 * NinjaSCSI-32Bi/UDE automatically processes up to 3 messages in 1798 * message out phase. It, however, has more than 3 messages, 1799 * HBA creates the interrupt and we have to process by hand. 1800 */ 1801static void nsp32_msgout_occur(struct scsi_cmnd *SCpnt) 1802{ 1803 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata; 1804 unsigned int base = SCpnt->device->host->io_port; 1805 //unsigned short command; 1806 long new_sgtp; 1807 int i; 1808 1809 nsp32_dbg(NSP32_DEBUG_MSGOUTOCCUR, 1810 "enter: msgout_len: 0x%x", data->msgout_len); 1811 1812 /* 1813 * If MsgOut phase is occurred without having any 1814 * message, then No_Operation is sent (SCSI-2). 1815 */ 1816 if (data->msgout_len == 0) { 1817 nsp32_build_nop(SCpnt); 1818 } 1819 1820 /* 1821 * Set SGTP ADDR current entry for restarting AUTOSCSI, 1822 * because SGTP is incremented next point. 1823 * There is few statement in the specification... 1824 */ 1825 new_sgtp = data->cur_lunt->sglun_paddr + 1826 (data->cur_lunt->cur_entry * sizeof(nsp32_sgtable)); 1827 1828 /* 1829 * send messages 1830 */ 1831 for (i = 0; i < data->msgout_len; i++) { 1832 nsp32_dbg(NSP32_DEBUG_MSGOUTOCCUR, 1833 "%d : 0x%x", i, data->msgoutbuf[i]); 1834 1835 /* 1836 * Check REQ is asserted. 1837 */ 1838 nsp32_wait_req(data, ASSERT); 1839 1840 if (i == (data->msgout_len - 1)) { 1841 /* 1842 * If the last message, set the AutoSCSI restart 1843 * before send back the ack message. AutoSCSI 1844 * restart automatically negate ATN signal. 1845 */ 1846 //command = (AUTO_MSGIN_00_OR_04 | AUTO_MSGIN_02); 1847 //nsp32_restart_autoscsi(SCpnt, command); 1848 nsp32_write2(base, COMMAND_CONTROL, 1849 (CLEAR_CDB_FIFO_POINTER | 1850 AUTO_COMMAND_PHASE | 1851 AUTOSCSI_RESTART | 1852 AUTO_MSGIN_00_OR_04 | 1853 AUTO_MSGIN_02 )); 1854 } 1855 /* 1856 * Write data with SACK, then wait sack is 1857 * automatically negated. 1858 */ 1859 nsp32_write1(base, SCSI_DATA_WITH_ACK, data->msgoutbuf[i]); 1860 nsp32_wait_sack(data, NEGATE); 1861 1862 nsp32_dbg(NSP32_DEBUG_MSGOUTOCCUR, "bus: 0x%x\n", 1863 nsp32_read1(base, SCSI_BUS_MONITOR)); 1864 }; 1865 1866 data->msgout_len = 0; 1867 1868 nsp32_dbg(NSP32_DEBUG_MSGOUTOCCUR, "exit"); 1869} 1870 1871/* 1872 * Restart AutoSCSI 1873 * 1874 * Note: Restarting AutoSCSI needs set: 1875 * SYNC_REG, ACK_WIDTH, SGT_ADR, TRANSFER_CONTROL 1876 */ 1877static void nsp32_restart_autoscsi(struct scsi_cmnd *SCpnt, unsigned short command) 1878{ 1879 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata; 1880 unsigned int base = data->BaseAddress; 1881 unsigned short transfer = 0; 1882 1883 nsp32_dbg(NSP32_DEBUG_RESTART, "enter"); 1884 1885 if (data->cur_target == NULL || data->cur_lunt == NULL) { 1886 nsp32_msg(KERN_ERR, "Target or Lun is invalid"); 1887 } 1888 1889 /* 1890 * set SYNC_REG 1891 * Don't set BM_START_ADR before setting this register. 1892 */ 1893 nsp32_write1(base, SYNC_REG, data->cur_target->syncreg); 1894 1895 /* 1896 * set ACKWIDTH 1897 */ 1898 nsp32_write1(base, ACK_WIDTH, data->cur_target->ackwidth); 1899 1900 /* 1901 * set SREQ hazard killer sampling rate 1902 */ 1903 nsp32_write1(base, SREQ_SMPL_RATE, data->cur_target->sample_reg); 1904 1905 /* 1906 * set SGT ADDR (physical address) 1907 */ 1908 nsp32_write4(base, SGT_ADR, data->cur_lunt->sglun_paddr); 1909 1910 /* 1911 * set TRANSFER CONTROL REG 1912 */ 1913 transfer = 0; 1914 transfer |= (TRANSFER_GO | ALL_COUNTER_CLR); 1915 if (data->trans_method & NSP32_TRANSFER_BUSMASTER) { 1916 if (scsi_bufflen(SCpnt) > 0) { 1917 transfer |= BM_START; 1918 } 1919 } else if (data->trans_method & NSP32_TRANSFER_MMIO) { 1920 transfer |= CB_MMIO_MODE; 1921 } else if (data->trans_method & NSP32_TRANSFER_PIO) { 1922 transfer |= CB_IO_MODE; 1923 } 1924 nsp32_write2(base, TRANSFER_CONTROL, transfer); 1925 1926 /* 1927 * restart AutoSCSI 1928 * 1929 * TODO: COMMANDCONTROL_AUTO_COMMAND_PHASE is needed ? 1930 */ 1931 command |= (CLEAR_CDB_FIFO_POINTER | 1932 AUTO_COMMAND_PHASE | 1933 AUTOSCSI_RESTART ); 1934 nsp32_write2(base, COMMAND_CONTROL, command); 1935 1936 nsp32_dbg(NSP32_DEBUG_RESTART, "exit"); 1937} 1938 1939 1940/* 1941 * cannot run automatically message in occur 1942 */ 1943static void nsp32_msgin_occur(struct scsi_cmnd *SCpnt, 1944 unsigned long irq_status, 1945 unsigned short execph) 1946{ 1947 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata; 1948 unsigned int base = SCpnt->device->host->io_port; 1949 unsigned char msg; 1950 unsigned char msgtype; 1951 unsigned char newlun; 1952 unsigned short command = 0; 1953 int msgclear = TRUE; 1954 long new_sgtp; 1955 int ret; 1956 1957 /* 1958 * read first message 1959 * Use SCSIDATA_W_ACK instead of SCSIDATAIN, because the procedure 1960 * of Message-In have to be processed before sending back SCSI ACK. 1961 */ 1962 msg = nsp32_read1(base, SCSI_DATA_IN); 1963 data->msginbuf[(unsigned char)data->msgin_len] = msg; 1964 msgtype = data->msginbuf[0]; 1965 nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, 1966 "enter: msglen: 0x%x msgin: 0x%x msgtype: 0x%x", 1967 data->msgin_len, msg, msgtype); 1968 1969 /* 1970 * TODO: We need checking whether bus phase is message in? 1971 */ 1972 1973 /* 1974 * assert SCSI ACK 1975 */ 1976 nsp32_sack_assert(data); 1977 1978 /* 1979 * processing IDENTIFY 1980 */ 1981 if (msgtype & 0x80) { 1982 if (!(irq_status & IRQSTATUS_RESELECT_OCCUER)) { 1983 /* Invalid (non reselect) phase */ 1984 goto reject; 1985 } 1986 1987 newlun = msgtype & 0x1f; /* TODO: SPI-3 compliant? */ 1988 ret = nsp32_reselection(SCpnt, newlun); 1989 if (ret == TRUE) { 1990 goto restart; 1991 } else { 1992 goto reject; 1993 } 1994 } 1995 1996 /* 1997 * processing messages except for IDENTIFY 1998 * 1999 * TODO: Messages are all SCSI-2 terminology. SCSI-3 compliance is TODO. 2000 */ 2001 switch (msgtype) { 2002 /* 2003 * 1-byte message 2004 */ 2005 case COMMAND_COMPLETE: 2006 case DISCONNECT: 2007 /* 2008 * These messages should not be occurred. 2009 * They should be processed on AutoSCSI sequencer. 2010 */ 2011 nsp32_msg(KERN_WARNING, 2012 "unexpected message of AutoSCSI MsgIn: 0x%x", msg); 2013 break; 2014 2015 case RESTORE_POINTERS: 2016 /* 2017 * AutoMsgIn03 is disabled, and HBA gets this message. 2018 */ 2019 2020 if ((execph & DATA_IN_PHASE) || (execph & DATA_OUT_PHASE)) { 2021 unsigned int s_sacklen; 2022 2023 s_sacklen = nsp32_read4(base, SAVED_SACK_CNT); 2024 if ((execph & MSGIN_02_VALID) && (s_sacklen > 0)) { 2025 nsp32_adjust_busfree(SCpnt, s_sacklen); 2026 } else { 2027 /* No need to rewrite SGT */ 2028 } 2029 } 2030 data->cur_lunt->msgin03 = FALSE; 2031 2032 /* Update with the new value */ 2033 2034 /* reset SACK/SavedACK counter (or ALL clear?) */ 2035 nsp32_write4(base, CLR_COUNTER, CLRCOUNTER_ALLMASK); 2036 2037 /* 2038 * set new sg pointer 2039 */ 2040 new_sgtp = data->cur_lunt->sglun_paddr + 2041 (data->cur_lunt->cur_entry * sizeof(nsp32_sgtable)); 2042 nsp32_write4(base, SGT_ADR, new_sgtp); 2043 2044 break; 2045 2046 case SAVE_POINTERS: 2047 /* 2048 * These messages should not be occurred. 2049 * They should be processed on AutoSCSI sequencer. 2050 */ 2051 nsp32_msg (KERN_WARNING, 2052 "unexpected message of AutoSCSI MsgIn: SAVE_POINTERS"); 2053 2054 break; 2055 2056 case MESSAGE_REJECT: 2057 /* If previous message_out is sending SDTR, and get 2058 message_reject from target, SDTR negotiation is failed */ 2059 if (data->cur_target->sync_flag & 2060 (SDTR_INITIATOR | SDTR_TARGET)) { 2061 /* 2062 * Current target is negotiating SDTR, but it's 2063 * failed. Fall back to async transfer mode, and set 2064 * SDTR_DONE. 2065 */ 2066 nsp32_set_async(data, data->cur_target); 2067 data->cur_target->sync_flag &= ~SDTR_INITIATOR; 2068 data->cur_target->sync_flag |= SDTR_DONE; 2069 2070 } 2071 break; 2072 2073 case LINKED_CMD_COMPLETE: 2074 case LINKED_FLG_CMD_COMPLETE: 2075 /* queue tag is not supported currently */ 2076 nsp32_msg (KERN_WARNING, 2077 "unsupported message: 0x%x", msgtype); 2078 break; 2079 2080 case INITIATE_RECOVERY: 2081 /* staring ECA (Extended Contingent Allegiance) state. */ 2082 /* This message is declined in SPI2 or later. */ 2083 2084 goto reject; 2085 2086 /* 2087 * 2-byte message 2088 */ 2089 case SIMPLE_QUEUE_TAG: 2090 case 0x23: 2091 /* 2092 * 0x23: Ignore_Wide_Residue is not declared in scsi.h. 2093 * No support is needed. 2094 */ 2095 if (data->msgin_len >= 1) { 2096 goto reject; 2097 } 2098 2099 /* current position is 1-byte of 2 byte */ 2100 msgclear = FALSE; 2101 2102 break; 2103 2104 /* 2105 * extended message 2106 */ 2107 case EXTENDED_MESSAGE: 2108 if (data->msgin_len < 1) { 2109 /* 2110 * Current position does not reach 2-byte 2111 * (2-byte is extended message length). 2112 */ 2113 msgclear = FALSE; 2114 break; 2115 } 2116 2117 if ((data->msginbuf[1] + 1) > data->msgin_len) { 2118 /* 2119 * Current extended message has msginbuf[1] + 2 2120 * (msgin_len starts counting from 0, so buf[1] + 1). 2121 * If current message position is not finished, 2122 * continue receiving message. 2123 */ 2124 msgclear = FALSE; 2125 break; 2126 } 2127 2128 /* 2129 * Reach here means regular length of each type of 2130 * extended messages. 2131 */ 2132 switch (data->msginbuf[2]) { 2133 case EXTENDED_MODIFY_DATA_POINTER: 2134 /* TODO */ 2135 goto reject; /* not implemented yet */ 2136 break; 2137 2138 case EXTENDED_SDTR: 2139 /* 2140 * Exchange this message between initiator and target. 2141 */ 2142 if (data->msgin_len != EXTENDED_SDTR_LEN + 1) { 2143 /* 2144 * received inappropriate message. 2145 */ 2146 goto reject; 2147 break; 2148 } 2149 2150 nsp32_analyze_sdtr(SCpnt); 2151 2152 break; 2153 2154 case EXTENDED_EXTENDED_IDENTIFY: 2155 /* SCSI-I only, not supported. */ 2156 goto reject; /* not implemented yet */ 2157 2158 break; 2159 2160 case EXTENDED_WDTR: 2161 goto reject; /* not implemented yet */ 2162 2163 break; 2164 2165 default: 2166 goto reject; 2167 } 2168 break; 2169 2170 default: 2171 goto reject; 2172 } 2173 2174 restart: 2175 if (msgclear == TRUE) { 2176 data->msgin_len = 0; 2177 2178 /* 2179 * If restarting AutoSCSI, but there are some message to out 2180 * (msgout_len > 0), set AutoATN, and set SCSIMSGOUT as 0 2181 * (MV_VALID = 0). When commandcontrol is written with 2182 * AutoSCSI restart, at the same time MsgOutOccur should be 2183 * happened (however, such situation is really possible...?). 2184 */ 2185 if (data->msgout_len > 0) { 2186 nsp32_write4(base, SCSI_MSG_OUT, 0); 2187 command |= AUTO_ATN; 2188 } 2189 2190 /* 2191 * restart AutoSCSI 2192 * If it's failed, COMMANDCONTROL_AUTO_COMMAND_PHASE is needed. 2193 */ 2194 command |= (AUTO_MSGIN_00_OR_04 | AUTO_MSGIN_02); 2195 2196 /* 2197 * If current msgin03 is TRUE, then flag on. 2198 */ 2199 if (data->cur_lunt->msgin03 == TRUE) { 2200 command |= AUTO_MSGIN_03; 2201 } 2202 data->cur_lunt->msgin03 = FALSE; 2203 } else { 2204 data->msgin_len++; 2205 } 2206 2207 /* 2208 * restart AutoSCSI 2209 */ 2210 nsp32_restart_autoscsi(SCpnt, command); 2211 2212 /* 2213 * wait SCSI REQ negate for REQ-ACK handshake 2214 */ 2215 nsp32_wait_req(data, NEGATE); 2216 2217 /* 2218 * negate SCSI ACK 2219 */ 2220 nsp32_sack_negate(data); 2221 2222 nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "exit"); 2223 2224 return; 2225 2226 reject: 2227 nsp32_msg(KERN_WARNING, 2228 "invalid or unsupported MessageIn, rejected. " 2229 "current msg: 0x%x (len: 0x%x), processing msg: 0x%x", 2230 msg, data->msgin_len, msgtype); 2231 nsp32_build_reject(SCpnt); 2232 data->msgin_len = 0; 2233 2234 goto restart; 2235} 2236 2237/* 2238 * 2239 */ 2240static void nsp32_analyze_sdtr(struct scsi_cmnd *SCpnt) 2241{ 2242 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata; 2243 nsp32_target *target = data->cur_target; 2244 nsp32_sync_table *synct; 2245 unsigned char get_period = data->msginbuf[3]; 2246 unsigned char get_offset = data->msginbuf[4]; 2247 int entry; 2248 int syncnum; 2249 2250 nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "enter"); 2251 2252 synct = data->synct; 2253 syncnum = data->syncnum; 2254 2255 /* 2256 * If this inititor sent the SDTR message, then target responds SDTR, 2257 * initiator SYNCREG, ACKWIDTH from SDTR parameter. 2258 * Messages are not appropriate, then send back reject message. 2259 * If initiator did not send the SDTR, but target sends SDTR, 2260 * initiator calculator the appropriate parameter and send back SDTR. 2261 */ 2262 if (target->sync_flag & SDTR_INITIATOR) { 2263 /* 2264 * Initiator sent SDTR, the target responds and 2265 * send back negotiation SDTR. 2266 */ 2267 nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "target responds SDTR"); 2268 2269 target->sync_flag &= ~SDTR_INITIATOR; 2270 target->sync_flag |= SDTR_DONE; 2271 2272 /* 2273 * offset: 2274 */ 2275 if (get_offset > SYNC_OFFSET) { 2276 /* 2277 * Negotiation is failed, the target send back 2278 * unexpected offset value. 2279 */ 2280 goto reject; 2281 } 2282 2283 if (get_offset == ASYNC_OFFSET) { 2284 /* 2285 * Negotiation is succeeded, the target want 2286 * to fall back into asynchronous transfer mode. 2287 */ 2288 goto async; 2289 } 2290 2291 /* 2292 * period: 2293 * Check whether sync period is too short. If too short, 2294 * fall back to async mode. If it's ok, then investigate 2295 * the received sync period. If sync period is acceptable 2296 * between sync table start_period and end_period, then 2297 * set this I_T nexus as sent offset and period. 2298 * If it's not acceptable, send back reject and fall back 2299 * to async mode. 2300 */ 2301 if (get_period < data->synct[0].period_num) { 2302 /* 2303 * Negotiation is failed, the target send back 2304 * unexpected period value. 2305 */ 2306 goto reject; 2307 } 2308 2309 entry = nsp32_search_period_entry(data, target, get_period); 2310 2311 if (entry < 0) { 2312 /* 2313 * Target want to use long period which is not 2314 * acceptable NinjaSCSI-32Bi/UDE. 2315 */ 2316 goto reject; 2317 } 2318 2319 /* 2320 * Set new sync table and offset in this I_T nexus. 2321 */ 2322 nsp32_set_sync_entry(data, target, entry, get_offset); 2323 } else { 2324 /* Target send SDTR to initiator. */ 2325 nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "target send SDTR"); 2326 2327 target->sync_flag |= SDTR_INITIATOR; 2328 2329 /* offset: */ 2330 if (get_offset > SYNC_OFFSET) { 2331 /* send back as SYNC_OFFSET */ 2332 get_offset = SYNC_OFFSET; 2333 } 2334 2335 /* period: */ 2336 if (get_period < data->synct[0].period_num) { 2337 get_period = data->synct[0].period_num; 2338 } 2339 2340 entry = nsp32_search_period_entry(data, target, get_period); 2341 2342 if (get_offset == ASYNC_OFFSET || entry < 0) { 2343 nsp32_set_async(data, target); 2344 nsp32_build_sdtr(SCpnt, 0, ASYNC_OFFSET); 2345 } else { 2346 nsp32_set_sync_entry(data, target, entry, get_offset); 2347 nsp32_build_sdtr(SCpnt, get_period, get_offset); 2348 } 2349 } 2350 2351 target->period = get_period; 2352 nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "exit"); 2353 return; 2354 2355 reject: 2356 /* 2357 * If the current message is unacceptable, send back to the target 2358 * with reject message. 2359 */ 2360 nsp32_build_reject(SCpnt); 2361 2362 async: 2363 nsp32_set_async(data, target); /* set as ASYNC transfer mode */ 2364 2365 target->period = 0; 2366 nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "exit: set async"); 2367 return; 2368} 2369 2370 2371/* 2372 * Search config entry number matched in sync_table from given 2373 * target and speed period value. If failed to search, return negative value. 2374 */ 2375static int nsp32_search_period_entry(nsp32_hw_data *data, 2376 nsp32_target *target, 2377 unsigned char period) 2378{ 2379 int i; 2380 2381 if (target->limit_entry >= data->syncnum) { 2382 nsp32_msg(KERN_ERR, "limit_entry exceeds syncnum!"); 2383 target->limit_entry = 0; 2384 } 2385 2386 for (i = target->limit_entry; i < data->syncnum; i++) { 2387 if (period >= data->synct[i].start_period && 2388 period <= data->synct[i].end_period) { 2389 break; 2390 } 2391 } 2392 2393 /* 2394 * Check given period value is over the sync_table value. 2395 * If so, return max value. 2396 */ 2397 if (i == data->syncnum) { 2398 i = -1; 2399 } 2400 2401 return i; 2402} 2403 2404 2405/* 2406 * target <-> initiator use ASYNC transfer 2407 */ 2408static void nsp32_set_async(nsp32_hw_data *data, nsp32_target *target) 2409{ 2410 unsigned char period = data->synct[target->limit_entry].period_num; 2411 2412 target->offset = ASYNC_OFFSET; 2413 target->period = 0; 2414 target->syncreg = TO_SYNCREG(period, ASYNC_OFFSET); 2415 target->ackwidth = 0; 2416 target->sample_reg = 0; 2417 2418 nsp32_dbg(NSP32_DEBUG_SYNC, "set async"); 2419} 2420 2421 2422/* 2423 * target <-> initiator use maximum SYNC transfer 2424 */ 2425static void nsp32_set_max_sync(nsp32_hw_data *data, 2426 nsp32_target *target, 2427 unsigned char *period, 2428 unsigned char *offset) 2429{ 2430 unsigned char period_num, ackwidth; 2431 2432 period_num = data->synct[target->limit_entry].period_num; 2433 *period = data->synct[target->limit_entry].start_period; 2434 ackwidth = data->synct[target->limit_entry].ackwidth; 2435 *offset = SYNC_OFFSET; 2436 2437 target->syncreg = TO_SYNCREG(period_num, *offset); 2438 target->ackwidth = ackwidth; 2439 target->offset = *offset; 2440 target->sample_reg = 0; /* disable SREQ sampling */ 2441} 2442 2443 2444/* 2445 * target <-> initiator use entry number speed 2446 */ 2447static void nsp32_set_sync_entry(nsp32_hw_data *data, 2448 nsp32_target *target, 2449 int entry, 2450 unsigned char offset) 2451{ 2452 unsigned char period, ackwidth, sample_rate; 2453 2454 period = data->synct[entry].period_num; 2455 ackwidth = data->synct[entry].ackwidth; 2456 offset = offset; 2457 sample_rate = data->synct[entry].sample_rate; 2458 2459 target->syncreg = TO_SYNCREG(period, offset); 2460 target->ackwidth = ackwidth; 2461 target->offset = offset; 2462 target->sample_reg = sample_rate | SAMPLING_ENABLE; 2463 2464 nsp32_dbg(NSP32_DEBUG_SYNC, "set sync"); 2465} 2466 2467 2468/* 2469 * It waits until SCSI REQ becomes assertion or negation state. 2470 * 2471 * Note: If nsp32_msgin_occur is called, we asserts SCSI ACK. Then 2472 * connected target responds SCSI REQ negation. We have to wait 2473 * SCSI REQ becomes negation in order to negate SCSI ACK signal for 2474 * REQ-ACK handshake. 2475 */ 2476static void nsp32_wait_req(nsp32_hw_data *data, int state) 2477{ 2478 unsigned int base = data->BaseAddress; 2479 int wait_time = 0; 2480 unsigned char bus, req_bit; 2481 2482 if (!((state == ASSERT) || (state == NEGATE))) { 2483 nsp32_msg(KERN_ERR, "unknown state designation"); 2484 } 2485 /* REQ is BIT(5) */ 2486 req_bit = (state == ASSERT ? BUSMON_REQ : 0); 2487 2488 do { 2489 bus = nsp32_read1(base, SCSI_BUS_MONITOR); 2490 if ((bus & BUSMON_REQ) == req_bit) { 2491 nsp32_dbg(NSP32_DEBUG_WAIT, 2492 "wait_time: %d", wait_time); 2493 return; 2494 } 2495 udelay(1); 2496 wait_time++; 2497 } while (wait_time < REQSACK_TIMEOUT_TIME); 2498 2499 nsp32_msg(KERN_WARNING, "wait REQ timeout, req_bit: 0x%x", req_bit); 2500} 2501 2502/* 2503 * It waits until SCSI SACK becomes assertion or negation state. 2504 */ 2505static void nsp32_wait_sack(nsp32_hw_data *data, int state) 2506{ 2507 unsigned int base = data->BaseAddress; 2508 int wait_time = 0; 2509 unsigned char bus, ack_bit; 2510 2511 if (!((state == ASSERT) || (state == NEGATE))) { 2512 nsp32_msg(KERN_ERR, "unknown state designation"); 2513 } 2514 /* ACK is BIT(4) */ 2515 ack_bit = (state == ASSERT ? BUSMON_ACK : 0); 2516 2517 do { 2518 bus = nsp32_read1(base, SCSI_BUS_MONITOR); 2519 if ((bus & BUSMON_ACK) == ack_bit) { 2520 nsp32_dbg(NSP32_DEBUG_WAIT, 2521 "wait_time: %d", wait_time); 2522 return; 2523 } 2524 udelay(1); 2525 wait_time++; 2526 } while (wait_time < REQSACK_TIMEOUT_TIME); 2527 2528 nsp32_msg(KERN_WARNING, "wait SACK timeout, ack_bit: 0x%x", ack_bit); 2529} 2530 2531/* 2532 * assert SCSI ACK 2533 * 2534 * Note: SCSI ACK assertion needs with ACKENB=1, AUTODIRECTION=1. 2535 */ 2536static void nsp32_sack_assert(nsp32_hw_data *data) 2537{ 2538 unsigned int base = data->BaseAddress; 2539 unsigned char busctrl; 2540 2541 busctrl = nsp32_read1(base, SCSI_BUS_CONTROL); 2542 busctrl |= (BUSCTL_ACK | AUTODIRECTION | ACKENB); 2543 nsp32_write1(base, SCSI_BUS_CONTROL, busctrl); 2544} 2545 2546/* 2547 * negate SCSI ACK 2548 */ 2549static void nsp32_sack_negate(nsp32_hw_data *data) 2550{ 2551 unsigned int base = data->BaseAddress; 2552 unsigned char busctrl; 2553 2554 busctrl = nsp32_read1(base, SCSI_BUS_CONTROL); 2555 busctrl &= ~BUSCTL_ACK; 2556 nsp32_write1(base, SCSI_BUS_CONTROL, busctrl); 2557} 2558 2559 2560 2561/* 2562 * Note: n_io_port is defined as 0x7f because I/O register port is 2563 * assigned as: 2564 * 0x800-0x8ff: memory mapped I/O port 2565 * 0x900-0xbff: (map same 0x800-0x8ff I/O port image repeatedly) 2566 * 0xc00-0xfff: CardBus status registers 2567 */ 2568static int nsp32_detect(struct pci_dev *pdev) 2569{ 2570 struct Scsi_Host *host; /* registered host structure */ 2571 struct resource *res; 2572 nsp32_hw_data *data; 2573 int ret; 2574 int i, j; 2575 2576 nsp32_dbg(NSP32_DEBUG_REGISTER, "enter"); 2577 2578 /* 2579 * register this HBA as SCSI device 2580 */ 2581 host = scsi_host_alloc(&nsp32_template, sizeof(nsp32_hw_data)); 2582 if (host == NULL) { 2583 nsp32_msg (KERN_ERR, "failed to scsi register"); 2584 goto err; 2585 } 2586 2587 /* 2588 * set nsp32_hw_data 2589 */ 2590 data = (nsp32_hw_data *)host->hostdata; 2591 2592 memcpy(data, &nsp32_data_base, sizeof(nsp32_hw_data)); 2593 2594 host->irq = data->IrqNumber; 2595 host->io_port = data->BaseAddress; 2596 host->unique_id = data->BaseAddress; 2597 host->n_io_port = data->NumAddress; 2598 host->base = (unsigned long)data->MmioAddress; 2599 2600 data->Host = host; 2601 spin_lock_init(&(data->Lock)); 2602 2603 data->cur_lunt = NULL; 2604 data->cur_target = NULL; 2605 2606 /* 2607 * Bus master transfer mode is supported currently. 2608 */ 2609 data->trans_method = NSP32_TRANSFER_BUSMASTER; 2610 2611 /* 2612 * Set clock div, CLOCK_4 (HBA has own external clock, and 2613 * dividing * 100ns/4). 2614 * Currently CLOCK_4 has only tested, not for CLOCK_2/PCICLK yet. 2615 */ 2616 data->clock = CLOCK_4; 2617 2618 /* 2619 * Select appropriate nsp32_sync_table and set I_CLOCKDIV. 2620 */ 2621 switch (data->clock) { 2622 case CLOCK_4: 2623 /* If data->clock is CLOCK_4, then select 40M sync table. */ 2624 data->synct = nsp32_sync_table_40M; 2625 data->syncnum = ARRAY_SIZE(nsp32_sync_table_40M); 2626 break; 2627 case CLOCK_2: 2628 /* If data->clock is CLOCK_2, then select 20M sync table. */ 2629 data->synct = nsp32_sync_table_20M; 2630 data->syncnum = ARRAY_SIZE(nsp32_sync_table_20M); 2631 break; 2632 case PCICLK: 2633 /* If data->clock is PCICLK, then select pci sync table. */ 2634 data->synct = nsp32_sync_table_pci; 2635 data->syncnum = ARRAY_SIZE(nsp32_sync_table_pci); 2636 break; 2637 default: 2638 nsp32_msg(KERN_WARNING, 2639 "Invalid clock div is selected, set CLOCK_4."); 2640 /* Use default value CLOCK_4 */ 2641 data->clock = CLOCK_4; 2642 data->synct = nsp32_sync_table_40M; 2643 data->syncnum = ARRAY_SIZE(nsp32_sync_table_40M); 2644 } 2645 2646 /* 2647 * setup nsp32_lunt 2648 */ 2649 2650 /* 2651 * setup DMA 2652 */ 2653 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0) { 2654 nsp32_msg (KERN_ERR, "failed to set PCI DMA mask"); 2655 goto scsi_unregister; 2656 } 2657 2658 /* 2659 * allocate autoparam DMA resource. 2660 */ 2661 data->autoparam = pci_alloc_consistent(pdev, sizeof(nsp32_autoparam), &(data->auto_paddr)); 2662 if (data->autoparam == NULL) { 2663 nsp32_msg(KERN_ERR, "failed to allocate DMA memory"); 2664 goto scsi_unregister; 2665 } 2666 2667 /* 2668 * allocate scatter-gather DMA resource. 2669 */ 2670 data->sg_list = pci_alloc_consistent(pdev, NSP32_SG_TABLE_SIZE, 2671 &(data->sg_paddr)); 2672 if (data->sg_list == NULL) { 2673 nsp32_msg(KERN_ERR, "failed to allocate DMA memory"); 2674 goto free_autoparam; 2675 } 2676 2677 for (i = 0; i < ARRAY_SIZE(data->lunt); i++) { 2678 for (j = 0; j < ARRAY_SIZE(data->lunt[0]); j++) { 2679 int offset = i * ARRAY_SIZE(data->lunt[0]) + j; 2680 nsp32_lunt tmp = { 2681 .SCpnt = NULL, 2682 .save_datp = 0, 2683 .msgin03 = FALSE, 2684 .sg_num = 0, 2685 .cur_entry = 0, 2686 .sglun = &(data->sg_list[offset]), 2687 .sglun_paddr = data->sg_paddr + (offset * sizeof(nsp32_sglun)), 2688 }; 2689 2690 data->lunt[i][j] = tmp; 2691 } 2692 } 2693 2694 /* 2695 * setup target 2696 */ 2697 for (i = 0; i < ARRAY_SIZE(data->target); i++) { 2698 nsp32_target *target = &(data->target[i]); 2699 2700 target->limit_entry = 0; 2701 target->sync_flag = 0; 2702 nsp32_set_async(data, target); 2703 } 2704 2705 /* 2706 * EEPROM check 2707 */ 2708 ret = nsp32_getprom_param(data); 2709 if (ret == FALSE) { 2710 data->resettime = 3; /* default 3 */ 2711 } 2712 2713 /* 2714 * setup HBA 2715 */ 2716 nsp32hw_init(data); 2717 2718 snprintf(data->info_str, sizeof(data->info_str), 2719 "NinjaSCSI-32Bi/UDE: irq %d, io 0x%lx+0x%x", 2720 host->irq, host->io_port, host->n_io_port); 2721 2722 /* 2723 * SCSI bus reset 2724 * 2725 * Note: It's important to reset SCSI bus in initialization phase. 2726 * NinjaSCSI-32Bi/UDE HBA EEPROM seems to exchange SDTR when 2727 * system is coming up, so SCSI devices connected to HBA is set as 2728 * un-asynchronous mode. It brings the merit that this HBA is 2729 * ready to start synchronous transfer without any preparation, 2730 * but we are difficult to control transfer speed. In addition, 2731 * it prevents device transfer speed from effecting EEPROM start-up 2732 * SDTR. NinjaSCSI-32Bi/UDE has the feature if EEPROM is set as 2733 * Auto Mode, then FAST-10M is selected when SCSI devices are 2734 * connected same or more than 4 devices. It should be avoided 2735 * depending on this specification. Thus, resetting the SCSI bus 2736 * restores all connected SCSI devices to asynchronous mode, then 2737 * this driver set SDTR safely later, and we can control all SCSI 2738 * device transfer mode. 2739 */ 2740 nsp32_do_bus_reset(data); 2741 2742 ret = request_irq(host->irq, do_nsp32_isr, IRQF_SHARED, "nsp32", data); 2743 if (ret < 0) { 2744 nsp32_msg(KERN_ERR, "Unable to allocate IRQ for NinjaSCSI32 " 2745 "SCSI PCI controller. Interrupt: %d", host->irq); 2746 goto free_sg_list; 2747 } 2748 2749 /* 2750 * PCI IO register 2751 */ 2752 res = request_region(host->io_port, host->n_io_port, "nsp32"); 2753 if (res == NULL) { 2754 nsp32_msg(KERN_ERR, 2755 "I/O region 0x%lx+0x%lx is already used", 2756 data->BaseAddress, data->NumAddress); 2757 goto free_irq; 2758 } 2759 2760 ret = scsi_add_host(host, &pdev->dev); 2761 if (ret) { 2762 nsp32_msg(KERN_ERR, "failed to add scsi host"); 2763 goto free_region; 2764 } 2765 scsi_scan_host(host); 2766 pci_set_drvdata(pdev, host); 2767 return 0; 2768 2769 free_region: 2770 release_region(host->io_port, host->n_io_port); 2771 2772 free_irq: 2773 free_irq(host->irq, data); 2774 2775 free_sg_list: 2776 pci_free_consistent(pdev, NSP32_SG_TABLE_SIZE, 2777 data->sg_list, data->sg_paddr); 2778 2779 free_autoparam: 2780 pci_free_consistent(pdev, sizeof(nsp32_autoparam), 2781 data->autoparam, data->auto_paddr); 2782 2783 scsi_unregister: 2784 scsi_host_put(host); 2785 2786 err: 2787 return 1; 2788} 2789 2790static int nsp32_release(struct Scsi_Host *host) 2791{ 2792 nsp32_hw_data *data = (nsp32_hw_data *)host->hostdata; 2793 2794 if (data->autoparam) { 2795 pci_free_consistent(data->Pci, sizeof(nsp32_autoparam), 2796 data->autoparam, data->auto_paddr); 2797 } 2798 2799 if (data->sg_list) { 2800 pci_free_consistent(data->Pci, NSP32_SG_TABLE_SIZE, 2801 data->sg_list, data->sg_paddr); 2802 } 2803 2804 if (host->irq) { 2805 free_irq(host->irq, data); 2806 } 2807 2808 if (host->io_port && host->n_io_port) { 2809 release_region(host->io_port, host->n_io_port); 2810 } 2811 2812 if (data->MmioAddress) { 2813 iounmap(data->MmioAddress); 2814 } 2815 2816 return 0; 2817} 2818 2819static const char *nsp32_info(struct Scsi_Host *shpnt) 2820{ 2821 nsp32_hw_data *data = (nsp32_hw_data *)shpnt->hostdata; 2822 2823 return data->info_str; 2824} 2825 2826 2827/**************************************************************************** 2828 * error handler 2829 */ 2830static int nsp32_eh_abort(struct scsi_cmnd *SCpnt) 2831{ 2832 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata; 2833 unsigned int base = SCpnt->device->host->io_port; 2834 2835 nsp32_msg(KERN_WARNING, "abort"); 2836 2837 if (data->cur_lunt->SCpnt == NULL) { 2838 nsp32_dbg(NSP32_DEBUG_BUSRESET, "abort failed"); 2839 return FAILED; 2840 } 2841 2842 if (data->cur_target->sync_flag & (SDTR_INITIATOR | SDTR_TARGET)) { 2843 /* reset SDTR negotiation */ 2844 data->cur_target->sync_flag = 0; 2845 nsp32_set_async(data, data->cur_target); 2846 } 2847 2848 nsp32_write2(base, TRANSFER_CONTROL, 0); 2849 nsp32_write2(base, BM_CNT, 0); 2850 2851 SCpnt->result = DID_ABORT << 16; 2852 nsp32_scsi_done(SCpnt); 2853 2854 nsp32_dbg(NSP32_DEBUG_BUSRESET, "abort success"); 2855 return SUCCESS; 2856} 2857 2858static int nsp32_eh_bus_reset(struct scsi_cmnd *SCpnt) 2859{ 2860 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata; 2861 unsigned int base = SCpnt->device->host->io_port; 2862 2863 spin_lock_irq(SCpnt->device->host->host_lock); 2864 2865 nsp32_msg(KERN_INFO, "Bus Reset"); 2866 nsp32_dbg(NSP32_DEBUG_BUSRESET, "SCpnt=0x%x", SCpnt); 2867 2868 nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK); 2869 nsp32_do_bus_reset(data); 2870 nsp32_write2(base, IRQ_CONTROL, 0); 2871 2872 spin_unlock_irq(SCpnt->device->host->host_lock); 2873 return SUCCESS; /* SCSI bus reset is succeeded at any time. */ 2874} 2875 2876static void nsp32_do_bus_reset(nsp32_hw_data *data) 2877{ 2878 unsigned int base = data->BaseAddress; 2879 unsigned short intrdat; 2880 int i; 2881 2882 nsp32_dbg(NSP32_DEBUG_BUSRESET, "in"); 2883 2884 /* 2885 * stop all transfer 2886 * clear TRANSFERCONTROL_BM_START 2887 * clear counter 2888 */ 2889 nsp32_write2(base, TRANSFER_CONTROL, 0); 2890 nsp32_write4(base, BM_CNT, 0); 2891 nsp32_write4(base, CLR_COUNTER, CLRCOUNTER_ALLMASK); 2892 2893 /* 2894 * fall back to asynchronous transfer mode 2895 * initialize SDTR negotiation flag 2896 */ 2897 for (i = 0; i < ARRAY_SIZE(data->target); i++) { 2898 nsp32_target *target = &data->target[i]; 2899 2900 target->sync_flag = 0; 2901 nsp32_set_async(data, target); 2902 } 2903 2904 /* 2905 * reset SCSI bus 2906 */ 2907 nsp32_write1(base, SCSI_BUS_CONTROL, BUSCTL_RST); 2908 udelay(RESET_HOLD_TIME); 2909 nsp32_write1(base, SCSI_BUS_CONTROL, 0); 2910 for(i = 0; i < 5; i++) { 2911 intrdat = nsp32_read2(base, IRQ_STATUS); /* dummy read */ 2912 nsp32_dbg(NSP32_DEBUG_BUSRESET, "irq:1: 0x%x", intrdat); 2913 } 2914 2915 data->CurrentSC = NULL; 2916} 2917 2918static int nsp32_eh_host_reset(struct scsi_cmnd *SCpnt) 2919{ 2920 struct Scsi_Host *host = SCpnt->device->host; 2921 unsigned int base = SCpnt->device->host->io_port; 2922 nsp32_hw_data *data = (nsp32_hw_data *)host->hostdata; 2923 2924 nsp32_msg(KERN_INFO, "Host Reset"); 2925 nsp32_dbg(NSP32_DEBUG_BUSRESET, "SCpnt=0x%x", SCpnt); 2926 2927 spin_lock_irq(SCpnt->device->host->host_lock); 2928 2929 nsp32hw_init(data); 2930 nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK); 2931 nsp32_do_bus_reset(data); 2932 nsp32_write2(base, IRQ_CONTROL, 0); 2933 2934 spin_unlock_irq(SCpnt->device->host->host_lock); 2935 return SUCCESS; /* Host reset is succeeded at any time. */ 2936} 2937 2938 2939/************************************************************************** 2940 * EEPROM handler 2941 */ 2942 2943/* 2944 * getting EEPROM parameter 2945 */ 2946static int nsp32_getprom_param(nsp32_hw_data *data) 2947{ 2948 int vendor = data->pci_devid->vendor; 2949 int device = data->pci_devid->device; 2950 int ret, val, i; 2951 2952 /* 2953 * EEPROM checking. 2954 */ 2955 ret = nsp32_prom_read(data, 0x7e); 2956 if (ret != 0x55) { 2957 nsp32_msg(KERN_INFO, "No EEPROM detected: 0x%x", ret); 2958 return FALSE; 2959 } 2960 ret = nsp32_prom_read(data, 0x7f); 2961 if (ret != 0xaa) { 2962 nsp32_msg(KERN_INFO, "Invalid number: 0x%x", ret); 2963 return FALSE; 2964 } 2965 2966 /* 2967 * check EEPROM type 2968 */ 2969 if (vendor == PCI_VENDOR_ID_WORKBIT && 2970 device == PCI_DEVICE_ID_WORKBIT_STANDARD) { 2971 ret = nsp32_getprom_c16(data); 2972 } else if (vendor == PCI_VENDOR_ID_WORKBIT && 2973 device == PCI_DEVICE_ID_NINJASCSI_32BIB_LOGITEC) { 2974 ret = nsp32_getprom_at24(data); 2975 } else if (vendor == PCI_VENDOR_ID_WORKBIT && 2976 device == PCI_DEVICE_ID_NINJASCSI_32UDE_MELCO ) { 2977 ret = nsp32_getprom_at24(data); 2978 } else { 2979 nsp32_msg(KERN_WARNING, "Unknown EEPROM"); 2980 ret = FALSE; 2981 } 2982 2983 /* for debug : SPROM data full checking */ 2984 for (i = 0; i <= 0x1f; i++) { 2985 val = nsp32_prom_read(data, i); 2986 nsp32_dbg(NSP32_DEBUG_EEPROM, 2987 "rom address 0x%x : 0x%x", i, val); 2988 } 2989 2990 return ret; 2991} 2992 2993 2994/* 2995 * AT24C01A (Logitec: LHA-600S), AT24C02 (Melco Buffalo: IFC-USLP) data map: 2996 * 2997 * ROMADDR 2998 * 0x00 - 0x06 : Device Synchronous Transfer Period (SCSI ID 0 - 6) 2999 * Value 0x0: ASYNC, 0x0c: Ultra-20M, 0x19: Fast-10M 3000 * 0x07 : HBA Synchronous Transfer Period 3001 * Value 0: AutoSync, 1: Manual Setting 3002 * 0x08 - 0x0f : Not Used? (0x0) 3003 * 0x10 : Bus Termination 3004 * Value 0: Auto[ON], 1: ON, 2: OFF 3005 * 0x11 : Not Used? (0) 3006 * 0x12 : Bus Reset Delay Time (0x03) 3007 * 0x13 : Bootable CD Support 3008 * Value 0: Disable, 1: Enable 3009 * 0x14 : Device Scan 3010 * Bit 7 6 5 4 3 2 1 0 3011 * | <-----------------> 3012 * | SCSI ID: Value 0: Skip, 1: YES 3013 * |-> Value 0: ALL scan, Value 1: Manual 3014 * 0x15 - 0x1b : Not Used? (0) 3015 * 0x1c : Constant? (0x01) (clock div?) 3016 * 0x1d - 0x7c : Not Used (0xff) 3017 * 0x7d : Not Used? (0xff) 3018 * 0x7e : Constant (0x55), Validity signature 3019 * 0x7f : Constant (0xaa), Validity signature 3020 */ 3021static int nsp32_getprom_at24(nsp32_hw_data *data) 3022{ 3023 int ret, i; 3024 int auto_sync; 3025 nsp32_target *target; 3026 int entry; 3027 3028 /* 3029 * Reset time which is designated by EEPROM. 3030 * 3031 * TODO: Not used yet. 3032 */ 3033 data->resettime = nsp32_prom_read(data, 0x12); 3034 3035 /* 3036 * HBA Synchronous Transfer Period 3037 * 3038 * Note: auto_sync = 0: auto, 1: manual. Ninja SCSI HBA spec says 3039 * that if auto_sync is 0 (auto), and connected SCSI devices are 3040 * same or lower than 3, then transfer speed is set as ULTRA-20M. 3041 * On the contrary if connected SCSI devices are same or higher 3042 * than 4, then transfer speed is set as FAST-10M. 3043 * 3044 * I break this rule. The number of connected SCSI devices are 3045 * only ignored. If auto_sync is 0 (auto), then transfer speed is 3046 * forced as ULTRA-20M. 3047 */ 3048 ret = nsp32_prom_read(data, 0x07); 3049 switch (ret) { 3050 case 0: 3051 auto_sync = TRUE; 3052 break; 3053 case 1: 3054 auto_sync = FALSE; 3055 break; 3056 default: 3057 nsp32_msg(KERN_WARNING, 3058 "Unsupported Auto Sync mode. Fall back to manual mode."); 3059 auto_sync = TRUE; 3060 } 3061 3062 if (trans_mode == ULTRA20M_MODE) { 3063 auto_sync = TRUE; 3064 } 3065 3066 /* 3067 * each device Synchronous Transfer Period 3068 */ 3069 for (i = 0; i < NSP32_HOST_SCSIID; i++) { 3070 target = &data->target[i]; 3071 if (auto_sync == TRUE) { 3072 target->limit_entry = 0; /* set as ULTRA20M */ 3073 } else { 3074 ret = nsp32_prom_read(data, i); 3075 entry = nsp32_search_period_entry(data, target, ret); 3076 if (entry < 0) { 3077 /* search failed... set maximum speed */ 3078 entry = 0; 3079 } 3080 target->limit_entry = entry; 3081 } 3082 } 3083 3084 return TRUE; 3085} 3086 3087 3088/* 3089 * C16 110 (I-O Data: SC-NBD) data map: 3090 * 3091 * ROMADDR 3092 * 0x00 - 0x06 : Device Synchronous Transfer Period (SCSI ID 0 - 6) 3093 * Value 0x0: 20MB/S, 0x1: 10MB/S, 0x2: 5MB/S, 0x3: ASYNC 3094 * 0x07 : 0 (HBA Synchronous Transfer Period: Auto Sync) 3095 * 0x08 - 0x0f : Not Used? (0x0) 3096 * 0x10 : Transfer Mode 3097 * Value 0: PIO, 1: Busmater 3098 * 0x11 : Bus Reset Delay Time (0x00-0x20) 3099 * 0x12 : Bus Termination 3100 * Value 0: Disable, 1: Enable 3101 * 0x13 - 0x19 : Disconnection 3102 * Value 0: Disable, 1: Enable 3103 * 0x1a - 0x7c : Not Used? (0) 3104 * 0x7d : Not Used? (0xf8) 3105 * 0x7e : Constant (0x55), Validity signature 3106 * 0x7f : Constant (0xaa), Validity signature 3107 */ 3108static int nsp32_getprom_c16(nsp32_hw_data *data) 3109{ 3110 int ret, i; 3111 nsp32_target *target; 3112 int entry, val; 3113 3114 /* 3115 * Reset time which is designated by EEPROM. 3116 * 3117 * TODO: Not used yet. 3118 */ 3119 data->resettime = nsp32_prom_read(data, 0x11); 3120 3121 /* 3122 * each device Synchronous Transfer Period 3123 */ 3124 for (i = 0; i < NSP32_HOST_SCSIID; i++) { 3125 target = &data->target[i]; 3126 ret = nsp32_prom_read(data, i); 3127 switch (ret) { 3128 case 0: /* 20MB/s */ 3129 val = 0x0c; 3130 break; 3131 case 1: /* 10MB/s */ 3132 val = 0x19; 3133 break; 3134 case 2: /* 5MB/s */ 3135 val = 0x32; 3136 break; 3137 case 3: /* ASYNC */ 3138 val = 0x00; 3139 break; 3140 default: /* default 20MB/s */ 3141 val = 0x0c; 3142 break; 3143 } 3144 entry = nsp32_search_period_entry(data, target, val); 3145 if (entry < 0 || trans_mode == ULTRA20M_MODE) { 3146 /* search failed... set maximum speed */ 3147 entry = 0; 3148 } 3149 target->limit_entry = entry; 3150 } 3151 3152 return TRUE; 3153} 3154 3155 3156/* 3157 * Atmel AT24C01A (drived in 5V) serial EEPROM routines 3158 */ 3159static int nsp32_prom_read(nsp32_hw_data *data, int romaddr) 3160{ 3161 int i, val; 3162 3163 /* start condition */ 3164 nsp32_prom_start(data); 3165 3166 /* device address */ 3167 nsp32_prom_write_bit(data, 1); /* 1 */ 3168 nsp32_prom_write_bit(data, 0); /* 0 */ 3169 nsp32_prom_write_bit(data, 1); /* 1 */ 3170 nsp32_prom_write_bit(data, 0); /* 0 */ 3171 nsp32_prom_write_bit(data, 0); /* A2: 0 (GND) */ 3172 nsp32_prom_write_bit(data, 0); /* A1: 0 (GND) */ 3173 nsp32_prom_write_bit(data, 0); /* A0: 0 (GND) */ 3174 3175 /* R/W: W for dummy write */ 3176 nsp32_prom_write_bit(data, 0); 3177 3178 /* ack */ 3179 nsp32_prom_write_bit(data, 0); 3180 3181 /* word address */ 3182 for (i = 7; i >= 0; i--) { 3183 nsp32_prom_write_bit(data, ((romaddr >> i) & 1)); 3184 } 3185 3186 /* ack */ 3187 nsp32_prom_write_bit(data, 0); 3188 3189 /* start condition */ 3190 nsp32_prom_start(data); 3191 3192 /* device address */ 3193 nsp32_prom_write_bit(data, 1); /* 1 */ 3194 nsp32_prom_write_bit(data, 0); /* 0 */ 3195 nsp32_prom_write_bit(data, 1); /* 1 */ 3196 nsp32_prom_write_bit(data, 0); /* 0 */ 3197 nsp32_prom_write_bit(data, 0); /* A2: 0 (GND) */ 3198 nsp32_prom_write_bit(data, 0); /* A1: 0 (GND) */ 3199 nsp32_prom_write_bit(data, 0); /* A0: 0 (GND) */ 3200 3201 /* R/W: R */ 3202 nsp32_prom_write_bit(data, 1); 3203 3204 /* ack */ 3205 nsp32_prom_write_bit(data, 0); 3206 3207 /* data... */ 3208 val = 0; 3209 for (i = 7; i >= 0; i--) { 3210 val += (nsp32_prom_read_bit(data) << i); 3211 } 3212 3213 /* no ack */ 3214 nsp32_prom_write_bit(data, 1); 3215 3216 /* stop condition */ 3217 nsp32_prom_stop(data); 3218 3219 return val; 3220} 3221 3222static void nsp32_prom_set(nsp32_hw_data *data, int bit, int val) 3223{ 3224 int base = data->BaseAddress; 3225 int tmp; 3226 3227 tmp = nsp32_index_read1(base, SERIAL_ROM_CTL); 3228 3229 if (val == 0) { 3230 tmp &= ~bit; 3231 } else { 3232 tmp |= bit; 3233 } 3234 3235 nsp32_index_write1(base, SERIAL_ROM_CTL, tmp); 3236 3237 udelay(10); 3238} 3239 3240static int nsp32_prom_get(nsp32_hw_data *data, int bit) 3241{ 3242 int base = data->BaseAddress; 3243 int tmp, ret; 3244 3245 if (bit != SDA) { 3246 nsp32_msg(KERN_ERR, "return value is not appropriate"); 3247 return 0; 3248 } 3249 3250 3251 tmp = nsp32_index_read1(base, SERIAL_ROM_CTL) & bit; 3252 3253 if (tmp == 0) { 3254 ret = 0; 3255 } else { 3256 ret = 1; 3257 } 3258 3259 udelay(10); 3260 3261 return ret; 3262} 3263 3264static void nsp32_prom_start (nsp32_hw_data *data) 3265{ 3266 /* start condition */ 3267 nsp32_prom_set(data, SCL, 1); 3268 nsp32_prom_set(data, SDA, 1); 3269 nsp32_prom_set(data, ENA, 1); /* output mode */ 3270 nsp32_prom_set(data, SDA, 0); /* keeping SCL=1 and transiting 3271 * SDA 1->0 is start condition */ 3272 nsp32_prom_set(data, SCL, 0); 3273} 3274 3275static void nsp32_prom_stop (nsp32_hw_data *data) 3276{ 3277 /* stop condition */ 3278 nsp32_prom_set(data, SCL, 1); 3279 nsp32_prom_set(data, SDA, 0); 3280 nsp32_prom_set(data, ENA, 1); /* output mode */ 3281 nsp32_prom_set(data, SDA, 1); 3282 nsp32_prom_set(data, SCL, 0); 3283} 3284 3285static void nsp32_prom_write_bit(nsp32_hw_data *data, int val) 3286{ 3287 /* write */ 3288 nsp32_prom_set(data, SDA, val); 3289 nsp32_prom_set(data, SCL, 1 ); 3290 nsp32_prom_set(data, SCL, 0 ); 3291} 3292 3293static int nsp32_prom_read_bit(nsp32_hw_data *data) 3294{ 3295 int val; 3296 3297 /* read */ 3298 nsp32_prom_set(data, ENA, 0); /* input mode */ 3299 nsp32_prom_set(data, SCL, 1); 3300 3301 val = nsp32_prom_get(data, SDA); 3302 3303 nsp32_prom_set(data, SCL, 0); 3304 nsp32_prom_set(data, ENA, 1); /* output mode */ 3305 3306 return val; 3307} 3308 3309 3310/************************************************************************** 3311 * Power Management 3312 */ 3313#ifdef CONFIG_PM 3314 3315/* Device suspended */ 3316static int nsp32_suspend(struct pci_dev *pdev, pm_message_t state) 3317{ 3318 struct Scsi_Host *host = pci_get_drvdata(pdev); 3319 3320 nsp32_msg(KERN_INFO, "pci-suspend: pdev=0x%p, state=%ld, slot=%s, host=0x%p", pdev, state, pci_name(pdev), host); 3321 3322 pci_save_state (pdev); 3323 pci_disable_device (pdev); 3324 pci_set_power_state(pdev, pci_choose_state(pdev, state)); 3325 3326 return 0; 3327} 3328 3329/* Device woken up */ 3330static int nsp32_resume(struct pci_dev *pdev) 3331{ 3332 struct Scsi_Host *host = pci_get_drvdata(pdev); 3333 nsp32_hw_data *data = (nsp32_hw_data *)host->hostdata; 3334 unsigned short reg; 3335 3336 nsp32_msg(KERN_INFO, "pci-resume: pdev=0x%p, slot=%s, host=0x%p", pdev, pci_name(pdev), host); 3337 3338 pci_set_power_state(pdev, PCI_D0); 3339 pci_enable_wake (pdev, PCI_D0, 0); 3340 pci_restore_state (pdev); 3341 3342 reg = nsp32_read2(data->BaseAddress, INDEX_REG); 3343 3344 nsp32_msg(KERN_INFO, "io=0x%x reg=0x%x", data->BaseAddress, reg); 3345 3346 if (reg == 0xffff) { 3347 nsp32_msg(KERN_INFO, "missing device. abort resume."); 3348 return 0; 3349 } 3350 3351 nsp32hw_init (data); 3352 nsp32_do_bus_reset(data); 3353 3354 nsp32_msg(KERN_INFO, "resume success"); 3355 3356 return 0; 3357} 3358 3359#endif 3360 3361/************************************************************************ 3362 * PCI/Cardbus probe/remove routine 3363 */ 3364static int __devinit nsp32_probe(struct pci_dev *pdev, const struct pci_device_id *id) 3365{ 3366 int ret; 3367 nsp32_hw_data *data = &nsp32_data_base; 3368 3369 nsp32_dbg(NSP32_DEBUG_REGISTER, "enter"); 3370 3371 ret = pci_enable_device(pdev); 3372 if (ret) { 3373 nsp32_msg(KERN_ERR, "failed to enable pci device"); 3374 return ret; 3375 } 3376 3377 data->Pci = pdev; 3378 data->pci_devid = id; 3379 data->IrqNumber = pdev->irq; 3380 data->BaseAddress = pci_resource_start(pdev, 0); 3381 data->NumAddress = pci_resource_len (pdev, 0); 3382 data->MmioAddress = pci_ioremap_bar(pdev, 1); 3383 data->MmioLength = pci_resource_len (pdev, 1); 3384 3385 pci_set_master(pdev); 3386 3387 ret = nsp32_detect(pdev); 3388 3389 nsp32_msg(KERN_INFO, "irq: %i mmio: %p+0x%lx slot: %s model: %s", 3390 pdev->irq, 3391 data->MmioAddress, data->MmioLength, 3392 pci_name(pdev), 3393 nsp32_model[id->driver_data]); 3394 3395 nsp32_dbg(NSP32_DEBUG_REGISTER, "exit %d", ret); 3396 3397 return ret; 3398} 3399 3400static void __devexit nsp32_remove(struct pci_dev *pdev) 3401{ 3402 struct Scsi_Host *host = pci_get_drvdata(pdev); 3403 3404 nsp32_dbg(NSP32_DEBUG_REGISTER, "enter"); 3405 3406 scsi_remove_host(host); 3407 3408 nsp32_release(host); 3409 3410 scsi_host_put(host); 3411} 3412 3413static struct pci_driver nsp32_driver = { 3414 .name = "nsp32", 3415 .id_table = nsp32_pci_table, 3416 .probe = nsp32_probe, 3417 .remove = __devexit_p(nsp32_remove), 3418#ifdef CONFIG_PM 3419 .suspend = nsp32_suspend, 3420 .resume = nsp32_resume, 3421#endif 3422}; 3423 3424/********************************************************************* 3425 * Moule entry point 3426 */ 3427static int __init init_nsp32(void) { 3428 nsp32_msg(KERN_INFO, "loading..."); 3429 return pci_register_driver(&nsp32_driver); 3430} 3431 3432static void __exit exit_nsp32(void) { 3433 nsp32_msg(KERN_INFO, "unloading..."); 3434 pci_unregister_driver(&nsp32_driver); 3435} 3436 3437module_init(init_nsp32); 3438module_exit(exit_nsp32); 3439 3440/* end */ 3441