1/* 2 * Initio A100 device driver for Linux. 3 * 4 * Copyright (c) 1994-1998 Initio Corporation 5 * Copyright (c) 2003-2004 Christoph Hellwig 6 * All rights reserved. 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License as published by 10 * the Free Software Foundation; either version 2, or (at your option) 11 * any later version. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * You should have received a copy of the GNU General Public License 19 * along with this program; see the file COPYING. If not, write to 20 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 26 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 */ 34 35/* 36 * Revision History: 37 * 07/02/98 hl - v.91n Initial drivers. 38 * 09/14/98 hl - v1.01 Support new Kernel. 39 * 09/22/98 hl - v1.01a Support reset. 40 * 09/24/98 hl - v1.01b Fixed reset. 41 * 10/05/98 hl - v1.02 split the source code and release. 42 * 12/19/98 bv - v1.02a Use spinlocks for 2.1.95 and up 43 * 01/31/99 bv - v1.02b Use mdelay instead of waitForPause 44 * 08/08/99 bv - v1.02c Use waitForPause again. 45 * 06/25/02 Doug Ledford <dledford@redhat.com> - v1.02d 46 * - Remove limit on number of controllers 47 * - Port to DMA mapping API 48 * - Clean up interrupt handler registration 49 * - Fix memory leaks 50 * - Fix allocation of scsi host structs and private data 51 * 11/18/03 Christoph Hellwig <hch@lst.de> 52 * - Port to new probing API 53 * - Fix some more leaks in init failure cases 54 * 9/28/04 Christoph Hellwig <hch@lst.de> 55 * - merge the two source files 56 * - remove internal queueing code 57 * 14/06/07 Alan Cox <alan@lxorguk.ukuu.org.uk> 58 * - Grand cleanup and Linuxisation 59 */ 60 61#include <linux/module.h> 62#include <linux/errno.h> 63#include <linux/delay.h> 64#include <linux/interrupt.h> 65#include <linux/pci.h> 66#include <linux/init.h> 67#include <linux/blkdev.h> 68#include <linux/spinlock.h> 69#include <linux/kernel.h> 70#include <linux/string.h> 71#include <linux/ioport.h> 72#include <linux/dma-mapping.h> 73 74#include <asm/io.h> 75#include <asm/irq.h> 76 77#include <scsi/scsi.h> 78#include <scsi/scsi_cmnd.h> 79#include <scsi/scsi_device.h> 80#include <scsi/scsi_host.h> 81 82#include "a100u2w.h" 83 84 85static struct orc_scb *__orc_alloc_scb(struct orc_host * host); 86static void inia100_scb_handler(struct orc_host *host, struct orc_scb *scb); 87 88static struct orc_nvram nvram, *nvramp = &nvram; 89 90static u8 default_nvram[64] = 91{ 92/*----------header -------------*/ 93 0x01, /* 0x00: Sub System Vendor ID 0 */ 94 0x11, /* 0x01: Sub System Vendor ID 1 */ 95 0x60, /* 0x02: Sub System ID 0 */ 96 0x10, /* 0x03: Sub System ID 1 */ 97 0x00, /* 0x04: SubClass */ 98 0x01, /* 0x05: Vendor ID 0 */ 99 0x11, /* 0x06: Vendor ID 1 */ 100 0x60, /* 0x07: Device ID 0 */ 101 0x10, /* 0x08: Device ID 1 */ 102 0x00, /* 0x09: Reserved */ 103 0x00, /* 0x0A: Reserved */ 104 0x01, /* 0x0B: Revision of Data Structure */ 105 /* -- Host Adapter Structure --- */ 106 0x01, /* 0x0C: Number Of SCSI Channel */ 107 0x01, /* 0x0D: BIOS Configuration 1 */ 108 0x00, /* 0x0E: BIOS Configuration 2 */ 109 0x00, /* 0x0F: BIOS Configuration 3 */ 110 /* --- SCSI Channel 0 Configuration --- */ 111 0x07, /* 0x10: H/A ID */ 112 0x83, /* 0x11: Channel Configuration */ 113 0x20, /* 0x12: MAX TAG per target */ 114 0x0A, /* 0x13: SCSI Reset Recovering time */ 115 0x00, /* 0x14: Channel Configuration4 */ 116 0x00, /* 0x15: Channel Configuration5 */ 117 /* SCSI Channel 0 Target Configuration */ 118 /* 0x16-0x25 */ 119 0xC8, 0xC8, 0xC8, 0xC8, 0xC8, 0xC8, 0xC8, 0xC8, 120 0xC8, 0xC8, 0xC8, 0xC8, 0xC8, 0xC8, 0xC8, 0xC8, 121 /* --- SCSI Channel 1 Configuration --- */ 122 0x07, /* 0x26: H/A ID */ 123 0x83, /* 0x27: Channel Configuration */ 124 0x20, /* 0x28: MAX TAG per target */ 125 0x0A, /* 0x29: SCSI Reset Recovering time */ 126 0x00, /* 0x2A: Channel Configuration4 */ 127 0x00, /* 0x2B: Channel Configuration5 */ 128 /* SCSI Channel 1 Target Configuration */ 129 /* 0x2C-0x3B */ 130 0xC8, 0xC8, 0xC8, 0xC8, 0xC8, 0xC8, 0xC8, 0xC8, 131 0xC8, 0xC8, 0xC8, 0xC8, 0xC8, 0xC8, 0xC8, 0xC8, 132 0x00, /* 0x3C: Reserved */ 133 0x00, /* 0x3D: Reserved */ 134 0x00, /* 0x3E: Reserved */ 135 0x00 /* 0x3F: Checksum */ 136}; 137 138 139static u8 wait_chip_ready(struct orc_host * host) 140{ 141 int i; 142 143 for (i = 0; i < 10; i++) { /* Wait 1 second for report timeout */ 144 if (inb(host->base + ORC_HCTRL) & HOSTSTOP) /* Wait HOSTSTOP set */ 145 return 1; 146 mdelay(100); 147 } 148 return 0; 149} 150 151static u8 wait_firmware_ready(struct orc_host * host) 152{ 153 int i; 154 155 for (i = 0; i < 10; i++) { /* Wait 1 second for report timeout */ 156 if (inb(host->base + ORC_HSTUS) & RREADY) /* Wait READY set */ 157 return 1; 158 mdelay(100); /* wait 100ms before try again */ 159 } 160 return 0; 161} 162 163/***************************************************************************/ 164static u8 wait_scsi_reset_done(struct orc_host * host) 165{ 166 int i; 167 168 for (i = 0; i < 10; i++) { /* Wait 1 second for report timeout */ 169 if (!(inb(host->base + ORC_HCTRL) & SCSIRST)) /* Wait SCSIRST done */ 170 return 1; 171 mdelay(100); /* wait 100ms before try again */ 172 } 173 return 0; 174} 175 176/***************************************************************************/ 177static u8 wait_HDO_off(struct orc_host * host) 178{ 179 int i; 180 181 for (i = 0; i < 10; i++) { /* Wait 1 second for report timeout */ 182 if (!(inb(host->base + ORC_HCTRL) & HDO)) /* Wait HDO off */ 183 return 1; 184 mdelay(100); /* wait 100ms before try again */ 185 } 186 return 0; 187} 188 189/***************************************************************************/ 190static u8 wait_hdi_set(struct orc_host * host, u8 * data) 191{ 192 int i; 193 194 for (i = 0; i < 10; i++) { /* Wait 1 second for report timeout */ 195 if ((*data = inb(host->base + ORC_HSTUS)) & HDI) 196 return 1; /* Wait HDI set */ 197 mdelay(100); /* wait 100ms before try again */ 198 } 199 return 0; 200} 201 202/***************************************************************************/ 203static unsigned short orc_read_fwrev(struct orc_host * host) 204{ 205 u16 version; 206 u8 data; 207 208 outb(ORC_CMD_VERSION, host->base + ORC_HDATA); 209 outb(HDO, host->base + ORC_HCTRL); 210 if (wait_HDO_off(host) == 0) /* Wait HDO off */ 211 return 0; 212 213 if (wait_hdi_set(host, &data) == 0) /* Wait HDI set */ 214 return 0; 215 version = inb(host->base + ORC_HDATA); 216 outb(data, host->base + ORC_HSTUS); /* Clear HDI */ 217 218 if (wait_hdi_set(host, &data) == 0) /* Wait HDI set */ 219 return 0; 220 version |= inb(host->base + ORC_HDATA) << 8; 221 outb(data, host->base + ORC_HSTUS); /* Clear HDI */ 222 223 return version; 224} 225 226/***************************************************************************/ 227static u8 orc_nv_write(struct orc_host * host, unsigned char address, unsigned char value) 228{ 229 outb(ORC_CMD_SET_NVM, host->base + ORC_HDATA); /* Write command */ 230 outb(HDO, host->base + ORC_HCTRL); 231 if (wait_HDO_off(host) == 0) /* Wait HDO off */ 232 return 0; 233 234 outb(address, host->base + ORC_HDATA); /* Write address */ 235 outb(HDO, host->base + ORC_HCTRL); 236 if (wait_HDO_off(host) == 0) /* Wait HDO off */ 237 return 0; 238 239 outb(value, host->base + ORC_HDATA); /* Write value */ 240 outb(HDO, host->base + ORC_HCTRL); 241 if (wait_HDO_off(host) == 0) /* Wait HDO off */ 242 return 0; 243 244 return 1; 245} 246 247/***************************************************************************/ 248static u8 orc_nv_read(struct orc_host * host, u8 address, u8 *ptr) 249{ 250 unsigned char data; 251 252 outb(ORC_CMD_GET_NVM, host->base + ORC_HDATA); /* Write command */ 253 outb(HDO, host->base + ORC_HCTRL); 254 if (wait_HDO_off(host) == 0) /* Wait HDO off */ 255 return 0; 256 257 outb(address, host->base + ORC_HDATA); /* Write address */ 258 outb(HDO, host->base + ORC_HCTRL); 259 if (wait_HDO_off(host) == 0) /* Wait HDO off */ 260 return 0; 261 262 if (wait_hdi_set(host, &data) == 0) /* Wait HDI set */ 263 return 0; 264 *ptr = inb(host->base + ORC_HDATA); 265 outb(data, host->base + ORC_HSTUS); /* Clear HDI */ 266 267 return 1; 268 269} 270 271/** 272 * orc_exec_sb - Queue an SCB with the HA 273 * @host: host adapter the SCB belongs to 274 * @scb: SCB to queue for execution 275 */ 276 277static void orc_exec_scb(struct orc_host * host, struct orc_scb * scb) 278{ 279 scb->status = ORCSCB_POST; 280 outb(scb->scbidx, host->base + ORC_PQUEUE); 281} 282 283 284/** 285 * se2_rd_all - read SCSI parameters from EEPROM 286 * @host: Host whose EEPROM is being loaded 287 * 288 * Read SCSI H/A configuration parameters from serial EEPROM 289 */ 290 291static int se2_rd_all(struct orc_host * host) 292{ 293 int i; 294 u8 *np, chksum = 0; 295 296 np = (u8 *) nvramp; 297 for (i = 0; i < 64; i++, np++) { /* <01> */ 298 if (orc_nv_read(host, (u8) i, np) == 0) 299 return -1; 300 } 301 302 /*------ Is ckecksum ok ? ------*/ 303 np = (u8 *) nvramp; 304 for (i = 0; i < 63; i++) 305 chksum += *np++; 306 307 if (nvramp->CheckSum != (u8) chksum) 308 return -1; 309 return 1; 310} 311 312/** 313 * se2_update_all - update the EEPROM 314 * @host: Host whose EEPROM is being updated 315 * 316 * Update changed bytes in the EEPROM image. 317 */ 318 319static void se2_update_all(struct orc_host * host) 320{ /* setup default pattern */ 321 int i; 322 u8 *np, *np1, chksum = 0; 323 324 /* Calculate checksum first */ 325 np = (u8 *) default_nvram; 326 for (i = 0; i < 63; i++) 327 chksum += *np++; 328 *np = chksum; 329 330 np = (u8 *) default_nvram; 331 np1 = (u8 *) nvramp; 332 for (i = 0; i < 64; i++, np++, np1++) { 333 if (*np != *np1) 334 orc_nv_write(host, (u8) i, *np); 335 } 336} 337 338/** 339 * read_eeprom - load EEPROM 340 * @host: Host EEPROM to read 341 * 342 * Read the EEPROM for a given host. If it is invalid or fails 343 * the restore the defaults and use them. 344 */ 345 346static void read_eeprom(struct orc_host * host) 347{ 348 if (se2_rd_all(host) != 1) { 349 se2_update_all(host); /* setup default pattern */ 350 se2_rd_all(host); /* load again */ 351 } 352} 353 354 355/** 356 * orc_load_firmware - initialise firmware 357 * @host: Host to set up 358 * 359 * Load the firmware from the EEPROM into controller SRAM. This 360 * is basically a 4K block copy and then a 4K block read to check 361 * correctness. The rest is convulted by the indirect interfaces 362 * in the hardware 363 */ 364 365static u8 orc_load_firmware(struct orc_host * host) 366{ 367 u32 data32; 368 u16 bios_addr; 369 u16 i; 370 u8 *data32_ptr, data; 371 372 373 /* Set up the EEPROM for access */ 374 375 data = inb(host->base + ORC_GCFG); 376 outb(data | EEPRG, host->base + ORC_GCFG); /* Enable EEPROM programming */ 377 outb(0x00, host->base + ORC_EBIOSADR2); 378 outw(0x0000, host->base + ORC_EBIOSADR0); 379 if (inb(host->base + ORC_EBIOSDATA) != 0x55) { 380 outb(data, host->base + ORC_GCFG); /* Disable EEPROM programming */ 381 return 0; 382 } 383 outw(0x0001, host->base + ORC_EBIOSADR0); 384 if (inb(host->base + ORC_EBIOSDATA) != 0xAA) { 385 outb(data, host->base + ORC_GCFG); /* Disable EEPROM programming */ 386 return 0; 387 } 388 389 outb(PRGMRST | DOWNLOAD, host->base + ORC_RISCCTL); /* Enable SRAM programming */ 390 data32_ptr = (u8 *) & data32; 391 data32 = cpu_to_le32(0); /* Initial FW address to 0 */ 392 outw(0x0010, host->base + ORC_EBIOSADR0); 393 *data32_ptr = inb(host->base + ORC_EBIOSDATA); /* Read from BIOS */ 394 outw(0x0011, host->base + ORC_EBIOSADR0); 395 *(data32_ptr + 1) = inb(host->base + ORC_EBIOSDATA); /* Read from BIOS */ 396 outw(0x0012, host->base + ORC_EBIOSADR0); 397 *(data32_ptr + 2) = inb(host->base + ORC_EBIOSDATA); /* Read from BIOS */ 398 outw(*(data32_ptr + 2), host->base + ORC_EBIOSADR2); 399 outl(le32_to_cpu(data32), host->base + ORC_FWBASEADR); /* Write FW address */ 400 401 /* Copy the code from the BIOS to the SRAM */ 402 403 udelay(500); /* Required on Sun Ultra 5 ... 350 -> failures */ 404 bios_addr = (u16) le32_to_cpu(data32); /* FW code locate at BIOS address + ? */ 405 for (i = 0, data32_ptr = (u8 *) & data32; /* Download the code */ 406 i < 0x1000; /* Firmware code size = 4K */ 407 i++, bios_addr++) { 408 outw(bios_addr, host->base + ORC_EBIOSADR0); 409 *data32_ptr++ = inb(host->base + ORC_EBIOSDATA); /* Read from BIOS */ 410 if ((i % 4) == 3) { 411 outl(le32_to_cpu(data32), host->base + ORC_RISCRAM); /* Write every 4 bytes */ 412 data32_ptr = (u8 *) & data32; 413 } 414 } 415 416 /* Go back and check they match */ 417 418 outb(PRGMRST | DOWNLOAD, host->base + ORC_RISCCTL); /* Reset program count 0 */ 419 bios_addr -= 0x1000; /* Reset the BIOS adddress */ 420 for (i = 0, data32_ptr = (u8 *) & data32; /* Check the code */ 421 i < 0x1000; /* Firmware code size = 4K */ 422 i++, bios_addr++) { 423 outw(bios_addr, host->base + ORC_EBIOSADR0); 424 *data32_ptr++ = inb(host->base + ORC_EBIOSDATA); /* Read from BIOS */ 425 if ((i % 4) == 3) { 426 if (inl(host->base + ORC_RISCRAM) != le32_to_cpu(data32)) { 427 outb(PRGMRST, host->base + ORC_RISCCTL); /* Reset program to 0 */ 428 outb(data, host->base + ORC_GCFG); /*Disable EEPROM programming */ 429 return 0; 430 } 431 data32_ptr = (u8 *) & data32; 432 } 433 } 434 435 /* Success */ 436 outb(PRGMRST, host->base + ORC_RISCCTL); /* Reset program to 0 */ 437 outb(data, host->base + ORC_GCFG); /* Disable EEPROM programming */ 438 return 1; 439} 440 441/***************************************************************************/ 442static void setup_SCBs(struct orc_host * host) 443{ 444 struct orc_scb *scb; 445 int i; 446 struct orc_extended_scb *escb; 447 dma_addr_t escb_phys; 448 449 /* Setup SCB base and SCB Size registers */ 450 outb(ORC_MAXQUEUE, host->base + ORC_SCBSIZE); /* Total number of SCBs */ 451 /* SCB base address 0 */ 452 outl(host->scb_phys, host->base + ORC_SCBBASE0); 453 /* SCB base address 1 */ 454 outl(host->scb_phys, host->base + ORC_SCBBASE1); 455 456 /* setup scatter list address with one buffer */ 457 scb = host->scb_virt; 458 escb = host->escb_virt; 459 460 for (i = 0; i < ORC_MAXQUEUE; i++) { 461 escb_phys = (host->escb_phys + (sizeof(struct orc_extended_scb) * i)); 462 scb->sg_addr = cpu_to_le32((u32) escb_phys); 463 scb->sense_addr = cpu_to_le32((u32) escb_phys); 464 scb->escb = escb; 465 scb->scbidx = i; 466 scb++; 467 escb++; 468 } 469} 470 471/** 472 * init_alloc_map - initialise allocation map 473 * @host: host map to configure 474 * 475 * Initialise the allocation maps for this device. If the device 476 * is not quiescent the caller must hold the allocation lock 477 */ 478 479static void init_alloc_map(struct orc_host * host) 480{ 481 u8 i, j; 482 483 for (i = 0; i < MAX_CHANNELS; i++) { 484 for (j = 0; j < 8; j++) { 485 host->allocation_map[i][j] = 0xffffffff; 486 } 487 } 488} 489 490/** 491 * init_orchid - initialise the host adapter 492 * @host:host adapter to initialise 493 * 494 * Initialise the controller and if necessary load the firmware. 495 * 496 * Returns -1 if the initialisation fails. 497 */ 498 499static int init_orchid(struct orc_host * host) 500{ 501 u8 *ptr; 502 u16 revision; 503 u8 i; 504 505 init_alloc_map(host); 506 outb(0xFF, host->base + ORC_GIMSK); /* Disable all interrupts */ 507 508 if (inb(host->base + ORC_HSTUS) & RREADY) { /* Orchid is ready */ 509 revision = orc_read_fwrev(host); 510 if (revision == 0xFFFF) { 511 outb(DEVRST, host->base + ORC_HCTRL); /* Reset Host Adapter */ 512 if (wait_chip_ready(host) == 0) 513 return -1; 514 orc_load_firmware(host); /* Download FW */ 515 setup_SCBs(host); /* Setup SCB base and SCB Size registers */ 516 outb(0x00, host->base + ORC_HCTRL); /* clear HOSTSTOP */ 517 if (wait_firmware_ready(host) == 0) 518 return -1; 519 /* Wait for firmware ready */ 520 } else { 521 setup_SCBs(host); /* Setup SCB base and SCB Size registers */ 522 } 523 } else { /* Orchid is not Ready */ 524 outb(DEVRST, host->base + ORC_HCTRL); /* Reset Host Adapter */ 525 if (wait_chip_ready(host) == 0) 526 return -1; 527 orc_load_firmware(host); /* Download FW */ 528 setup_SCBs(host); /* Setup SCB base and SCB Size registers */ 529 outb(HDO, host->base + ORC_HCTRL); /* Do Hardware Reset & */ 530 531 /* clear HOSTSTOP */ 532 if (wait_firmware_ready(host) == 0) /* Wait for firmware ready */ 533 return -1; 534 } 535 536 /* Load an EEProm copy into RAM */ 537 /* Assumes single threaded at this point */ 538 read_eeprom(host); 539 540 if (nvramp->revision != 1) 541 return -1; 542 543 host->scsi_id = nvramp->scsi_id; 544 host->BIOScfg = nvramp->BIOSConfig1; 545 host->max_targets = MAX_TARGETS; 546 ptr = (u8 *) & (nvramp->Target00Config); 547 for (i = 0; i < 16; ptr++, i++) { 548 host->target_flag[i] = *ptr; 549 host->max_tags[i] = ORC_MAXTAGS; 550 } 551 552 if (nvramp->SCSI0Config & NCC_BUSRESET) 553 host->flags |= HCF_SCSI_RESET; 554 outb(0xFB, host->base + ORC_GIMSK); /* enable RP FIFO interrupt */ 555 return 0; 556} 557 558/** 559 * orc_reset_scsi_bus - perform bus reset 560 * @host: host being reset 561 * 562 * Perform a full bus reset on the adapter. 563 */ 564 565static int orc_reset_scsi_bus(struct orc_host * host) 566{ /* I need Host Control Block Information */ 567 unsigned long flags; 568 569 spin_lock_irqsave(&host->allocation_lock, flags); 570 571 init_alloc_map(host); 572 /* reset scsi bus */ 573 outb(SCSIRST, host->base + ORC_HCTRL); 574 if (wait_scsi_reset_done(host) == 0) { 575 spin_unlock_irqrestore(&host->allocation_lock, flags); 576 return FAILED; 577 } else { 578 spin_unlock_irqrestore(&host->allocation_lock, flags); 579 return SUCCESS; 580 } 581} 582 583/** 584 * orc_device_reset - device reset handler 585 * @host: host to reset 586 * @cmd: command causing the reset 587 * @target; target device 588 * 589 * Reset registers, reset a hanging bus and kill active and disconnected 590 * commands for target w/o soft reset 591 */ 592 593static int orc_device_reset(struct orc_host * host, struct scsi_cmnd *cmd, unsigned int target) 594{ /* I need Host Control Block Information */ 595 struct orc_scb *scb; 596 struct orc_extended_scb *escb; 597 struct orc_scb *host_scb; 598 u8 i; 599 unsigned long flags; 600 601 spin_lock_irqsave(&(host->allocation_lock), flags); 602 scb = (struct orc_scb *) NULL; 603 escb = (struct orc_extended_scb *) NULL; 604 605 /* setup scatter list address with one buffer */ 606 host_scb = host->scb_virt; 607 608 init_alloc_map(host); 609 610 /* Find the scb corresponding to the command */ 611 for (i = 0; i < ORC_MAXQUEUE; i++) { 612 escb = host_scb->escb; 613 if (host_scb->status && escb->srb == cmd) 614 break; 615 host_scb++; 616 } 617 618 if (i == ORC_MAXQUEUE) { 619 printk(KERN_ERR "Unable to Reset - No SCB Found\n"); 620 spin_unlock_irqrestore(&(host->allocation_lock), flags); 621 return FAILED; 622 } 623 624 /* Allocate a new SCB for the reset command to the firmware */ 625 if ((scb = __orc_alloc_scb(host)) == NULL) { 626 /* Can't happen.. */ 627 spin_unlock_irqrestore(&(host->allocation_lock), flags); 628 return FAILED; 629 } 630 631 /* Reset device is handled by the firmware, we fill in an SCB and 632 fire it at the controller, it does the rest */ 633 scb->opcode = ORC_BUSDEVRST; 634 scb->target = target; 635 scb->hastat = 0; 636 scb->tastat = 0; 637 scb->status = 0x0; 638 scb->link = 0xFF; 639 scb->reserved0 = 0; 640 scb->reserved1 = 0; 641 scb->xferlen = cpu_to_le32(0); 642 scb->sg_len = cpu_to_le32(0); 643 644 escb->srb = NULL; 645 escb->srb = cmd; 646 orc_exec_scb(host, scb); /* Start execute SCB */ 647 spin_unlock_irqrestore(&host->allocation_lock, flags); 648 return SUCCESS; 649} 650 651/** 652 * __orc_alloc_scb - allocate an SCB 653 * @host: host to allocate from 654 * 655 * Allocate an SCB and return a pointer to the SCB object. NULL 656 * is returned if no SCB is free. The caller must already hold 657 * the allocator lock at this point. 658 */ 659 660 661static struct orc_scb *__orc_alloc_scb(struct orc_host * host) 662{ 663 u8 channel; 664 unsigned long idx; 665 u8 index; 666 u8 i; 667 668 channel = host->index; 669 for (i = 0; i < 8; i++) { 670 for (index = 0; index < 32; index++) { 671 if ((host->allocation_map[channel][i] >> index) & 0x01) { 672 host->allocation_map[channel][i] &= ~(1 << index); 673 idx = index + 32 * i; 674 /* 675 * Translate the index to a structure instance 676 */ 677 return host->scb_virt + idx; 678 } 679 } 680 } 681 return NULL; 682} 683 684/** 685 * orc_alloc_scb - allocate an SCB 686 * @host: host to allocate from 687 * 688 * Allocate an SCB and return a pointer to the SCB object. NULL 689 * is returned if no SCB is free. 690 */ 691 692static struct orc_scb *orc_alloc_scb(struct orc_host * host) 693{ 694 struct orc_scb *scb; 695 unsigned long flags; 696 697 spin_lock_irqsave(&host->allocation_lock, flags); 698 scb = __orc_alloc_scb(host); 699 spin_unlock_irqrestore(&host->allocation_lock, flags); 700 return scb; 701} 702 703/** 704 * orc_release_scb - release an SCB 705 * @host: host owning the SCB 706 * @scb: SCB that is now free 707 * 708 * Called to return a completed SCB to the allocation pool. Before 709 * calling the SCB must be out of use on both the host and the HA. 710 */ 711 712static void orc_release_scb(struct orc_host *host, struct orc_scb *scb) 713{ 714 unsigned long flags; 715 u8 index, i, channel; 716 717 spin_lock_irqsave(&(host->allocation_lock), flags); 718 channel = host->index; /* Channel */ 719 index = scb->scbidx; 720 i = index / 32; 721 index %= 32; 722 host->allocation_map[channel][i] |= (1 << index); 723 spin_unlock_irqrestore(&(host->allocation_lock), flags); 724} 725 726/** 727 * orchid_abort_scb - abort a command 728 * 729 * Abort a queued command that has been passed to the firmware layer 730 * if possible. This is all handled by the firmware. We aks the firmware 731 * and it either aborts the command or fails 732 */ 733 734static int orchid_abort_scb(struct orc_host * host, struct orc_scb * scb) 735{ 736 unsigned char data, status; 737 738 outb(ORC_CMD_ABORT_SCB, host->base + ORC_HDATA); /* Write command */ 739 outb(HDO, host->base + ORC_HCTRL); 740 if (wait_HDO_off(host) == 0) /* Wait HDO off */ 741 return 0; 742 743 outb(scb->scbidx, host->base + ORC_HDATA); /* Write address */ 744 outb(HDO, host->base + ORC_HCTRL); 745 if (wait_HDO_off(host) == 0) /* Wait HDO off */ 746 return 0; 747 748 if (wait_hdi_set(host, &data) == 0) /* Wait HDI set */ 749 return 0; 750 status = inb(host->base + ORC_HDATA); 751 outb(data, host->base + ORC_HSTUS); /* Clear HDI */ 752 753 if (status == 1) /* 0 - Successfully */ 754 return 0; /* 1 - Fail */ 755 return 1; 756} 757 758static int inia100_abort_cmd(struct orc_host * host, struct scsi_cmnd *cmd) 759{ 760 struct orc_extended_scb *escb; 761 struct orc_scb *scb; 762 u8 i; 763 unsigned long flags; 764 765 spin_lock_irqsave(&(host->allocation_lock), flags); 766 767 scb = host->scb_virt; 768 769 /* Walk the queue until we find the SCB that belongs to the command 770 block. This isn't a performance critical path so a walk in the park 771 here does no harm */ 772 773 for (i = 0; i < ORC_MAXQUEUE; i++, scb++) { 774 escb = scb->escb; 775 if (scb->status && escb->srb == cmd) { 776 if (scb->tag_msg == 0) { 777 goto out; 778 } else { 779 /* Issue an ABORT to the firmware */ 780 if (orchid_abort_scb(host, scb)) { 781 escb->srb = NULL; 782 spin_unlock_irqrestore(&host->allocation_lock, flags); 783 return SUCCESS; 784 } else 785 goto out; 786 } 787 } 788 } 789out: 790 spin_unlock_irqrestore(&host->allocation_lock, flags); 791 return FAILED; 792} 793 794/** 795 * orc_interrupt - IRQ processing 796 * @host: Host causing the interrupt 797 * 798 * This function is called from the IRQ handler and protected 799 * by the host lock. While the controller reports that there are 800 * scb's for processing we pull them off the controller, turn the 801 * index into a host address pointer to the scb and call the scb 802 * handler. 803 * 804 * Returns IRQ_HANDLED if any SCBs were processed, IRQ_NONE otherwise 805 */ 806 807static irqreturn_t orc_interrupt(struct orc_host * host) 808{ 809 u8 scb_index; 810 struct orc_scb *scb; 811 812 /* Check if we have an SCB queued for servicing */ 813 if (inb(host->base + ORC_RQUEUECNT) == 0) 814 return IRQ_NONE; 815 816 do { 817 /* Get the SCB index of the SCB to service */ 818 scb_index = inb(host->base + ORC_RQUEUE); 819 820 /* Translate it back to a host pointer */ 821 scb = (struct orc_scb *) ((unsigned long) host->scb_virt + (unsigned long) (sizeof(struct orc_scb) * scb_index)); 822 scb->status = 0x0; 823 /* Process the SCB */ 824 inia100_scb_handler(host, scb); 825 } while (inb(host->base + ORC_RQUEUECNT)); 826 return IRQ_HANDLED; 827} /* End of I1060Interrupt() */ 828 829/** 830 * inia100_build_scb - build SCB 831 * @host: host owing the control block 832 * @scb: control block to use 833 * @cmd: Mid layer command 834 * 835 * Build a host adapter control block from the SCSI mid layer command 836 */ 837 838static int inia100_build_scb(struct orc_host * host, struct orc_scb * scb, struct scsi_cmnd * cmd) 839{ /* Create corresponding SCB */ 840 struct scatterlist *sg; 841 struct orc_sgent *sgent; /* Pointer to SG list */ 842 int i, count_sg; 843 struct orc_extended_scb *escb; 844 845 /* Links between the escb, scb and Linux scsi midlayer cmd */ 846 escb = scb->escb; 847 escb->srb = cmd; 848 sgent = NULL; 849 850 /* Set up the SCB to do a SCSI command block */ 851 scb->opcode = ORC_EXECSCSI; 852 scb->flags = SCF_NO_DCHK; /* Clear done bit */ 853 scb->target = cmd->device->id; 854 scb->lun = cmd->device->lun; 855 scb->reserved0 = 0; 856 scb->reserved1 = 0; 857 scb->sg_len = cpu_to_le32(0); 858 859 scb->xferlen = cpu_to_le32((u32) scsi_bufflen(cmd)); 860 sgent = (struct orc_sgent *) & escb->sglist[0]; 861 862 count_sg = scsi_dma_map(cmd); 863 if (count_sg < 0) 864 return count_sg; 865 BUG_ON(count_sg > TOTAL_SG_ENTRY); 866 867 /* Build the scatter gather lists */ 868 if (count_sg) { 869 scb->sg_len = cpu_to_le32((u32) (count_sg * 8)); 870 scsi_for_each_sg(cmd, sg, count_sg, i) { 871 sgent->base = cpu_to_le32((u32) sg_dma_address(sg)); 872 sgent->length = cpu_to_le32((u32) sg_dma_len(sg)); 873 sgent++; 874 } 875 } else { 876 scb->sg_len = cpu_to_le32(0); 877 sgent->base = cpu_to_le32(0); 878 sgent->length = cpu_to_le32(0); 879 } 880 scb->sg_addr = (u32) scb->sense_addr; /* sense_addr is already little endian */ 881 scb->hastat = 0; 882 scb->tastat = 0; 883 scb->link = 0xFF; 884 scb->sense_len = SENSE_SIZE; 885 scb->cdb_len = cmd->cmd_len; 886 if (scb->cdb_len >= IMAX_CDB) { 887 printk("max cdb length= %x\b", cmd->cmd_len); 888 scb->cdb_len = IMAX_CDB; 889 } 890 scb->ident = cmd->device->lun | DISC_ALLOW; 891 if (cmd->device->tagged_supported) { /* Tag Support */ 892 scb->tag_msg = SIMPLE_QUEUE_TAG; /* Do simple tag only */ 893 } else { 894 scb->tag_msg = 0; /* No tag support */ 895 } 896 memcpy(scb->cdb, cmd->cmnd, scb->cdb_len); 897 return 0; 898} 899 900/** 901 * inia100_queue - queue command with host 902 * @cmd: Command block 903 * @done: Completion function 904 * 905 * Called by the mid layer to queue a command. Process the command 906 * block, build the host specific scb structures and if there is room 907 * queue the command down to the controller 908 */ 909 910static int inia100_queue(struct scsi_cmnd * cmd, void (*done) (struct scsi_cmnd *)) 911{ 912 struct orc_scb *scb; 913 struct orc_host *host; /* Point to Host adapter control block */ 914 915 host = (struct orc_host *) cmd->device->host->hostdata; 916 cmd->scsi_done = done; 917 /* Get free SCSI control block */ 918 if ((scb = orc_alloc_scb(host)) == NULL) 919 return SCSI_MLQUEUE_HOST_BUSY; 920 921 if (inia100_build_scb(host, scb, cmd)) { 922 orc_release_scb(host, scb); 923 return SCSI_MLQUEUE_HOST_BUSY; 924 } 925 orc_exec_scb(host, scb); /* Start execute SCB */ 926 return 0; 927} 928 929/***************************************************************************** 930 Function name : inia100_abort 931 Description : Abort a queued command. 932 (commands that are on the bus can't be aborted easily) 933 Input : host - Pointer to host adapter structure 934 Output : None. 935 Return : pSRB - Pointer to SCSI request block. 936*****************************************************************************/ 937static int inia100_abort(struct scsi_cmnd * cmd) 938{ 939 struct orc_host *host; 940 941 host = (struct orc_host *) cmd->device->host->hostdata; 942 return inia100_abort_cmd(host, cmd); 943} 944 945/***************************************************************************** 946 Function name : inia100_reset 947 Description : Reset registers, reset a hanging bus and 948 kill active and disconnected commands for target w/o soft reset 949 Input : host - Pointer to host adapter structure 950 Output : None. 951 Return : pSRB - Pointer to SCSI request block. 952*****************************************************************************/ 953static int inia100_bus_reset(struct scsi_cmnd * cmd) 954{ /* I need Host Control Block Information */ 955 struct orc_host *host; 956 host = (struct orc_host *) cmd->device->host->hostdata; 957 return orc_reset_scsi_bus(host); 958} 959 960/***************************************************************************** 961 Function name : inia100_device_reset 962 Description : Reset the device 963 Input : host - Pointer to host adapter structure 964 Output : None. 965 Return : pSRB - Pointer to SCSI request block. 966*****************************************************************************/ 967static int inia100_device_reset(struct scsi_cmnd * cmd) 968{ /* I need Host Control Block Information */ 969 struct orc_host *host; 970 host = (struct orc_host *) cmd->device->host->hostdata; 971 return orc_device_reset(host, cmd, scmd_id(cmd)); 972 973} 974 975/** 976 * inia100_scb_handler - interrupt callback 977 * @host: Host causing the interrupt 978 * @scb: SCB the controller returned as needing processing 979 * 980 * Perform completion processing on a control block. Do the conversions 981 * from host to SCSI midlayer error coding, save any sense data and 982 * the complete with the midlayer and recycle the scb. 983 */ 984 985static void inia100_scb_handler(struct orc_host *host, struct orc_scb *scb) 986{ 987 struct scsi_cmnd *cmd; /* Pointer to SCSI request block */ 988 struct orc_extended_scb *escb; 989 990 escb = scb->escb; 991 if ((cmd = (struct scsi_cmnd *) escb->srb) == NULL) { 992 printk(KERN_ERR "inia100_scb_handler: SRB pointer is empty\n"); 993 orc_release_scb(host, scb); /* Release SCB for current channel */ 994 return; 995 } 996 escb->srb = NULL; 997 998 switch (scb->hastat) { 999 case 0x0: 1000 case 0xa: /* Linked command complete without error and linked normally */ 1001 case 0xb: /* Linked command complete without error interrupt generated */ 1002 scb->hastat = 0; 1003 break; 1004 1005 case 0x11: /* Selection time out-The initiator selection or target 1006 reselection was not complete within the SCSI Time out period */ 1007 scb->hastat = DID_TIME_OUT; 1008 break; 1009 1010 case 0x14: /* Target bus phase sequence failure-An invalid bus phase or bus 1011 phase sequence was requested by the target. The host adapter 1012 will generate a SCSI Reset Condition, notifying the host with 1013 a SCRD interrupt */ 1014 scb->hastat = DID_RESET; 1015 break; 1016 1017 case 0x1a: /* SCB Aborted. 07/21/98 */ 1018 scb->hastat = DID_ABORT; 1019 break; 1020 1021 case 0x12: /* Data overrun/underrun-The target attempted to transfer more data 1022 than was allocated by the Data Length field or the sum of the 1023 Scatter / Gather Data Length fields. */ 1024 case 0x13: /* Unexpected bus free-The target dropped the SCSI BSY at an unexpected time. */ 1025 case 0x16: /* Invalid CCB Operation Code-The first byte of the CCB was invalid. */ 1026 1027 default: 1028 printk(KERN_DEBUG "inia100: %x %x\n", scb->hastat, scb->tastat); 1029 scb->hastat = DID_ERROR; /* Couldn't find any better */ 1030 break; 1031 } 1032 1033 if (scb->tastat == 2) { /* Check condition */ 1034 memcpy((unsigned char *) &cmd->sense_buffer[0], 1035 (unsigned char *) &escb->sglist[0], SENSE_SIZE); 1036 } 1037 cmd->result = scb->tastat | (scb->hastat << 16); 1038 scsi_dma_unmap(cmd); 1039 cmd->scsi_done(cmd); /* Notify system DONE */ 1040 orc_release_scb(host, scb); /* Release SCB for current channel */ 1041} 1042 1043/** 1044 * inia100_intr - interrupt handler 1045 * @irqno: Interrupt value 1046 * @devid: Host adapter 1047 * 1048 * Entry point for IRQ handling. All the real work is performed 1049 * by orc_interrupt. 1050 */ 1051static irqreturn_t inia100_intr(int irqno, void *devid) 1052{ 1053 struct Scsi_Host *shost = (struct Scsi_Host *)devid; 1054 struct orc_host *host = (struct orc_host *)shost->hostdata; 1055 unsigned long flags; 1056 irqreturn_t res; 1057 1058 spin_lock_irqsave(shost->host_lock, flags); 1059 res = orc_interrupt(host); 1060 spin_unlock_irqrestore(shost->host_lock, flags); 1061 1062 return res; 1063} 1064 1065static struct scsi_host_template inia100_template = { 1066 .proc_name = "inia100", 1067 .name = inia100_REVID, 1068 .queuecommand = inia100_queue, 1069 .eh_abort_handler = inia100_abort, 1070 .eh_bus_reset_handler = inia100_bus_reset, 1071 .eh_device_reset_handler = inia100_device_reset, 1072 .can_queue = 1, 1073 .this_id = 1, 1074 .sg_tablesize = SG_ALL, 1075 .cmd_per_lun = 1, 1076 .use_clustering = ENABLE_CLUSTERING, 1077}; 1078 1079static int __devinit inia100_probe_one(struct pci_dev *pdev, 1080 const struct pci_device_id *id) 1081{ 1082 struct Scsi_Host *shost; 1083 struct orc_host *host; 1084 unsigned long port, bios; 1085 int error = -ENODEV; 1086 u32 sz; 1087 unsigned long biosaddr; 1088 char *bios_phys; 1089 1090 if (pci_enable_device(pdev)) 1091 goto out; 1092 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) { 1093 printk(KERN_WARNING "Unable to set 32bit DMA " 1094 "on inia100 adapter, ignoring.\n"); 1095 goto out_disable_device; 1096 } 1097 1098 pci_set_master(pdev); 1099 1100 port = pci_resource_start(pdev, 0); 1101 if (!request_region(port, 256, "inia100")) { 1102 printk(KERN_WARNING "inia100: io port 0x%lx, is busy.\n", port); 1103 goto out_disable_device; 1104 } 1105 1106 /* <02> read from base address + 0x50 offset to get the bios value. */ 1107 bios = inw(port + 0x50); 1108 1109 1110 shost = scsi_host_alloc(&inia100_template, sizeof(struct orc_host)); 1111 if (!shost) 1112 goto out_release_region; 1113 1114 host = (struct orc_host *)shost->hostdata; 1115 host->pdev = pdev; 1116 host->base = port; 1117 host->BIOScfg = bios; 1118 spin_lock_init(&host->allocation_lock); 1119 1120 /* Get total memory needed for SCB */ 1121 sz = ORC_MAXQUEUE * sizeof(struct orc_scb); 1122 host->scb_virt = pci_alloc_consistent(pdev, sz, 1123 &host->scb_phys); 1124 if (!host->scb_virt) { 1125 printk("inia100: SCB memory allocation error\n"); 1126 goto out_host_put; 1127 } 1128 memset(host->scb_virt, 0, sz); 1129 1130 /* Get total memory needed for ESCB */ 1131 sz = ORC_MAXQUEUE * sizeof(struct orc_extended_scb); 1132 host->escb_virt = pci_alloc_consistent(pdev, sz, 1133 &host->escb_phys); 1134 if (!host->escb_virt) { 1135 printk("inia100: ESCB memory allocation error\n"); 1136 goto out_free_scb_array; 1137 } 1138 memset(host->escb_virt, 0, sz); 1139 1140 biosaddr = host->BIOScfg; 1141 biosaddr = (biosaddr << 4); 1142 bios_phys = phys_to_virt(biosaddr); 1143 if (init_orchid(host)) { /* Initialize orchid chip */ 1144 printk("inia100: initial orchid fail!!\n"); 1145 goto out_free_escb_array; 1146 } 1147 1148 shost->io_port = host->base; 1149 shost->n_io_port = 0xff; 1150 shost->can_queue = ORC_MAXQUEUE; 1151 shost->unique_id = shost->io_port; 1152 shost->max_id = host->max_targets; 1153 shost->max_lun = 16; 1154 shost->irq = pdev->irq; 1155 shost->this_id = host->scsi_id; /* Assign HCS index */ 1156 shost->sg_tablesize = TOTAL_SG_ENTRY; 1157 1158 /* Initial orc chip */ 1159 error = request_irq(pdev->irq, inia100_intr, IRQF_SHARED, 1160 "inia100", shost); 1161 if (error < 0) { 1162 printk(KERN_WARNING "inia100: unable to get irq %d\n", 1163 pdev->irq); 1164 goto out_free_escb_array; 1165 } 1166 1167 pci_set_drvdata(pdev, shost); 1168 1169 error = scsi_add_host(shost, &pdev->dev); 1170 if (error) 1171 goto out_free_irq; 1172 1173 scsi_scan_host(shost); 1174 return 0; 1175 1176out_free_irq: 1177 free_irq(shost->irq, shost); 1178out_free_escb_array: 1179 pci_free_consistent(pdev, ORC_MAXQUEUE * sizeof(struct orc_extended_scb), 1180 host->escb_virt, host->escb_phys); 1181out_free_scb_array: 1182 pci_free_consistent(pdev, ORC_MAXQUEUE * sizeof(struct orc_scb), 1183 host->scb_virt, host->scb_phys); 1184out_host_put: 1185 scsi_host_put(shost); 1186out_release_region: 1187 release_region(port, 256); 1188out_disable_device: 1189 pci_disable_device(pdev); 1190out: 1191 return error; 1192} 1193 1194static void __devexit inia100_remove_one(struct pci_dev *pdev) 1195{ 1196 struct Scsi_Host *shost = pci_get_drvdata(pdev); 1197 struct orc_host *host = (struct orc_host *)shost->hostdata; 1198 1199 scsi_remove_host(shost); 1200 1201 free_irq(shost->irq, shost); 1202 pci_free_consistent(pdev, ORC_MAXQUEUE * sizeof(struct orc_extended_scb), 1203 host->escb_virt, host->escb_phys); 1204 pci_free_consistent(pdev, ORC_MAXQUEUE * sizeof(struct orc_scb), 1205 host->scb_virt, host->scb_phys); 1206 release_region(shost->io_port, 256); 1207 1208 scsi_host_put(shost); 1209} 1210 1211static struct pci_device_id inia100_pci_tbl[] = { 1212 {PCI_VENDOR_ID_INIT, 0x1060, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, 1213 {0,} 1214}; 1215MODULE_DEVICE_TABLE(pci, inia100_pci_tbl); 1216 1217static struct pci_driver inia100_pci_driver = { 1218 .name = "inia100", 1219 .id_table = inia100_pci_tbl, 1220 .probe = inia100_probe_one, 1221 .remove = __devexit_p(inia100_remove_one), 1222}; 1223 1224static int __init inia100_init(void) 1225{ 1226 return pci_register_driver(&inia100_pci_driver); 1227} 1228 1229static void __exit inia100_exit(void) 1230{ 1231 pci_unregister_driver(&inia100_pci_driver); 1232} 1233 1234MODULE_DESCRIPTION("Initio A100U2W SCSI driver"); 1235MODULE_AUTHOR("Initio Corporation"); 1236MODULE_LICENSE("Dual BSD/GPL"); 1237 1238module_init(inia100_init); 1239module_exit(inia100_exit); 1240