1/* 2 * A SPI driver for the Ricoh RS5C348 RTC 3 * 4 * Copyright (C) 2006 Atsushi Nemoto <anemo@mba.ocn.ne.jp> 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License version 2 as 8 * published by the Free Software Foundation. 9 * 10 * The board specific init code should provide characteristics of this 11 * device: 12 * Mode 1 (High-Active, Shift-Then-Sample), High Avtive CS 13 */ 14 15#include <linux/bcd.h> 16#include <linux/delay.h> 17#include <linux/device.h> 18#include <linux/errno.h> 19#include <linux/init.h> 20#include <linux/kernel.h> 21#include <linux/string.h> 22#include <linux/slab.h> 23#include <linux/rtc.h> 24#include <linux/workqueue.h> 25#include <linux/spi/spi.h> 26 27#define DRV_VERSION "0.2" 28 29#define RS5C348_REG_SECS 0 30#define RS5C348_REG_MINS 1 31#define RS5C348_REG_HOURS 2 32#define RS5C348_REG_WDAY 3 33#define RS5C348_REG_DAY 4 34#define RS5C348_REG_MONTH 5 35#define RS5C348_REG_YEAR 6 36#define RS5C348_REG_CTL1 14 37#define RS5C348_REG_CTL2 15 38 39#define RS5C348_SECS_MASK 0x7f 40#define RS5C348_MINS_MASK 0x7f 41#define RS5C348_HOURS_MASK 0x3f 42#define RS5C348_WDAY_MASK 0x03 43#define RS5C348_DAY_MASK 0x3f 44#define RS5C348_MONTH_MASK 0x1f 45 46#define RS5C348_BIT_PM 0x20 /* REG_HOURS */ 47#define RS5C348_BIT_Y2K 0x80 /* REG_MONTH */ 48#define RS5C348_BIT_24H 0x20 /* REG_CTL1 */ 49#define RS5C348_BIT_XSTP 0x10 /* REG_CTL2 */ 50#define RS5C348_BIT_VDET 0x40 /* REG_CTL2 */ 51 52#define RS5C348_CMD_W(addr) (((addr) << 4) | 0x08) /* single write */ 53#define RS5C348_CMD_R(addr) (((addr) << 4) | 0x0c) /* single read */ 54#define RS5C348_CMD_MW(addr) (((addr) << 4) | 0x00) /* burst write */ 55#define RS5C348_CMD_MR(addr) (((addr) << 4) | 0x04) /* burst read */ 56 57struct rs5c348_plat_data { 58 struct rtc_device *rtc; 59 int rtc_24h; 60}; 61 62static int 63rs5c348_rtc_set_time(struct device *dev, struct rtc_time *tm) 64{ 65 struct spi_device *spi = to_spi_device(dev); 66 struct rs5c348_plat_data *pdata = spi->dev.platform_data; 67 u8 txbuf[5+7], *txp; 68 int ret; 69 70 /* Transfer 5 bytes before writing SEC. This gives 31us for carry. */ 71 txp = txbuf; 72 txbuf[0] = RS5C348_CMD_R(RS5C348_REG_CTL2); /* cmd, ctl2 */ 73 txbuf[1] = 0; /* dummy */ 74 txbuf[2] = RS5C348_CMD_R(RS5C348_REG_CTL2); /* cmd, ctl2 */ 75 txbuf[3] = 0; /* dummy */ 76 txbuf[4] = RS5C348_CMD_MW(RS5C348_REG_SECS); /* cmd, sec, ... */ 77 txp = &txbuf[5]; 78 txp[RS5C348_REG_SECS] = bin2bcd(tm->tm_sec); 79 txp[RS5C348_REG_MINS] = bin2bcd(tm->tm_min); 80 if (pdata->rtc_24h) { 81 txp[RS5C348_REG_HOURS] = bin2bcd(tm->tm_hour); 82 } else { 83 /* hour 0 is AM12, noon is PM12 */ 84 txp[RS5C348_REG_HOURS] = bin2bcd((tm->tm_hour + 11) % 12 + 1) | 85 (tm->tm_hour >= 12 ? RS5C348_BIT_PM : 0); 86 } 87 txp[RS5C348_REG_WDAY] = bin2bcd(tm->tm_wday); 88 txp[RS5C348_REG_DAY] = bin2bcd(tm->tm_mday); 89 txp[RS5C348_REG_MONTH] = bin2bcd(tm->tm_mon + 1) | 90 (tm->tm_year >= 100 ? RS5C348_BIT_Y2K : 0); 91 txp[RS5C348_REG_YEAR] = bin2bcd(tm->tm_year % 100); 92 /* write in one transfer to avoid data inconsistency */ 93 ret = spi_write_then_read(spi, txbuf, sizeof(txbuf), NULL, 0); 94 udelay(62); /* Tcsr 62us */ 95 return ret; 96} 97 98static int 99rs5c348_rtc_read_time(struct device *dev, struct rtc_time *tm) 100{ 101 struct spi_device *spi = to_spi_device(dev); 102 struct rs5c348_plat_data *pdata = spi->dev.platform_data; 103 u8 txbuf[5], rxbuf[7]; 104 int ret; 105 106 /* Transfer 5 byte befores reading SEC. This gives 31us for carry. */ 107 txbuf[0] = RS5C348_CMD_R(RS5C348_REG_CTL2); /* cmd, ctl2 */ 108 txbuf[1] = 0; /* dummy */ 109 txbuf[2] = RS5C348_CMD_R(RS5C348_REG_CTL2); /* cmd, ctl2 */ 110 txbuf[3] = 0; /* dummy */ 111 txbuf[4] = RS5C348_CMD_MR(RS5C348_REG_SECS); /* cmd, sec, ... */ 112 113 /* read in one transfer to avoid data inconsistency */ 114 ret = spi_write_then_read(spi, txbuf, sizeof(txbuf), 115 rxbuf, sizeof(rxbuf)); 116 udelay(62); /* Tcsr 62us */ 117 if (ret < 0) 118 return ret; 119 120 tm->tm_sec = bcd2bin(rxbuf[RS5C348_REG_SECS] & RS5C348_SECS_MASK); 121 tm->tm_min = bcd2bin(rxbuf[RS5C348_REG_MINS] & RS5C348_MINS_MASK); 122 tm->tm_hour = bcd2bin(rxbuf[RS5C348_REG_HOURS] & RS5C348_HOURS_MASK); 123 if (!pdata->rtc_24h) { 124 tm->tm_hour %= 12; 125 if (rxbuf[RS5C348_REG_HOURS] & RS5C348_BIT_PM) 126 tm->tm_hour += 12; 127 } 128 tm->tm_wday = bcd2bin(rxbuf[RS5C348_REG_WDAY] & RS5C348_WDAY_MASK); 129 tm->tm_mday = bcd2bin(rxbuf[RS5C348_REG_DAY] & RS5C348_DAY_MASK); 130 tm->tm_mon = 131 bcd2bin(rxbuf[RS5C348_REG_MONTH] & RS5C348_MONTH_MASK) - 1; 132 /* year is 1900 + tm->tm_year */ 133 tm->tm_year = bcd2bin(rxbuf[RS5C348_REG_YEAR]) + 134 ((rxbuf[RS5C348_REG_MONTH] & RS5C348_BIT_Y2K) ? 100 : 0); 135 136 if (rtc_valid_tm(tm) < 0) { 137 dev_err(&spi->dev, "retrieved date/time is not valid.\n"); 138 rtc_time_to_tm(0, tm); 139 } 140 141 return 0; 142} 143 144static const struct rtc_class_ops rs5c348_rtc_ops = { 145 .read_time = rs5c348_rtc_read_time, 146 .set_time = rs5c348_rtc_set_time, 147}; 148 149static struct spi_driver rs5c348_driver; 150 151static int __devinit rs5c348_probe(struct spi_device *spi) 152{ 153 int ret; 154 struct rtc_device *rtc; 155 struct rs5c348_plat_data *pdata; 156 157 pdata = kzalloc(sizeof(struct rs5c348_plat_data), GFP_KERNEL); 158 if (!pdata) 159 return -ENOMEM; 160 spi->dev.platform_data = pdata; 161 162 /* Check D7 of SECOND register */ 163 ret = spi_w8r8(spi, RS5C348_CMD_R(RS5C348_REG_SECS)); 164 if (ret < 0 || (ret & 0x80)) { 165 dev_err(&spi->dev, "not found.\n"); 166 goto kfree_exit; 167 } 168 169 dev_info(&spi->dev, "chip found, driver version " DRV_VERSION "\n"); 170 dev_info(&spi->dev, "spiclk %u KHz.\n", 171 (spi->max_speed_hz + 500) / 1000); 172 173 /* turn RTC on if it was not on */ 174 ret = spi_w8r8(spi, RS5C348_CMD_R(RS5C348_REG_CTL2)); 175 if (ret < 0) 176 goto kfree_exit; 177 if (ret & (RS5C348_BIT_XSTP | RS5C348_BIT_VDET)) { 178 u8 buf[2]; 179 struct rtc_time tm; 180 if (ret & RS5C348_BIT_VDET) 181 dev_warn(&spi->dev, "voltage-low detected.\n"); 182 if (ret & RS5C348_BIT_XSTP) 183 dev_warn(&spi->dev, "oscillator-stop detected.\n"); 184 rtc_time_to_tm(0, &tm); /* 1970/1/1 */ 185 ret = rs5c348_rtc_set_time(&spi->dev, &tm); 186 if (ret < 0) 187 goto kfree_exit; 188 buf[0] = RS5C348_CMD_W(RS5C348_REG_CTL2); 189 buf[1] = 0; 190 ret = spi_write_then_read(spi, buf, sizeof(buf), NULL, 0); 191 if (ret < 0) 192 goto kfree_exit; 193 } 194 195 ret = spi_w8r8(spi, RS5C348_CMD_R(RS5C348_REG_CTL1)); 196 if (ret < 0) 197 goto kfree_exit; 198 if (ret & RS5C348_BIT_24H) 199 pdata->rtc_24h = 1; 200 201 rtc = rtc_device_register(rs5c348_driver.driver.name, &spi->dev, 202 &rs5c348_rtc_ops, THIS_MODULE); 203 204 if (IS_ERR(rtc)) { 205 ret = PTR_ERR(rtc); 206 goto kfree_exit; 207 } 208 209 pdata->rtc = rtc; 210 211 return 0; 212 kfree_exit: 213 kfree(pdata); 214 return ret; 215} 216 217static int __devexit rs5c348_remove(struct spi_device *spi) 218{ 219 struct rs5c348_plat_data *pdata = spi->dev.platform_data; 220 struct rtc_device *rtc = pdata->rtc; 221 222 if (rtc) 223 rtc_device_unregister(rtc); 224 kfree(pdata); 225 return 0; 226} 227 228static struct spi_driver rs5c348_driver = { 229 .driver = { 230 .name = "rtc-rs5c348", 231 .bus = &spi_bus_type, 232 .owner = THIS_MODULE, 233 }, 234 .probe = rs5c348_probe, 235 .remove = __devexit_p(rs5c348_remove), 236}; 237 238static __init int rs5c348_init(void) 239{ 240 return spi_register_driver(&rs5c348_driver); 241} 242 243static __exit void rs5c348_exit(void) 244{ 245 spi_unregister_driver(&rs5c348_driver); 246} 247 248module_init(rs5c348_init); 249module_exit(rs5c348_exit); 250 251MODULE_AUTHOR("Atsushi Nemoto <anemo@mba.ocn.ne.jp>"); 252MODULE_DESCRIPTION("Ricoh RS5C348 RTC driver"); 253MODULE_LICENSE("GPL"); 254MODULE_VERSION(DRV_VERSION); 255MODULE_ALIAS("spi:rtc-rs5c348"); 256