1/* 2 * ti113x.h 1.16 1999/10/25 20:03:34 3 * 4 * The contents of this file are subject to the Mozilla Public License 5 * Version 1.1 (the "License"); you may not use this file except in 6 * compliance with the License. You may obtain a copy of the License 7 * at http://www.mozilla.org/MPL/ 8 * 9 * Software distributed under the License is distributed on an "AS IS" 10 * basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See 11 * the License for the specific language governing rights and 12 * limitations under the License. 13 * 14 * The initial developer of the original code is David A. Hinds 15 * <dahinds@users.sourceforge.net>. Portions created by David A. Hinds 16 * are Copyright (C) 1999 David A. Hinds. All Rights Reserved. 17 * 18 * Alternatively, the contents of this file may be used under the 19 * terms of the GNU General Public License version 2 (the "GPL"), in which 20 * case the provisions of the GPL are applicable instead of the 21 * above. If you wish to allow the use of your version of this file 22 * only under the terms of the GPL and not to allow others to use 23 * your version of this file under the MPL, indicate your decision by 24 * deleting the provisions above and replace them with the notice and 25 * other provisions required by the GPL. If you do not delete the 26 * provisions above, a recipient may use your version of this file 27 * under either the MPL or the GPL. 28 */ 29 30#ifndef _LINUX_TI113X_H 31#define _LINUX_TI113X_H 32 33 34/* Register definitions for TI 113X PCI-to-CardBus bridges */ 35 36/* System Control Register */ 37#define TI113X_SYSTEM_CONTROL 0x0080 /* 32 bit */ 38#define TI113X_SCR_SMIROUTE 0x04000000 39#define TI113X_SCR_SMISTATUS 0x02000000 40#define TI113X_SCR_SMIENB 0x01000000 41#define TI113X_SCR_VCCPROT 0x00200000 42#define TI113X_SCR_REDUCEZV 0x00100000 43#define TI113X_SCR_CDREQEN 0x00080000 44#define TI113X_SCR_CDMACHAN 0x00070000 45#define TI113X_SCR_SOCACTIVE 0x00002000 46#define TI113X_SCR_PWRSTREAM 0x00000800 47#define TI113X_SCR_DELAYUP 0x00000400 48#define TI113X_SCR_DELAYDOWN 0x00000200 49#define TI113X_SCR_INTERROGATE 0x00000100 50#define TI113X_SCR_CLKRUN_SEL 0x00000080 51#define TI113X_SCR_PWRSAVINGS 0x00000040 52#define TI113X_SCR_SUBSYSRW 0x00000020 53#define TI113X_SCR_CB_DPAR 0x00000010 54#define TI113X_SCR_CDMA_EN 0x00000008 55#define TI113X_SCR_ASYNC_IRQ 0x00000004 56#define TI113X_SCR_KEEPCLK 0x00000002 57#define TI113X_SCR_CLKRUN_ENA 0x00000001 58 59#define TI122X_SCR_SER_STEP 0xc0000000 60#define TI122X_SCR_INTRTIE 0x20000000 61#define TIXX21_SCR_TIEALL 0x10000000 62#define TI122X_SCR_CBRSVD 0x00400000 63#define TI122X_SCR_MRBURSTDN 0x00008000 64#define TI122X_SCR_MRBURSTUP 0x00004000 65#define TI122X_SCR_RIMUX 0x00000001 66 67/* Multimedia Control Register */ 68#define TI1250_MULTIMEDIA_CTL 0x0084 /* 8 bit */ 69#define TI1250_MMC_ZVOUTEN 0x80 70#define TI1250_MMC_PORTSEL 0x40 71#define TI1250_MMC_ZVEN1 0x02 72#define TI1250_MMC_ZVEN0 0x01 73 74#define TI1250_GENERAL_STATUS 0x0085 /* 8 bit */ 75#define TI1250_GPIO0_CONTROL 0x0088 /* 8 bit */ 76#define TI1250_GPIO1_CONTROL 0x0089 /* 8 bit */ 77#define TI1250_GPIO2_CONTROL 0x008a /* 8 bit */ 78#define TI1250_GPIO3_CONTROL 0x008b /* 8 bit */ 79#define TI1250_GPIO_MODE_MASK 0xc0 80 81/* IRQMUX/MFUNC Register */ 82#define TI122X_MFUNC 0x008c /* 32 bit */ 83#define TI122X_MFUNC0_MASK 0x0000000f 84#define TI122X_MFUNC1_MASK 0x000000f0 85#define TI122X_MFUNC2_MASK 0x00000f00 86#define TI122X_MFUNC3_MASK 0x0000f000 87#define TI122X_MFUNC4_MASK 0x000f0000 88#define TI122X_MFUNC5_MASK 0x00f00000 89#define TI122X_MFUNC6_MASK 0x0f000000 90 91#define TI122X_MFUNC0_INTA 0x00000002 92#define TI125X_MFUNC0_INTB 0x00000001 93#define TI122X_MFUNC1_INTB 0x00000020 94#define TI122X_MFUNC3_IRQSER 0x00001000 95 96 97/* Retry Status Register */ 98#define TI113X_RETRY_STATUS 0x0090 /* 8 bit */ 99#define TI113X_RSR_PCIRETRY 0x80 100#define TI113X_RSR_CBRETRY 0x40 101#define TI113X_RSR_TEXP_CBB 0x20 102#define TI113X_RSR_MEXP_CBB 0x10 103#define TI113X_RSR_TEXP_CBA 0x08 104#define TI113X_RSR_MEXP_CBA 0x04 105#define TI113X_RSR_TEXP_PCI 0x02 106#define TI113X_RSR_MEXP_PCI 0x01 107 108/* Card Control Register */ 109#define TI113X_CARD_CONTROL 0x0091 /* 8 bit */ 110#define TI113X_CCR_RIENB 0x80 111#define TI113X_CCR_ZVENABLE 0x40 112#define TI113X_CCR_PCI_IRQ_ENA 0x20 113#define TI113X_CCR_PCI_IREQ 0x10 114#define TI113X_CCR_PCI_CSC 0x08 115#define TI113X_CCR_SPKROUTEN 0x02 116#define TI113X_CCR_IFG 0x01 117 118#define TI1220_CCR_PORT_SEL 0x20 119#define TI122X_CCR_AUD2MUX 0x04 120 121/* Device Control Register */ 122#define TI113X_DEVICE_CONTROL 0x0092 /* 8 bit */ 123#define TI113X_DCR_5V_FORCE 0x40 124#define TI113X_DCR_3V_FORCE 0x20 125#define TI113X_DCR_IMODE_MASK 0x06 126#define TI113X_DCR_IMODE_ISA 0x02 127#define TI113X_DCR_IMODE_SERIAL 0x04 128 129#define TI12XX_DCR_IMODE_PCI_ONLY 0x00 130#define TI12XX_DCR_IMODE_ALL_SERIAL 0x06 131 132/* Buffer Control Register */ 133#define TI113X_BUFFER_CONTROL 0x0093 /* 8 bit */ 134#define TI113X_BCR_CB_READ_DEPTH 0x08 135#define TI113X_BCR_CB_WRITE_DEPTH 0x04 136#define TI113X_BCR_PCI_READ_DEPTH 0x02 137#define TI113X_BCR_PCI_WRITE_DEPTH 0x01 138 139/* Diagnostic Register */ 140#define TI1250_DIAGNOSTIC 0x0093 /* 8 bit */ 141#define TI1250_DIAG_TRUE_VALUE 0x80 142#define TI1250_DIAG_PCI_IREQ 0x40 143#define TI1250_DIAG_PCI_CSC 0x20 144#define TI1250_DIAG_ASYNC_CSC 0x01 145 146/* DMA Registers */ 147#define TI113X_DMA_0 0x0094 /* 32 bit */ 148#define TI113X_DMA_1 0x0098 /* 32 bit */ 149 150/* ExCA IO offset registers */ 151#define TI113X_IO_OFFSET(map) (0x36+((map)<<1)) 152 153/* EnE test register */ 154#define ENE_TEST_C9 0xc9 /* 8bit */ 155#define ENE_TEST_C9_TLTENABLE 0x02 156#define ENE_TEST_C9_PFENABLE_F0 0x04 157#define ENE_TEST_C9_PFENABLE_F1 0x08 158#define ENE_TEST_C9_PFENABLE (ENE_TEST_C9_PFENABLE_F0 | ENE_TEST_C9_PFENABLE_F1) 159#define ENE_TEST_C9_WPDISALBLE_F0 0x40 160#define ENE_TEST_C9_WPDISALBLE_F1 0x80 161#define ENE_TEST_C9_WPDISALBLE (ENE_TEST_C9_WPDISALBLE_F0 | ENE_TEST_C9_WPDISALBLE_F1) 162 163/* 164 * Texas Instruments CardBus controller overrides. 165 */ 166#define ti_sysctl(socket) ((socket)->private[0]) 167#define ti_cardctl(socket) ((socket)->private[1]) 168#define ti_devctl(socket) ((socket)->private[2]) 169#define ti_diag(socket) ((socket)->private[3]) 170#define ti_mfunc(socket) ((socket)->private[4]) 171#define ene_test_c9(socket) ((socket)->private[5]) 172 173/* 174 * These are the TI specific power management handlers. 175 */ 176static void ti_save_state(struct yenta_socket *socket) 177{ 178 ti_sysctl(socket) = config_readl(socket, TI113X_SYSTEM_CONTROL); 179 ti_mfunc(socket) = config_readl(socket, TI122X_MFUNC); 180 ti_cardctl(socket) = config_readb(socket, TI113X_CARD_CONTROL); 181 ti_devctl(socket) = config_readb(socket, TI113X_DEVICE_CONTROL); 182 ti_diag(socket) = config_readb(socket, TI1250_DIAGNOSTIC); 183 184 if (socket->dev->vendor == PCI_VENDOR_ID_ENE) 185 ene_test_c9(socket) = config_readb(socket, ENE_TEST_C9); 186} 187 188static void ti_restore_state(struct yenta_socket *socket) 189{ 190 config_writel(socket, TI113X_SYSTEM_CONTROL, ti_sysctl(socket)); 191 config_writel(socket, TI122X_MFUNC, ti_mfunc(socket)); 192 config_writeb(socket, TI113X_CARD_CONTROL, ti_cardctl(socket)); 193 config_writeb(socket, TI113X_DEVICE_CONTROL, ti_devctl(socket)); 194 config_writeb(socket, TI1250_DIAGNOSTIC, ti_diag(socket)); 195 196 if (socket->dev->vendor == PCI_VENDOR_ID_ENE) 197 config_writeb(socket, ENE_TEST_C9, ene_test_c9(socket)); 198} 199 200/* 201 * Zoom video control for TI122x/113x chips 202 */ 203 204static void ti_zoom_video(struct pcmcia_socket *sock, int onoff) 205{ 206 u8 reg; 207 struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket); 208 209 /* If we don't have a Zoom Video switch this is harmless, 210 we just tristate the unused (ZV) lines */ 211 reg = config_readb(socket, TI113X_CARD_CONTROL); 212 if (onoff) 213 /* Zoom zoom, we will all go together, zoom zoom, zoom zoom */ 214 reg |= TI113X_CCR_ZVENABLE; 215 else 216 reg &= ~TI113X_CCR_ZVENABLE; 217 config_writeb(socket, TI113X_CARD_CONTROL, reg); 218} 219 220 221static void ti1250_zoom_video(struct pcmcia_socket *sock, int onoff) 222{ 223 struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket); 224 int shift = 0; 225 u8 reg; 226 227 ti_zoom_video(sock, onoff); 228 229 reg = config_readb(socket, TI1250_MULTIMEDIA_CTL); 230 reg |= TI1250_MMC_ZVOUTEN; /* ZV bus enable */ 231 232 if(PCI_FUNC(socket->dev->devfn)==1) 233 shift = 1; 234 235 if(onoff) 236 { 237 reg &= ~(1<<6); /* Clear select bit */ 238 reg |= shift<<6; /* Favour our socket */ 239 reg |= 1<<shift; /* Socket zoom video on */ 240 } 241 else 242 { 243 reg &= ~(1<<6); /* Clear select bit */ 244 reg |= (1^shift)<<6; /* Favour other socket */ 245 reg &= ~(1<<shift); /* Socket zoon video off */ 246 } 247 248 config_writeb(socket, TI1250_MULTIMEDIA_CTL, reg); 249} 250 251static void ti_set_zv(struct yenta_socket *socket) 252{ 253 if(socket->dev->vendor == PCI_VENDOR_ID_TI) 254 { 255 switch(socket->dev->device) 256 { 257 /* There may be more .. */ 258 case PCI_DEVICE_ID_TI_1220: 259 case PCI_DEVICE_ID_TI_1221: 260 case PCI_DEVICE_ID_TI_1225: 261 case PCI_DEVICE_ID_TI_4510: 262 socket->socket.zoom_video = ti_zoom_video; 263 break; 264 case PCI_DEVICE_ID_TI_1250: 265 case PCI_DEVICE_ID_TI_1251A: 266 case PCI_DEVICE_ID_TI_1251B: 267 case PCI_DEVICE_ID_TI_1450: 268 socket->socket.zoom_video = ti1250_zoom_video; 269 } 270 } 271} 272 273 274/* 275 * Generic TI init - TI has an extension for the 276 * INTCTL register that sets the PCI CSC interrupt. 277 * Make sure we set it correctly at open and init 278 * time 279 * - override: disable the PCI CSC interrupt. This makes 280 * it possible to use the CSC interrupt to probe the 281 * ISA interrupts. 282 * - init: set the interrupt to match our PCI state. 283 * This makes us correctly get PCI CSC interrupt 284 * events. 285 */ 286static int ti_init(struct yenta_socket *socket) 287{ 288 u8 new, reg = exca_readb(socket, I365_INTCTL); 289 290 new = reg & ~I365_INTR_ENA; 291 if (socket->dev->irq) 292 new |= I365_INTR_ENA; 293 if (new != reg) 294 exca_writeb(socket, I365_INTCTL, new); 295 return 0; 296} 297 298static int ti_override(struct yenta_socket *socket) 299{ 300 u8 new, reg = exca_readb(socket, I365_INTCTL); 301 302 new = reg & ~I365_INTR_ENA; 303 if (new != reg) 304 exca_writeb(socket, I365_INTCTL, new); 305 306 ti_set_zv(socket); 307 308 return 0; 309} 310 311static void ti113x_use_isa_irq(struct yenta_socket *socket) 312{ 313 int isa_irq = -1; 314 u8 intctl; 315 u32 isa_irq_mask = 0; 316 317 if (!isa_probe) 318 return; 319 320 /* get a free isa int */ 321 isa_irq_mask = yenta_probe_irq(socket, isa_interrupts); 322 if (!isa_irq_mask) 323 return; /* no useable isa irq found */ 324 325 /* choose highest available */ 326 for (; isa_irq_mask; isa_irq++) 327 isa_irq_mask >>= 1; 328 socket->cb_irq = isa_irq; 329 330 exca_writeb(socket, I365_CSCINT, (isa_irq << 4)); 331 332 intctl = exca_readb(socket, I365_INTCTL); 333 intctl &= ~(I365_INTR_ENA | I365_IRQ_MASK); /* CSC Enable */ 334 exca_writeb(socket, I365_INTCTL, intctl); 335 336 dev_info(&socket->dev->dev, 337 "Yenta TI113x: using isa irq %d for CardBus\n", isa_irq); 338} 339 340 341static int ti113x_override(struct yenta_socket *socket) 342{ 343 u8 cardctl; 344 345 cardctl = config_readb(socket, TI113X_CARD_CONTROL); 346 cardctl &= ~(TI113X_CCR_PCI_IRQ_ENA | TI113X_CCR_PCI_IREQ | TI113X_CCR_PCI_CSC); 347 if (socket->dev->irq) 348 cardctl |= TI113X_CCR_PCI_IRQ_ENA | TI113X_CCR_PCI_CSC | TI113X_CCR_PCI_IREQ; 349 else 350 ti113x_use_isa_irq(socket); 351 352 config_writeb(socket, TI113X_CARD_CONTROL, cardctl); 353 354 return ti_override(socket); 355} 356 357 358/* irqrouting for func0, probes PCI interrupt and ISA interrupts */ 359static void ti12xx_irqroute_func0(struct yenta_socket *socket) 360{ 361 u32 mfunc, mfunc_old, devctl; 362 u8 gpio3, gpio3_old; 363 int pci_irq_status; 364 365 mfunc = mfunc_old = config_readl(socket, TI122X_MFUNC); 366 devctl = config_readb(socket, TI113X_DEVICE_CONTROL); 367 dev_printk(KERN_INFO, &socket->dev->dev, 368 "TI: mfunc 0x%08x, devctl 0x%02x\n", mfunc, devctl); 369 370 /* make sure PCI interrupts are enabled before probing */ 371 ti_init(socket); 372 373 /* test PCI interrupts first. only try fixing if return value is 0! */ 374 pci_irq_status = yenta_probe_cb_irq(socket); 375 if (pci_irq_status) 376 goto out; 377 378 /* 379 * We're here which means PCI interrupts are _not_ delivered. try to 380 * find the right setting (all serial or parallel) 381 */ 382 dev_printk(KERN_INFO, &socket->dev->dev, 383 "TI: probing PCI interrupt failed, trying to fix\n"); 384 385 /* for serial PCI make sure MFUNC3 is set to IRQSER */ 386 if ((devctl & TI113X_DCR_IMODE_MASK) == TI12XX_DCR_IMODE_ALL_SERIAL) { 387 switch (socket->dev->device) { 388 case PCI_DEVICE_ID_TI_1250: 389 case PCI_DEVICE_ID_TI_1251A: 390 case PCI_DEVICE_ID_TI_1251B: 391 case PCI_DEVICE_ID_TI_1450: 392 case PCI_DEVICE_ID_TI_1451A: 393 case PCI_DEVICE_ID_TI_4450: 394 case PCI_DEVICE_ID_TI_4451: 395 /* these chips have no IRQSER setting in MFUNC3 */ 396 break; 397 398 default: 399 mfunc = (mfunc & ~TI122X_MFUNC3_MASK) | TI122X_MFUNC3_IRQSER; 400 401 /* write down if changed, probe */ 402 if (mfunc != mfunc_old) { 403 config_writel(socket, TI122X_MFUNC, mfunc); 404 405 pci_irq_status = yenta_probe_cb_irq(socket); 406 if (pci_irq_status == 1) { 407 dev_printk(KERN_INFO, &socket->dev->dev, 408 "TI: all-serial interrupts ok\n"); 409 mfunc_old = mfunc; 410 goto out; 411 } 412 413 /* not working, back to old value */ 414 mfunc = mfunc_old; 415 config_writel(socket, TI122X_MFUNC, mfunc); 416 417 if (pci_irq_status == -1) 418 goto out; 419 } 420 } 421 422 /* serial PCI interrupts not working fall back to parallel */ 423 dev_printk(KERN_INFO, &socket->dev->dev, 424 "TI: falling back to parallel PCI interrupts\n"); 425 devctl &= ~TI113X_DCR_IMODE_MASK; 426 devctl |= TI113X_DCR_IMODE_SERIAL; /* serial ISA could be right */ 427 config_writeb(socket, TI113X_DEVICE_CONTROL, devctl); 428 } 429 430 /* parallel PCI interrupts: route INTA */ 431 switch (socket->dev->device) { 432 case PCI_DEVICE_ID_TI_1250: 433 case PCI_DEVICE_ID_TI_1251A: 434 case PCI_DEVICE_ID_TI_1251B: 435 case PCI_DEVICE_ID_TI_1450: 436 /* make sure GPIO3 is set to INTA */ 437 gpio3 = gpio3_old = config_readb(socket, TI1250_GPIO3_CONTROL); 438 gpio3 &= ~TI1250_GPIO_MODE_MASK; 439 if (gpio3 != gpio3_old) 440 config_writeb(socket, TI1250_GPIO3_CONTROL, gpio3); 441 break; 442 443 default: 444 gpio3 = gpio3_old = 0; 445 446 mfunc = (mfunc & ~TI122X_MFUNC0_MASK) | TI122X_MFUNC0_INTA; 447 if (mfunc != mfunc_old) 448 config_writel(socket, TI122X_MFUNC, mfunc); 449 } 450 451 /* time to probe again */ 452 pci_irq_status = yenta_probe_cb_irq(socket); 453 if (pci_irq_status == 1) { 454 mfunc_old = mfunc; 455 dev_printk(KERN_INFO, &socket->dev->dev, 456 "TI: parallel PCI interrupts ok\n"); 457 } else { 458 /* not working, back to old value */ 459 mfunc = mfunc_old; 460 config_writel(socket, TI122X_MFUNC, mfunc); 461 if (gpio3 != gpio3_old) 462 config_writeb(socket, TI1250_GPIO3_CONTROL, gpio3_old); 463 } 464 465out: 466 if (pci_irq_status < 1) { 467 socket->cb_irq = 0; 468 dev_printk(KERN_INFO, &socket->dev->dev, 469 "Yenta TI: no PCI interrupts. Fish. " 470 "Please report.\n"); 471 } 472} 473 474 475/* changes the irq of func1 to match that of func0 */ 476static int ti12xx_align_irqs(struct yenta_socket *socket, int *old_irq) 477{ 478 struct pci_dev *func0; 479 480 /* find func0 device */ 481 func0 = pci_get_slot(socket->dev->bus, socket->dev->devfn & ~0x07); 482 if (!func0) 483 return 0; 484 485 if (old_irq) 486 *old_irq = socket->cb_irq; 487 socket->cb_irq = socket->dev->irq = func0->irq; 488 489 pci_dev_put(func0); 490 491 return 1; 492} 493 494/* 495 * ties INTA and INTB together. also changes the devices irq to that of 496 * the function 0 device. call from func1 only. 497 * returns 1 if INTRTIE changed, 0 otherwise. 498 */ 499static int ti12xx_tie_interrupts(struct yenta_socket *socket, int *old_irq) 500{ 501 u32 sysctl; 502 int ret; 503 504 sysctl = config_readl(socket, TI113X_SYSTEM_CONTROL); 505 if (sysctl & TI122X_SCR_INTRTIE) 506 return 0; 507 508 /* align */ 509 ret = ti12xx_align_irqs(socket, old_irq); 510 if (!ret) 511 return 0; 512 513 /* tie */ 514 sysctl |= TI122X_SCR_INTRTIE; 515 config_writel(socket, TI113X_SYSTEM_CONTROL, sysctl); 516 517 return 1; 518} 519 520/* undo what ti12xx_tie_interrupts() did */ 521static void ti12xx_untie_interrupts(struct yenta_socket *socket, int old_irq) 522{ 523 u32 sysctl = config_readl(socket, TI113X_SYSTEM_CONTROL); 524 sysctl &= ~TI122X_SCR_INTRTIE; 525 config_writel(socket, TI113X_SYSTEM_CONTROL, sysctl); 526 527 socket->cb_irq = socket->dev->irq = old_irq; 528} 529 530/* 531 * irqrouting for func1, plays with INTB routing 532 * only touches MFUNC for INTB routing. all other bits are taken 533 * care of in func0 already. 534 */ 535static void ti12xx_irqroute_func1(struct yenta_socket *socket) 536{ 537 u32 mfunc, mfunc_old, devctl, sysctl; 538 int pci_irq_status; 539 540 mfunc = mfunc_old = config_readl(socket, TI122X_MFUNC); 541 devctl = config_readb(socket, TI113X_DEVICE_CONTROL); 542 dev_printk(KERN_INFO, &socket->dev->dev, 543 "TI: mfunc 0x%08x, devctl 0x%02x\n", 544 mfunc, devctl); 545 546 /* if IRQs are configured as tied, align irq of func1 with func0 */ 547 sysctl = config_readl(socket, TI113X_SYSTEM_CONTROL); 548 if (sysctl & TI122X_SCR_INTRTIE) 549 ti12xx_align_irqs(socket, NULL); 550 551 /* make sure PCI interrupts are enabled before probing */ 552 ti_init(socket); 553 554 /* test PCI interrupts first. only try fixing if return value is 0! */ 555 pci_irq_status = yenta_probe_cb_irq(socket); 556 if (pci_irq_status) 557 goto out; 558 559 /* 560 * We're here which means PCI interrupts are _not_ delivered. try to 561 * find the right setting 562 */ 563 dev_printk(KERN_INFO, &socket->dev->dev, 564 "TI: probing PCI interrupt failed, trying to fix\n"); 565 566 /* if all serial: set INTRTIE, probe again */ 567 if ((devctl & TI113X_DCR_IMODE_MASK) == TI12XX_DCR_IMODE_ALL_SERIAL) { 568 int old_irq; 569 570 if (ti12xx_tie_interrupts(socket, &old_irq)) { 571 pci_irq_status = yenta_probe_cb_irq(socket); 572 if (pci_irq_status == 1) { 573 dev_printk(KERN_INFO, &socket->dev->dev, 574 "TI: all-serial interrupts, tied ok\n"); 575 goto out; 576 } 577 578 ti12xx_untie_interrupts(socket, old_irq); 579 } 580 } 581 /* parallel PCI: route INTB, probe again */ 582 else { 583 int old_irq; 584 585 switch (socket->dev->device) { 586 case PCI_DEVICE_ID_TI_1250: 587 /* the 1250 has one pin for IRQSER/INTB depending on devctl */ 588 break; 589 590 case PCI_DEVICE_ID_TI_1251A: 591 case PCI_DEVICE_ID_TI_1251B: 592 case PCI_DEVICE_ID_TI_1450: 593 /* 594 * those have a pin for IRQSER/INTB plus INTB in MFUNC0 595 * we alread probed the shared pin, now go for MFUNC0 596 */ 597 mfunc = (mfunc & ~TI122X_MFUNC0_MASK) | TI125X_MFUNC0_INTB; 598 break; 599 600 default: 601 mfunc = (mfunc & ~TI122X_MFUNC1_MASK) | TI122X_MFUNC1_INTB; 602 break; 603 } 604 605 /* write, probe */ 606 if (mfunc != mfunc_old) { 607 config_writel(socket, TI122X_MFUNC, mfunc); 608 609 pci_irq_status = yenta_probe_cb_irq(socket); 610 if (pci_irq_status == 1) { 611 dev_printk(KERN_INFO, &socket->dev->dev, 612 "TI: parallel PCI interrupts ok\n"); 613 goto out; 614 } 615 616 mfunc = mfunc_old; 617 config_writel(socket, TI122X_MFUNC, mfunc); 618 619 if (pci_irq_status == -1) 620 goto out; 621 } 622 623 /* still nothing: set INTRTIE */ 624 if (ti12xx_tie_interrupts(socket, &old_irq)) { 625 pci_irq_status = yenta_probe_cb_irq(socket); 626 if (pci_irq_status == 1) { 627 dev_printk(KERN_INFO, &socket->dev->dev, 628 "TI: parallel PCI interrupts, tied ok\n"); 629 goto out; 630 } 631 632 ti12xx_untie_interrupts(socket, old_irq); 633 } 634 } 635 636out: 637 if (pci_irq_status < 1) { 638 socket->cb_irq = 0; 639 dev_printk(KERN_INFO, &socket->dev->dev, 640 "TI: no PCI interrupts. Fish. Please report.\n"); 641 } 642} 643 644 645/* Returns true value if the second slot of a two-slot controller is empty */ 646static int ti12xx_2nd_slot_empty(struct yenta_socket *socket) 647{ 648 struct pci_dev *func; 649 struct yenta_socket *slot2; 650 int devfn; 651 unsigned int state; 652 int ret = 1; 653 u32 sysctl; 654 655 /* catch the two-slot controllers */ 656 switch (socket->dev->device) { 657 case PCI_DEVICE_ID_TI_1220: 658 case PCI_DEVICE_ID_TI_1221: 659 case PCI_DEVICE_ID_TI_1225: 660 case PCI_DEVICE_ID_TI_1251A: 661 case PCI_DEVICE_ID_TI_1251B: 662 case PCI_DEVICE_ID_TI_1420: 663 case PCI_DEVICE_ID_TI_1450: 664 case PCI_DEVICE_ID_TI_1451A: 665 case PCI_DEVICE_ID_TI_1520: 666 case PCI_DEVICE_ID_TI_1620: 667 case PCI_DEVICE_ID_TI_4520: 668 case PCI_DEVICE_ID_TI_4450: 669 case PCI_DEVICE_ID_TI_4451: 670 /* 671 * there are way more, but they need to be added in yenta_socket.c 672 * and pci_ids.h first anyway. 673 */ 674 break; 675 676 case PCI_DEVICE_ID_TI_XX12: 677 case PCI_DEVICE_ID_TI_X515: 678 case PCI_DEVICE_ID_TI_X420: 679 case PCI_DEVICE_ID_TI_X620: 680 case PCI_DEVICE_ID_TI_XX21_XX11: 681 case PCI_DEVICE_ID_TI_7410: 682 case PCI_DEVICE_ID_TI_7610: 683 /* 684 * those are either single or dual slot CB with additional functions 685 * like 1394, smartcard reader, etc. check the TIEALL flag for them 686 * the TIEALL flag binds the IRQ of all functions toghether. 687 * we catch the single slot variants later. 688 */ 689 sysctl = config_readl(socket, TI113X_SYSTEM_CONTROL); 690 if (sysctl & TIXX21_SCR_TIEALL) 691 return 0; 692 693 break; 694 695 /* single-slot controllers have the 2nd slot empty always :) */ 696 default: 697 return 1; 698 } 699 700 /* get other slot */ 701 devfn = socket->dev->devfn & ~0x07; 702 func = pci_get_slot(socket->dev->bus, 703 (socket->dev->devfn & 0x07) ? devfn : devfn | 0x01); 704 if (!func) 705 return 1; 706 707 /* 708 * check that the device id of both slots match. this is needed for the 709 * XX21 and the XX11 controller that share the same device id for single 710 * and dual slot controllers. return '2nd slot empty'. we already checked 711 * if the interrupt is tied to another function. 712 */ 713 if (socket->dev->device != func->device) 714 goto out; 715 716 slot2 = pci_get_drvdata(func); 717 if (!slot2) 718 goto out; 719 720 /* check state */ 721 yenta_get_status(&slot2->socket, &state); 722 if (state & SS_DETECT) { 723 ret = 0; 724 goto out; 725 } 726 727out: 728 pci_dev_put(func); 729 return ret; 730} 731 732/* 733 * TI specifiy parts for the power hook. 734 * 735 * some TI's with some CB's produces interrupt storm on power on. it has been 736 * seen with atheros wlan cards on TI1225 and TI1410. solution is simply to 737 * disable any CB interrupts during this time. 738 */ 739static int ti12xx_power_hook(struct pcmcia_socket *sock, int operation) 740{ 741 struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket); 742 u32 mfunc, devctl, sysctl; 743 u8 gpio3; 744 745 /* only POWER_PRE and POWER_POST are interesting */ 746 if ((operation != HOOK_POWER_PRE) && (operation != HOOK_POWER_POST)) 747 return 0; 748 749 devctl = config_readb(socket, TI113X_DEVICE_CONTROL); 750 sysctl = config_readl(socket, TI113X_SYSTEM_CONTROL); 751 mfunc = config_readl(socket, TI122X_MFUNC); 752 753 /* 754 * all serial/tied: only disable when modparm set. always doing it 755 * would mean a regression for working setups 'cos it disables the 756 * interrupts for both both slots on 2-slot controllers 757 * (and users of single slot controllers where it's save have to 758 * live with setting the modparm, most don't have to anyway) 759 */ 760 if (((devctl & TI113X_DCR_IMODE_MASK) == TI12XX_DCR_IMODE_ALL_SERIAL) && 761 (pwr_irqs_off || ti12xx_2nd_slot_empty(socket))) { 762 switch (socket->dev->device) { 763 case PCI_DEVICE_ID_TI_1250: 764 case PCI_DEVICE_ID_TI_1251A: 765 case PCI_DEVICE_ID_TI_1251B: 766 case PCI_DEVICE_ID_TI_1450: 767 case PCI_DEVICE_ID_TI_1451A: 768 case PCI_DEVICE_ID_TI_4450: 769 case PCI_DEVICE_ID_TI_4451: 770 /* these chips have no IRQSER setting in MFUNC3 */ 771 break; 772 773 default: 774 if (operation == HOOK_POWER_PRE) 775 mfunc = (mfunc & ~TI122X_MFUNC3_MASK); 776 else 777 mfunc = (mfunc & ~TI122X_MFUNC3_MASK) | TI122X_MFUNC3_IRQSER; 778 } 779 780 return 0; 781 } 782 783 /* do the job differently for func0/1 */ 784 if ((PCI_FUNC(socket->dev->devfn) == 0) || 785 ((sysctl & TI122X_SCR_INTRTIE) && 786 (pwr_irqs_off || ti12xx_2nd_slot_empty(socket)))) { 787 /* some bridges are different */ 788 switch (socket->dev->device) { 789 case PCI_DEVICE_ID_TI_1250: 790 case PCI_DEVICE_ID_TI_1251A: 791 case PCI_DEVICE_ID_TI_1251B: 792 case PCI_DEVICE_ID_TI_1450: 793 /* those oldies use gpio3 for INTA */ 794 gpio3 = config_readb(socket, TI1250_GPIO3_CONTROL); 795 if (operation == HOOK_POWER_PRE) 796 gpio3 = (gpio3 & ~TI1250_GPIO_MODE_MASK) | 0x40; 797 else 798 gpio3 &= ~TI1250_GPIO_MODE_MASK; 799 config_writeb(socket, TI1250_GPIO3_CONTROL, gpio3); 800 break; 801 802 default: 803 /* all new bridges are the same */ 804 if (operation == HOOK_POWER_PRE) 805 mfunc &= ~TI122X_MFUNC0_MASK; 806 else 807 mfunc |= TI122X_MFUNC0_INTA; 808 config_writel(socket, TI122X_MFUNC, mfunc); 809 } 810 } else { 811 switch (socket->dev->device) { 812 case PCI_DEVICE_ID_TI_1251A: 813 case PCI_DEVICE_ID_TI_1251B: 814 case PCI_DEVICE_ID_TI_1450: 815 /* those have INTA elsewhere and INTB in MFUNC0 */ 816 if (operation == HOOK_POWER_PRE) 817 mfunc &= ~TI122X_MFUNC0_MASK; 818 else 819 mfunc |= TI125X_MFUNC0_INTB; 820 config_writel(socket, TI122X_MFUNC, mfunc); 821 822 break; 823 824 default: 825 /* all new bridges are the same */ 826 if (operation == HOOK_POWER_PRE) 827 mfunc &= ~TI122X_MFUNC1_MASK; 828 else 829 mfunc |= TI122X_MFUNC1_INTB; 830 config_writel(socket, TI122X_MFUNC, mfunc); 831 } 832 } 833 834 return 0; 835} 836 837static int ti12xx_override(struct yenta_socket *socket) 838{ 839 u32 val, val_orig; 840 841 /* make sure that memory burst is active */ 842 val_orig = val = config_readl(socket, TI113X_SYSTEM_CONTROL); 843 if (disable_clkrun && PCI_FUNC(socket->dev->devfn) == 0) { 844 dev_printk(KERN_INFO, &socket->dev->dev, 845 "Disabling CLKRUN feature\n"); 846 val |= TI113X_SCR_KEEPCLK; 847 } 848 if (!(val & TI122X_SCR_MRBURSTUP)) { 849 dev_printk(KERN_INFO, &socket->dev->dev, 850 "Enabling burst memory read transactions\n"); 851 val |= TI122X_SCR_MRBURSTUP; 852 } 853 if (val_orig != val) 854 config_writel(socket, TI113X_SYSTEM_CONTROL, val); 855 856 /* 857 * Yenta expects controllers to use CSCINT to route 858 * CSC interrupts to PCI rather than INTVAL. 859 */ 860 val = config_readb(socket, TI1250_DIAGNOSTIC); 861 dev_printk(KERN_INFO, &socket->dev->dev, 862 "Using %s to route CSC interrupts to PCI\n", 863 (val & TI1250_DIAG_PCI_CSC) ? "CSCINT" : "INTVAL"); 864 dev_printk(KERN_INFO, &socket->dev->dev, 865 "Routing CardBus interrupts to %s\n", 866 (val & TI1250_DIAG_PCI_IREQ) ? "PCI" : "ISA"); 867 868 /* do irqrouting, depending on function */ 869 if (PCI_FUNC(socket->dev->devfn) == 0) 870 ti12xx_irqroute_func0(socket); 871 else 872 ti12xx_irqroute_func1(socket); 873 874 /* install power hook */ 875 socket->socket.power_hook = ti12xx_power_hook; 876 877 return ti_override(socket); 878} 879 880 881static int ti1250_override(struct yenta_socket *socket) 882{ 883 u8 old, diag; 884 885 old = config_readb(socket, TI1250_DIAGNOSTIC); 886 diag = old & ~(TI1250_DIAG_PCI_CSC | TI1250_DIAG_PCI_IREQ); 887 if (socket->cb_irq) 888 diag |= TI1250_DIAG_PCI_CSC | TI1250_DIAG_PCI_IREQ; 889 890 if (diag != old) { 891 dev_printk(KERN_INFO, &socket->dev->dev, 892 "adjusting diagnostic: %02x -> %02x\n", 893 old, diag); 894 config_writeb(socket, TI1250_DIAGNOSTIC, diag); 895 } 896 897 return ti12xx_override(socket); 898} 899 900 901/** 902 * EnE specific part. EnE bridges are register compatible with TI bridges but 903 * have their own test registers and more important their own little problems. 904 * Some fixup code to make everybody happy (TM). 905 */ 906 907#ifdef CONFIG_YENTA_ENE_TUNE 908/* 909 * set/clear various test bits: 910 * Defaults to clear the bit. 911 * - mask (u8) defines what bits to change 912 * - bits (u8) is the values to change them to 913 * -> it's 914 * current = (current & ~mask) | bits 915 */ 916/* pci ids of devices that wants to have the bit set */ 917#define DEVID(_vend,_dev,_subvend,_subdev,mask,bits) { \ 918 .vendor = _vend, \ 919 .device = _dev, \ 920 .subvendor = _subvend, \ 921 .subdevice = _subdev, \ 922 .driver_data = ((mask) << 8 | (bits)), \ 923 } 924static struct pci_device_id ene_tune_tbl[] = { 925 /* Echo Audio products based on motorola DSP56301 and DSP56361 */ 926 DEVID(PCI_VENDOR_ID_MOTOROLA, 0x1801, 0xECC0, PCI_ANY_ID, 927 ENE_TEST_C9_TLTENABLE | ENE_TEST_C9_PFENABLE, ENE_TEST_C9_TLTENABLE), 928 DEVID(PCI_VENDOR_ID_MOTOROLA, 0x3410, 0xECC0, PCI_ANY_ID, 929 ENE_TEST_C9_TLTENABLE | ENE_TEST_C9_PFENABLE, ENE_TEST_C9_TLTENABLE), 930 931 {} 932}; 933 934static void ene_tune_bridge(struct pcmcia_socket *sock, struct pci_bus *bus) 935{ 936 struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket); 937 struct pci_dev *dev; 938 struct pci_device_id *id = NULL; 939 u8 test_c9, old_c9, mask, bits; 940 941 list_for_each_entry(dev, &bus->devices, bus_list) { 942 id = (struct pci_device_id *) pci_match_id(ene_tune_tbl, dev); 943 if (id) 944 break; 945 } 946 947 test_c9 = old_c9 = config_readb(socket, ENE_TEST_C9); 948 if (id) { 949 mask = (id->driver_data >> 8) & 0xFF; 950 bits = id->driver_data & 0xFF; 951 952 test_c9 = (test_c9 & ~mask) | bits; 953 } 954 else 955 /* default to clear TLTEnable bit, old behaviour */ 956 test_c9 &= ~ENE_TEST_C9_TLTENABLE; 957 958 dev_printk(KERN_INFO, &socket->dev->dev, 959 "EnE: chaning testregister 0xC9, %02x -> %02x\n", 960 old_c9, test_c9); 961 config_writeb(socket, ENE_TEST_C9, test_c9); 962} 963 964static int ene_override(struct yenta_socket *socket) 965{ 966 /* install tune_bridge() function */ 967 socket->socket.tune_bridge = ene_tune_bridge; 968 969 return ti1250_override(socket); 970} 971#else 972# define ene_override ti1250_override 973#endif /* !CONFIG_YENTA_ENE_TUNE */ 974 975#endif /* _LINUX_TI113X_H */ 976