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  • only in /netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/net/
1/*
2 * Xilinx EmacLite Linux driver for the Xilinx Ethernet MAC Lite device.
3 *
4 * This is a new flat driver which is based on the original emac_lite
5 * driver from John Williams <john.williams@petalogix.com>.
6 *
7 * 2007-2009 (c) Xilinx, Inc.
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 */
14
15#include <linux/module.h>
16#include <linux/uaccess.h>
17#include <linux/init.h>
18#include <linux/netdevice.h>
19#include <linux/etherdevice.h>
20#include <linux/skbuff.h>
21#include <linux/io.h>
22#include <linux/slab.h>
23#include <linux/of_address.h>
24#include <linux/of_device.h>
25#include <linux/of_platform.h>
26#include <linux/of_mdio.h>
27#include <linux/phy.h>
28
29#define DRIVER_NAME "xilinx_emaclite"
30
31/* Register offsets for the EmacLite Core */
32#define XEL_TXBUFF_OFFSET 	0x0		/* Transmit Buffer */
33#define XEL_MDIOADDR_OFFSET	0x07E4		/* MDIO Address Register */
34#define XEL_MDIOWR_OFFSET	0x07E8		/* MDIO Write Data Register */
35#define XEL_MDIORD_OFFSET	0x07EC		/* MDIO Read Data Register */
36#define XEL_MDIOCTRL_OFFSET	0x07F0		/* MDIO Control Register */
37#define XEL_GIER_OFFSET		0x07F8		/* GIE Register */
38#define XEL_TSR_OFFSET		0x07FC		/* Tx status */
39#define XEL_TPLR_OFFSET		0x07F4		/* Tx packet length */
40
41#define XEL_RXBUFF_OFFSET	0x1000		/* Receive Buffer */
42#define XEL_RPLR_OFFSET		0x100C		/* Rx packet length */
43#define XEL_RSR_OFFSET		0x17FC		/* Rx status */
44
45#define XEL_BUFFER_OFFSET	0x0800		/* Next Tx/Rx buffer's offset */
46
47/* MDIO Address Register Bit Masks */
48#define XEL_MDIOADDR_REGADR_MASK  0x0000001F	/* Register Address */
49#define XEL_MDIOADDR_PHYADR_MASK  0x000003E0	/* PHY Address */
50#define XEL_MDIOADDR_PHYADR_SHIFT 5
51#define XEL_MDIOADDR_OP_MASK	  0x00000400	/* RD/WR Operation */
52
53/* MDIO Write Data Register Bit Masks */
54#define XEL_MDIOWR_WRDATA_MASK	  0x0000FFFF	/* Data to be Written */
55
56/* MDIO Read Data Register Bit Masks */
57#define XEL_MDIORD_RDDATA_MASK	  0x0000FFFF	/* Data to be Read */
58
59/* MDIO Control Register Bit Masks */
60#define XEL_MDIOCTRL_MDIOSTS_MASK 0x00000001	/* MDIO Status Mask */
61#define XEL_MDIOCTRL_MDIOEN_MASK  0x00000008	/* MDIO Enable */
62
63/* Global Interrupt Enable Register (GIER) Bit Masks */
64#define XEL_GIER_GIE_MASK	0x80000000 	/* Global Enable */
65
66/* Transmit Status Register (TSR) Bit Masks */
67#define XEL_TSR_XMIT_BUSY_MASK	 0x00000001 	/* Tx complete */
68#define XEL_TSR_PROGRAM_MASK	 0x00000002 	/* Program the MAC address */
69#define XEL_TSR_XMIT_IE_MASK	 0x00000008 	/* Tx interrupt enable bit */
70#define XEL_TSR_XMIT_ACTIVE_MASK 0x80000000 	/* Buffer is active, SW bit
71						 * only. This is not documented
72						 * in the HW spec */
73
74/* Define for programming the MAC address into the EmacLite */
75#define XEL_TSR_PROG_MAC_ADDR	(XEL_TSR_XMIT_BUSY_MASK | XEL_TSR_PROGRAM_MASK)
76
77/* Receive Status Register (RSR) */
78#define XEL_RSR_RECV_DONE_MASK	0x00000001 	/* Rx complete */
79#define XEL_RSR_RECV_IE_MASK	0x00000008 	/* Rx interrupt enable bit */
80
81/* Transmit Packet Length Register (TPLR) */
82#define XEL_TPLR_LENGTH_MASK	0x0000FFFF 	/* Tx packet length */
83
84/* Receive Packet Length Register (RPLR) */
85#define XEL_RPLR_LENGTH_MASK	0x0000FFFF 	/* Rx packet length */
86
87#define XEL_HEADER_OFFSET	12 		/* Offset to length field */
88#define XEL_HEADER_SHIFT	16 		/* Shift value for length */
89
90/* General Ethernet Definitions */
91#define XEL_ARP_PACKET_SIZE		28 	/* Max ARP packet size */
92#define XEL_HEADER_IP_LENGTH_OFFSET	16 	/* IP Length Offset */
93
94
95
96#define TX_TIMEOUT		(60*HZ)		/* Tx timeout is 60 seconds. */
97#define ALIGNMENT		4
98
99/* BUFFER_ALIGN(adr) calculates the number of bytes to the next alignment. */
100#define BUFFER_ALIGN(adr) ((ALIGNMENT - ((u32) adr)) % ALIGNMENT)
101
102/**
103 * struct net_local - Our private per device data
104 * @ndev:		instance of the network device
105 * @tx_ping_pong:	indicates whether Tx Pong buffer is configured in HW
106 * @rx_ping_pong:	indicates whether Rx Pong buffer is configured in HW
107 * @next_tx_buf_to_use:	next Tx buffer to write to
108 * @next_rx_buf_to_use:	next Rx buffer to read from
109 * @base_addr:		base address of the Emaclite device
110 * @reset_lock:		lock used for synchronization
111 * @deferred_skb:	holds an skb (for transmission at a later time) when the
112 *			Tx buffer is not free
113 * @phy_dev:		pointer to the PHY device
114 * @phy_node:		pointer to the PHY device node
115 * @mii_bus:		pointer to the MII bus
116 * @mdio_irqs:		IRQs table for MDIO bus
117 * @last_link:		last link status
118 * @has_mdio:		indicates whether MDIO is included in the HW
119 */
120struct net_local {
121
122	struct net_device *ndev;
123
124	bool tx_ping_pong;
125	bool rx_ping_pong;
126	u32 next_tx_buf_to_use;
127	u32 next_rx_buf_to_use;
128	void __iomem *base_addr;
129
130	spinlock_t reset_lock;
131	struct sk_buff *deferred_skb;
132
133	struct phy_device *phy_dev;
134	struct device_node *phy_node;
135
136	struct mii_bus *mii_bus;
137	int mdio_irqs[PHY_MAX_ADDR];
138
139	int last_link;
140	bool has_mdio;
141};
142
143
144/*************************/
145/* EmacLite driver calls */
146/*************************/
147
148/**
149 * xemaclite_enable_interrupts - Enable the interrupts for the EmacLite device
150 * @drvdata:	Pointer to the Emaclite device private data
151 *
152 * This function enables the Tx and Rx interrupts for the Emaclite device along
153 * with the Global Interrupt Enable.
154 */
155static void xemaclite_enable_interrupts(struct net_local *drvdata)
156{
157	u32 reg_data;
158
159	/* Enable the Tx interrupts for the first Buffer */
160	reg_data = in_be32(drvdata->base_addr + XEL_TSR_OFFSET);
161	out_be32(drvdata->base_addr + XEL_TSR_OFFSET,
162		 reg_data | XEL_TSR_XMIT_IE_MASK);
163
164	/* Enable the Tx interrupts for the second Buffer if
165	 * configured in HW */
166	if (drvdata->tx_ping_pong != 0) {
167		reg_data = in_be32(drvdata->base_addr +
168				   XEL_BUFFER_OFFSET + XEL_TSR_OFFSET);
169		out_be32(drvdata->base_addr + XEL_BUFFER_OFFSET +
170			 XEL_TSR_OFFSET,
171			 reg_data | XEL_TSR_XMIT_IE_MASK);
172	}
173
174	/* Enable the Rx interrupts for the first buffer */
175	out_be32(drvdata->base_addr + XEL_RSR_OFFSET,
176		 XEL_RSR_RECV_IE_MASK);
177
178	/* Enable the Rx interrupts for the second Buffer if
179	 * configured in HW */
180	if (drvdata->rx_ping_pong != 0) {
181		out_be32(drvdata->base_addr + XEL_BUFFER_OFFSET +
182			 XEL_RSR_OFFSET,
183			 XEL_RSR_RECV_IE_MASK);
184	}
185
186	/* Enable the Global Interrupt Enable */
187	out_be32(drvdata->base_addr + XEL_GIER_OFFSET, XEL_GIER_GIE_MASK);
188}
189
190/**
191 * xemaclite_disable_interrupts - Disable the interrupts for the EmacLite device
192 * @drvdata:	Pointer to the Emaclite device private data
193 *
194 * This function disables the Tx and Rx interrupts for the Emaclite device,
195 * along with the Global Interrupt Enable.
196 */
197static void xemaclite_disable_interrupts(struct net_local *drvdata)
198{
199	u32 reg_data;
200
201	/* Disable the Global Interrupt Enable */
202	out_be32(drvdata->base_addr + XEL_GIER_OFFSET, XEL_GIER_GIE_MASK);
203
204	/* Disable the Tx interrupts for the first buffer */
205	reg_data = in_be32(drvdata->base_addr + XEL_TSR_OFFSET);
206	out_be32(drvdata->base_addr + XEL_TSR_OFFSET,
207		 reg_data & (~XEL_TSR_XMIT_IE_MASK));
208
209	/* Disable the Tx interrupts for the second Buffer
210	 * if configured in HW */
211	if (drvdata->tx_ping_pong != 0) {
212		reg_data = in_be32(drvdata->base_addr + XEL_BUFFER_OFFSET +
213				   XEL_TSR_OFFSET);
214		out_be32(drvdata->base_addr + XEL_BUFFER_OFFSET +
215			 XEL_TSR_OFFSET,
216			 reg_data & (~XEL_TSR_XMIT_IE_MASK));
217	}
218
219	/* Disable the Rx interrupts for the first buffer */
220	reg_data = in_be32(drvdata->base_addr + XEL_RSR_OFFSET);
221	out_be32(drvdata->base_addr + XEL_RSR_OFFSET,
222		 reg_data & (~XEL_RSR_RECV_IE_MASK));
223
224	/* Disable the Rx interrupts for the second buffer
225	 * if configured in HW */
226	if (drvdata->rx_ping_pong != 0) {
227
228		reg_data = in_be32(drvdata->base_addr + XEL_BUFFER_OFFSET +
229				   XEL_RSR_OFFSET);
230		out_be32(drvdata->base_addr + XEL_BUFFER_OFFSET +
231			 XEL_RSR_OFFSET,
232			 reg_data & (~XEL_RSR_RECV_IE_MASK));
233	}
234}
235
236/**
237 * xemaclite_aligned_write - Write from 16-bit aligned to 32-bit aligned address
238 * @src_ptr:	Void pointer to the 16-bit aligned source address
239 * @dest_ptr:	Pointer to the 32-bit aligned destination address
240 * @length:	Number bytes to write from source to destination
241 *
242 * This function writes data from a 16-bit aligned buffer to a 32-bit aligned
243 * address in the EmacLite device.
244 */
245static void xemaclite_aligned_write(void *src_ptr, u32 *dest_ptr,
246				    unsigned length)
247{
248	u32 align_buffer;
249	u32 *to_u32_ptr;
250	u16 *from_u16_ptr, *to_u16_ptr;
251
252	to_u32_ptr = dest_ptr;
253	from_u16_ptr = (u16 *) src_ptr;
254	align_buffer = 0;
255
256	for (; length > 3; length -= 4) {
257		to_u16_ptr = (u16 *) ((void *) &align_buffer);
258		*to_u16_ptr++ = *from_u16_ptr++;
259		*to_u16_ptr++ = *from_u16_ptr++;
260
261		/* Output a word */
262		*to_u32_ptr++ = align_buffer;
263	}
264	if (length) {
265		u8 *from_u8_ptr, *to_u8_ptr;
266
267		/* Set up to output the remaining data */
268		align_buffer = 0;
269		to_u8_ptr = (u8 *) &align_buffer;
270		from_u8_ptr = (u8 *) from_u16_ptr;
271
272		/* Output the remaining data */
273		for (; length > 0; length--)
274			*to_u8_ptr++ = *from_u8_ptr++;
275
276		*to_u32_ptr = align_buffer;
277	}
278}
279
280/**
281 * xemaclite_aligned_read - Read from 32-bit aligned to 16-bit aligned buffer
282 * @src_ptr:	Pointer to the 32-bit aligned source address
283 * @dest_ptr:	Pointer to the 16-bit aligned destination address
284 * @length:	Number bytes to read from source to destination
285 *
286 * This function reads data from a 32-bit aligned address in the EmacLite device
287 * to a 16-bit aligned buffer.
288 */
289static void xemaclite_aligned_read(u32 *src_ptr, u8 *dest_ptr,
290				   unsigned length)
291{
292	u16 *to_u16_ptr, *from_u16_ptr;
293	u32 *from_u32_ptr;
294	u32 align_buffer;
295
296	from_u32_ptr = src_ptr;
297	to_u16_ptr = (u16 *) dest_ptr;
298
299	for (; length > 3; length -= 4) {
300		/* Copy each word into the temporary buffer */
301		align_buffer = *from_u32_ptr++;
302		from_u16_ptr = (u16 *)&align_buffer;
303
304		/* Read data from source */
305		*to_u16_ptr++ = *from_u16_ptr++;
306		*to_u16_ptr++ = *from_u16_ptr++;
307	}
308
309	if (length) {
310		u8 *to_u8_ptr, *from_u8_ptr;
311
312		/* Set up to read the remaining data */
313		to_u8_ptr = (u8 *) to_u16_ptr;
314		align_buffer = *from_u32_ptr++;
315		from_u8_ptr = (u8 *) &align_buffer;
316
317		/* Read the remaining data */
318		for (; length > 0; length--)
319			*to_u8_ptr = *from_u8_ptr;
320	}
321}
322
323/**
324 * xemaclite_send_data - Send an Ethernet frame
325 * @drvdata:	Pointer to the Emaclite device private data
326 * @data:	Pointer to the data to be sent
327 * @byte_count:	Total frame size, including header
328 *
329 * This function checks if the Tx buffer of the Emaclite device is free to send
330 * data. If so, it fills the Tx buffer with data for transmission. Otherwise, it
331 * returns an error.
332 *
333 * Return:	0 upon success or -1 if the buffer(s) are full.
334 *
335 * Note:	The maximum Tx packet size can not be more than Ethernet header
336 *		(14 Bytes) + Maximum MTU (1500 bytes). This is excluding FCS.
337 */
338static int xemaclite_send_data(struct net_local *drvdata, u8 *data,
339			       unsigned int byte_count)
340{
341	u32 reg_data;
342	void __iomem *addr;
343
344	/* Determine the expected Tx buffer address */
345	addr = drvdata->base_addr + drvdata->next_tx_buf_to_use;
346
347	/* If the length is too large, truncate it */
348	if (byte_count > ETH_FRAME_LEN)
349		byte_count = ETH_FRAME_LEN;
350
351	/* Check if the expected buffer is available */
352	reg_data = in_be32(addr + XEL_TSR_OFFSET);
353	if ((reg_data & (XEL_TSR_XMIT_BUSY_MASK |
354	     XEL_TSR_XMIT_ACTIVE_MASK)) == 0) {
355
356		/* Switch to next buffer if configured */
357		if (drvdata->tx_ping_pong != 0)
358			drvdata->next_tx_buf_to_use ^= XEL_BUFFER_OFFSET;
359	} else if (drvdata->tx_ping_pong != 0) {
360		/* If the expected buffer is full, try the other buffer,
361		 * if it is configured in HW */
362
363		addr = (void __iomem __force *)((u32 __force)addr ^
364						 XEL_BUFFER_OFFSET);
365		reg_data = in_be32(addr + XEL_TSR_OFFSET);
366
367		if ((reg_data & (XEL_TSR_XMIT_BUSY_MASK |
368		     XEL_TSR_XMIT_ACTIVE_MASK)) != 0)
369			return -1; /* Buffers were full, return failure */
370	} else
371		return -1; /* Buffer was full, return failure */
372
373	/* Write the frame to the buffer */
374	xemaclite_aligned_write(data, (u32 __force *) addr, byte_count);
375
376	out_be32(addr + XEL_TPLR_OFFSET, (byte_count & XEL_TPLR_LENGTH_MASK));
377
378	/* Update the Tx Status Register to indicate that there is a
379	 * frame to send. Set the XEL_TSR_XMIT_ACTIVE_MASK flag which
380	 * is used by the interrupt handler to check whether a frame
381	 * has been transmitted */
382	reg_data = in_be32(addr + XEL_TSR_OFFSET);
383	reg_data |= (XEL_TSR_XMIT_BUSY_MASK | XEL_TSR_XMIT_ACTIVE_MASK);
384	out_be32(addr + XEL_TSR_OFFSET, reg_data);
385
386	return 0;
387}
388
389/**
390 * xemaclite_recv_data - Receive a frame
391 * @drvdata:	Pointer to the Emaclite device private data
392 * @data:	Address where the data is to be received
393 *
394 * This function is intended to be called from the interrupt context or
395 * with a wrapper which waits for the receive frame to be available.
396 *
397 * Return:	Total number of bytes received
398 */
399static u16 xemaclite_recv_data(struct net_local *drvdata, u8 *data)
400{
401	void __iomem *addr;
402	u16 length, proto_type;
403	u32 reg_data;
404
405	/* Determine the expected buffer address */
406	addr = (drvdata->base_addr + drvdata->next_rx_buf_to_use);
407
408	/* Verify which buffer has valid data */
409	reg_data = in_be32(addr + XEL_RSR_OFFSET);
410
411	if ((reg_data & XEL_RSR_RECV_DONE_MASK) == XEL_RSR_RECV_DONE_MASK) {
412		if (drvdata->rx_ping_pong != 0)
413			drvdata->next_rx_buf_to_use ^= XEL_BUFFER_OFFSET;
414	} else {
415		/* The instance is out of sync, try other buffer if other
416		 * buffer is configured, return 0 otherwise. If the instance is
417		 * out of sync, do not update the 'next_rx_buf_to_use' since it
418		 * will correct on subsequent calls */
419		if (drvdata->rx_ping_pong != 0)
420			addr = (void __iomem __force *)((u32 __force)addr ^
421							 XEL_BUFFER_OFFSET);
422		else
423			return 0;	/* No data was available */
424
425		/* Verify that buffer has valid data */
426		reg_data = in_be32(addr + XEL_RSR_OFFSET);
427		if ((reg_data & XEL_RSR_RECV_DONE_MASK) !=
428		     XEL_RSR_RECV_DONE_MASK)
429			return 0;	/* No data was available */
430	}
431
432	/* Get the protocol type of the ethernet frame that arrived */
433	proto_type = ((in_be32(addr + XEL_HEADER_OFFSET +
434			XEL_RXBUFF_OFFSET) >> XEL_HEADER_SHIFT) &
435			XEL_RPLR_LENGTH_MASK);
436
437	/* Check if received ethernet frame is a raw ethernet frame
438	 * or an IP packet or an ARP packet */
439	if (proto_type > (ETH_FRAME_LEN + ETH_FCS_LEN)) {
440
441		if (proto_type == ETH_P_IP) {
442			length = ((in_be32(addr +
443					XEL_HEADER_IP_LENGTH_OFFSET +
444					XEL_RXBUFF_OFFSET) >>
445					XEL_HEADER_SHIFT) &
446					XEL_RPLR_LENGTH_MASK);
447			length += ETH_HLEN + ETH_FCS_LEN;
448
449		} else if (proto_type == ETH_P_ARP)
450			length = XEL_ARP_PACKET_SIZE + ETH_HLEN + ETH_FCS_LEN;
451		else
452			/* Field contains type other than IP or ARP, use max
453			 * frame size and let user parse it */
454			length = ETH_FRAME_LEN + ETH_FCS_LEN;
455	} else
456		/* Use the length in the frame, plus the header and trailer */
457		length = proto_type + ETH_HLEN + ETH_FCS_LEN;
458
459	/* Read from the EmacLite device */
460	xemaclite_aligned_read((u32 __force *) (addr + XEL_RXBUFF_OFFSET),
461				data, length);
462
463	/* Acknowledge the frame */
464	reg_data = in_be32(addr + XEL_RSR_OFFSET);
465	reg_data &= ~XEL_RSR_RECV_DONE_MASK;
466	out_be32(addr + XEL_RSR_OFFSET, reg_data);
467
468	return length;
469}
470
471/**
472 * xemaclite_update_address - Update the MAC address in the device
473 * @drvdata:	Pointer to the Emaclite device private data
474 * @address_ptr:Pointer to the MAC address (MAC address is a 48-bit value)
475 *
476 * Tx must be idle and Rx should be idle for deterministic results.
477 * It is recommended that this function should be called after the
478 * initialization and before transmission of any packets from the device.
479 * The MAC address can be programmed using any of the two transmit
480 * buffers (if configured).
481 */
482static void xemaclite_update_address(struct net_local *drvdata,
483				     u8 *address_ptr)
484{
485	void __iomem *addr;
486	u32 reg_data;
487
488	/* Determine the expected Tx buffer address */
489	addr = drvdata->base_addr + drvdata->next_tx_buf_to_use;
490
491	xemaclite_aligned_write(address_ptr, (u32 __force *) addr, ETH_ALEN);
492
493	out_be32(addr + XEL_TPLR_OFFSET, ETH_ALEN);
494
495	/* Update the MAC address in the EmacLite */
496	reg_data = in_be32(addr + XEL_TSR_OFFSET);
497	out_be32(addr + XEL_TSR_OFFSET, reg_data | XEL_TSR_PROG_MAC_ADDR);
498
499	/* Wait for EmacLite to finish with the MAC address update */
500	while ((in_be32(addr + XEL_TSR_OFFSET) &
501		XEL_TSR_PROG_MAC_ADDR) != 0)
502		;
503}
504
505/**
506 * xemaclite_set_mac_address - Set the MAC address for this device
507 * @dev:	Pointer to the network device instance
508 * @addr:	Void pointer to the sockaddr structure
509 *
510 * This function copies the HW address from the sockaddr strucutre to the
511 * net_device structure and updates the address in HW.
512 *
513 * Return:	Error if the net device is busy or 0 if the addr is set
514 *		successfully
515 */
516static int xemaclite_set_mac_address(struct net_device *dev, void *address)
517{
518	struct net_local *lp = (struct net_local *) netdev_priv(dev);
519	struct sockaddr *addr = address;
520
521	if (netif_running(dev))
522		return -EBUSY;
523
524	memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
525	xemaclite_update_address(lp, dev->dev_addr);
526	return 0;
527}
528
529/**
530 * xemaclite_tx_timeout - Callback for Tx Timeout
531 * @dev:	Pointer to the network device
532 *
533 * This function is called when Tx time out occurs for Emaclite device.
534 */
535static void xemaclite_tx_timeout(struct net_device *dev)
536{
537	struct net_local *lp = (struct net_local *) netdev_priv(dev);
538	unsigned long flags;
539
540	dev_err(&lp->ndev->dev, "Exceeded transmit timeout of %lu ms\n",
541		TX_TIMEOUT * 1000UL / HZ);
542
543	dev->stats.tx_errors++;
544
545	/* Reset the device */
546	spin_lock_irqsave(&lp->reset_lock, flags);
547
548	/* Shouldn't really be necessary, but shouldn't hurt */
549	netif_stop_queue(dev);
550
551	xemaclite_disable_interrupts(lp);
552	xemaclite_enable_interrupts(lp);
553
554	if (lp->deferred_skb) {
555		dev_kfree_skb(lp->deferred_skb);
556		lp->deferred_skb = NULL;
557		dev->stats.tx_errors++;
558	}
559
560	/* To exclude tx timeout */
561	dev->trans_start = jiffies; /* prevent tx timeout */
562
563	/* We're all ready to go. Start the queue */
564	netif_wake_queue(dev);
565	spin_unlock_irqrestore(&lp->reset_lock, flags);
566}
567
568/**********************/
569/* Interrupt Handlers */
570/**********************/
571
572/**
573 * xemaclite_tx_handler - Interrupt handler for frames sent
574 * @dev:	Pointer to the network device
575 *
576 * This function updates the number of packets transmitted and handles the
577 * deferred skb, if there is one.
578 */
579static void xemaclite_tx_handler(struct net_device *dev)
580{
581	struct net_local *lp = (struct net_local *) netdev_priv(dev);
582
583	dev->stats.tx_packets++;
584	if (lp->deferred_skb) {
585		if (xemaclite_send_data(lp,
586					(u8 *) lp->deferred_skb->data,
587					lp->deferred_skb->len) != 0)
588			return;
589		else {
590			dev->stats.tx_bytes += lp->deferred_skb->len;
591			dev_kfree_skb_irq(lp->deferred_skb);
592			lp->deferred_skb = NULL;
593			dev->trans_start = jiffies; /* prevent tx timeout */
594			netif_wake_queue(dev);
595		}
596	}
597}
598
599/**
600 * xemaclite_rx_handler- Interrupt handler for frames received
601 * @dev:	Pointer to the network device
602 *
603 * This function allocates memory for a socket buffer, fills it with data
604 * received and hands it over to the TCP/IP stack.
605 */
606static void xemaclite_rx_handler(struct net_device *dev)
607{
608	struct net_local *lp = (struct net_local *) netdev_priv(dev);
609	struct sk_buff *skb;
610	unsigned int align;
611	u32 len;
612
613	len = ETH_FRAME_LEN + ETH_FCS_LEN;
614	skb = dev_alloc_skb(len + ALIGNMENT);
615	if (!skb) {
616		/* Couldn't get memory. */
617		dev->stats.rx_dropped++;
618		dev_err(&lp->ndev->dev, "Could not allocate receive buffer\n");
619		return;
620	}
621
622	/*
623	 * A new skb should have the data halfword aligned, but this code is
624	 * here just in case that isn't true. Calculate how many
625	 * bytes we should reserve to get the data to start on a word
626	 * boundary */
627	align = BUFFER_ALIGN(skb->data);
628	if (align)
629		skb_reserve(skb, align);
630
631	skb_reserve(skb, 2);
632
633	len = xemaclite_recv_data(lp, (u8 *) skb->data);
634
635	if (!len) {
636		dev->stats.rx_errors++;
637		dev_kfree_skb_irq(skb);
638		return;
639	}
640
641	skb_put(skb, len);	/* Tell the skb how much data we got */
642
643	skb->protocol = eth_type_trans(skb, dev);
644	skb->ip_summed = CHECKSUM_NONE;
645
646	dev->stats.rx_packets++;
647	dev->stats.rx_bytes += len;
648
649	netif_rx(skb);		/* Send the packet upstream */
650}
651
652/**
653 * xemaclite_interrupt - Interrupt handler for this driver
654 * @irq:	Irq of the Emaclite device
655 * @dev_id:	Void pointer to the network device instance used as callback
656 *		reference
657 *
658 * This function handles the Tx and Rx interrupts of the EmacLite device.
659 */
660static irqreturn_t xemaclite_interrupt(int irq, void *dev_id)
661{
662	bool tx_complete = 0;
663	struct net_device *dev = dev_id;
664	struct net_local *lp = (struct net_local *) netdev_priv(dev);
665	void __iomem *base_addr = lp->base_addr;
666	u32 tx_status;
667
668	/* Check if there is Rx Data available */
669	if ((in_be32(base_addr + XEL_RSR_OFFSET) & XEL_RSR_RECV_DONE_MASK) ||
670			(in_be32(base_addr + XEL_BUFFER_OFFSET + XEL_RSR_OFFSET)
671			 & XEL_RSR_RECV_DONE_MASK))
672
673		xemaclite_rx_handler(dev);
674
675	/* Check if the Transmission for the first buffer is completed */
676	tx_status = in_be32(base_addr + XEL_TSR_OFFSET);
677	if (((tx_status & XEL_TSR_XMIT_BUSY_MASK) == 0) &&
678		(tx_status & XEL_TSR_XMIT_ACTIVE_MASK) != 0) {
679
680		tx_status &= ~XEL_TSR_XMIT_ACTIVE_MASK;
681		out_be32(base_addr + XEL_TSR_OFFSET, tx_status);
682
683		tx_complete = 1;
684	}
685
686	/* Check if the Transmission for the second buffer is completed */
687	tx_status = in_be32(base_addr + XEL_BUFFER_OFFSET + XEL_TSR_OFFSET);
688	if (((tx_status & XEL_TSR_XMIT_BUSY_MASK) == 0) &&
689		(tx_status & XEL_TSR_XMIT_ACTIVE_MASK) != 0) {
690
691		tx_status &= ~XEL_TSR_XMIT_ACTIVE_MASK;
692		out_be32(base_addr + XEL_BUFFER_OFFSET + XEL_TSR_OFFSET,
693			 tx_status);
694
695		tx_complete = 1;
696	}
697
698	/* If there was a Tx interrupt, call the Tx Handler */
699	if (tx_complete != 0)
700		xemaclite_tx_handler(dev);
701
702	return IRQ_HANDLED;
703}
704
705/**********************/
706/* MDIO Bus functions */
707/**********************/
708
709/**
710 * xemaclite_mdio_wait - Wait for the MDIO to be ready to use
711 * @lp:		Pointer to the Emaclite device private data
712 *
713 * This function waits till the device is ready to accept a new MDIO
714 * request.
715 *
716 * Return:	0 for success or ETIMEDOUT for a timeout
717 */
718
719static int xemaclite_mdio_wait(struct net_local *lp)
720{
721	long end = jiffies + 2;
722
723	/* wait for the MDIO interface to not be busy or timeout
724	   after some time.
725	*/
726	while (in_be32(lp->base_addr + XEL_MDIOCTRL_OFFSET) &
727			XEL_MDIOCTRL_MDIOSTS_MASK) {
728		if (end - jiffies <= 0) {
729			WARN_ON(1);
730			return -ETIMEDOUT;
731		}
732		msleep(1);
733	}
734	return 0;
735}
736
737/**
738 * xemaclite_mdio_read - Read from a given MII management register
739 * @bus:	the mii_bus struct
740 * @phy_id:	the phy address
741 * @reg:	register number to read from
742 *
743 * This function waits till the device is ready to accept a new MDIO
744 * request and then writes the phy address to the MDIO Address register
745 * and reads data from MDIO Read Data register, when its available.
746 *
747 * Return:	Value read from the MII management register
748 */
749static int xemaclite_mdio_read(struct mii_bus *bus, int phy_id, int reg)
750{
751	struct net_local *lp = bus->priv;
752	u32 ctrl_reg;
753	u32 rc;
754
755	if (xemaclite_mdio_wait(lp))
756		return -ETIMEDOUT;
757
758	/* Write the PHY address, register number and set the OP bit in the
759	 * MDIO Address register. Set the Status bit in the MDIO Control
760	 * register to start a MDIO read transaction.
761	 */
762	ctrl_reg = in_be32(lp->base_addr + XEL_MDIOCTRL_OFFSET);
763	out_be32(lp->base_addr + XEL_MDIOADDR_OFFSET,
764		 XEL_MDIOADDR_OP_MASK |
765		 ((phy_id << XEL_MDIOADDR_PHYADR_SHIFT) | reg));
766	out_be32(lp->base_addr + XEL_MDIOCTRL_OFFSET,
767		 ctrl_reg | XEL_MDIOCTRL_MDIOSTS_MASK);
768
769	if (xemaclite_mdio_wait(lp))
770		return -ETIMEDOUT;
771
772	rc = in_be32(lp->base_addr + XEL_MDIORD_OFFSET);
773
774	dev_dbg(&lp->ndev->dev,
775		"xemaclite_mdio_read(phy_id=%i, reg=%x) == %x\n",
776		phy_id, reg, rc);
777
778	return rc;
779}
780
781/**
782 * xemaclite_mdio_write - Write to a given MII management register
783 * @bus:	the mii_bus struct
784 * @phy_id:	the phy address
785 * @reg:	register number to write to
786 * @val:	value to write to the register number specified by reg
787 *
788 * This fucntion waits till the device is ready to accept a new MDIO
789 * request and then writes the val to the MDIO Write Data register.
790 */
791static int xemaclite_mdio_write(struct mii_bus *bus, int phy_id, int reg,
792				u16 val)
793{
794	struct net_local *lp = bus->priv;
795	u32 ctrl_reg;
796
797	dev_dbg(&lp->ndev->dev,
798		"xemaclite_mdio_write(phy_id=%i, reg=%x, val=%x)\n",
799		phy_id, reg, val);
800
801	if (xemaclite_mdio_wait(lp))
802		return -ETIMEDOUT;
803
804	/* Write the PHY address, register number and clear the OP bit in the
805	 * MDIO Address register and then write the value into the MDIO Write
806	 * Data register. Finally, set the Status bit in the MDIO Control
807	 * register to start a MDIO write transaction.
808	 */
809	ctrl_reg = in_be32(lp->base_addr + XEL_MDIOCTRL_OFFSET);
810	out_be32(lp->base_addr + XEL_MDIOADDR_OFFSET,
811		 ~XEL_MDIOADDR_OP_MASK &
812		 ((phy_id << XEL_MDIOADDR_PHYADR_SHIFT) | reg));
813	out_be32(lp->base_addr + XEL_MDIOWR_OFFSET, val);
814	out_be32(lp->base_addr + XEL_MDIOCTRL_OFFSET,
815		 ctrl_reg | XEL_MDIOCTRL_MDIOSTS_MASK);
816
817	return 0;
818}
819
820/**
821 * xemaclite_mdio_reset - Reset the mdio bus.
822 * @bus:	Pointer to the MII bus
823 *
824 * This function is required(?) as per Documentation/networking/phy.txt.
825 * There is no reset in this device; this function always returns 0.
826 */
827static int xemaclite_mdio_reset(struct mii_bus *bus)
828{
829	return 0;
830}
831
832/**
833 * xemaclite_mdio_setup - Register mii_bus for the Emaclite device
834 * @lp:		Pointer to the Emaclite device private data
835 * @ofdev:	Pointer to OF device structure
836 *
837 * This function enables MDIO bus in the Emaclite device and registers a
838 * mii_bus.
839 *
840 * Return:	0 upon success or a negative error upon failure
841 */
842static int xemaclite_mdio_setup(struct net_local *lp, struct device *dev)
843{
844	struct mii_bus *bus;
845	int rc;
846	struct resource res;
847	struct device_node *np = of_get_parent(lp->phy_node);
848
849	/* Don't register the MDIO bus if the phy_node or its parent node
850	 * can't be found.
851	 */
852	if (!np)
853		return -ENODEV;
854
855	/* Enable the MDIO bus by asserting the enable bit in MDIO Control
856	 * register.
857	 */
858	out_be32(lp->base_addr + XEL_MDIOCTRL_OFFSET,
859		 XEL_MDIOCTRL_MDIOEN_MASK);
860
861	bus = mdiobus_alloc();
862	if (!bus)
863		return -ENOMEM;
864
865	of_address_to_resource(np, 0, &res);
866	snprintf(bus->id, MII_BUS_ID_SIZE, "%.8llx",
867		 (unsigned long long)res.start);
868	bus->priv = lp;
869	bus->name = "Xilinx Emaclite MDIO";
870	bus->read = xemaclite_mdio_read;
871	bus->write = xemaclite_mdio_write;
872	bus->reset = xemaclite_mdio_reset;
873	bus->parent = dev;
874	bus->irq = lp->mdio_irqs; /* preallocated IRQ table */
875
876	lp->mii_bus = bus;
877
878	rc = of_mdiobus_register(bus, np);
879	if (rc)
880		goto err_register;
881
882	return 0;
883
884err_register:
885	mdiobus_free(bus);
886	return rc;
887}
888
889/**
890 * xemaclite_adjust_link - Link state callback for the Emaclite device
891 * @ndev: pointer to net_device struct
892 *
893 * There's nothing in the Emaclite device to be configured when the link
894 * state changes. We just print the status.
895 */
896void xemaclite_adjust_link(struct net_device *ndev)
897{
898	struct net_local *lp = netdev_priv(ndev);
899	struct phy_device *phy = lp->phy_dev;
900	int link_state;
901
902	/* hash together the state values to decide if something has changed */
903	link_state = phy->speed | (phy->duplex << 1) | phy->link;
904
905	if (lp->last_link != link_state) {
906		lp->last_link = link_state;
907		phy_print_status(phy);
908	}
909}
910
911/**
912 * xemaclite_open - Open the network device
913 * @dev:	Pointer to the network device
914 *
915 * This function sets the MAC address, requests an IRQ and enables interrupts
916 * for the Emaclite device and starts the Tx queue.
917 * It also connects to the phy device, if MDIO is included in Emaclite device.
918 */
919static int xemaclite_open(struct net_device *dev)
920{
921	struct net_local *lp = (struct net_local *) netdev_priv(dev);
922	int retval;
923
924	/* Just to be safe, stop the device first */
925	xemaclite_disable_interrupts(lp);
926
927	if (lp->phy_node) {
928		u32 bmcr;
929
930		lp->phy_dev = of_phy_connect(lp->ndev, lp->phy_node,
931					     xemaclite_adjust_link, 0,
932					     PHY_INTERFACE_MODE_MII);
933		if (!lp->phy_dev) {
934			dev_err(&lp->ndev->dev, "of_phy_connect() failed\n");
935			return -ENODEV;
936		}
937
938		/* EmacLite doesn't support giga-bit speeds */
939		lp->phy_dev->supported &= (PHY_BASIC_FEATURES);
940		lp->phy_dev->advertising = lp->phy_dev->supported;
941
942		/* Don't advertise 1000BASE-T Full/Half duplex speeds */
943		phy_write(lp->phy_dev, MII_CTRL1000, 0);
944
945		/* Advertise only 10 and 100mbps full/half duplex speeds */
946		phy_write(lp->phy_dev, MII_ADVERTISE, ADVERTISE_ALL);
947
948		/* Restart auto negotiation */
949		bmcr = phy_read(lp->phy_dev, MII_BMCR);
950		bmcr |= (BMCR_ANENABLE | BMCR_ANRESTART);
951		phy_write(lp->phy_dev, MII_BMCR, bmcr);
952
953		phy_start(lp->phy_dev);
954	}
955
956	/* Set the MAC address each time opened */
957	xemaclite_update_address(lp, dev->dev_addr);
958
959	/* Grab the IRQ */
960	retval = request_irq(dev->irq, xemaclite_interrupt, 0, dev->name, dev);
961	if (retval) {
962		dev_err(&lp->ndev->dev, "Could not allocate interrupt %d\n",
963			dev->irq);
964		if (lp->phy_dev)
965			phy_disconnect(lp->phy_dev);
966		lp->phy_dev = NULL;
967
968		return retval;
969	}
970
971	/* Enable Interrupts */
972	xemaclite_enable_interrupts(lp);
973
974	/* We're ready to go */
975	netif_start_queue(dev);
976
977	return 0;
978}
979
980/**
981 * xemaclite_close - Close the network device
982 * @dev:	Pointer to the network device
983 *
984 * This function stops the Tx queue, disables interrupts and frees the IRQ for
985 * the Emaclite device.
986 * It also disconnects the phy device associated with the Emaclite device.
987 */
988static int xemaclite_close(struct net_device *dev)
989{
990	struct net_local *lp = (struct net_local *) netdev_priv(dev);
991
992	netif_stop_queue(dev);
993	xemaclite_disable_interrupts(lp);
994	free_irq(dev->irq, dev);
995
996	if (lp->phy_dev)
997		phy_disconnect(lp->phy_dev);
998	lp->phy_dev = NULL;
999
1000	return 0;
1001}
1002
1003/**
1004 * xemaclite_get_stats - Get the stats for the net_device
1005 * @dev:	Pointer to the network device
1006 *
1007 * This function returns the address of the 'net_device_stats' structure for the
1008 * given network device. This structure holds usage statistics for the network
1009 * device.
1010 *
1011 * Return:	Pointer to the net_device_stats structure.
1012 */
1013static struct net_device_stats *xemaclite_get_stats(struct net_device *dev)
1014{
1015	return &dev->stats;
1016}
1017
1018/**
1019 * xemaclite_send - Transmit a frame
1020 * @orig_skb:	Pointer to the socket buffer to be transmitted
1021 * @dev:	Pointer to the network device
1022 *
1023 * This function checks if the Tx buffer of the Emaclite device is free to send
1024 * data. If so, it fills the Tx buffer with data from socket buffer data,
1025 * updates the stats and frees the socket buffer. The Tx completion is signaled
1026 * by an interrupt. If the Tx buffer isn't free, then the socket buffer is
1027 * deferred and the Tx queue is stopped so that the deferred socket buffer can
1028 * be transmitted when the Emaclite device is free to transmit data.
1029 *
1030 * Return:	0, always.
1031 */
1032static int xemaclite_send(struct sk_buff *orig_skb, struct net_device *dev)
1033{
1034	struct net_local *lp = (struct net_local *) netdev_priv(dev);
1035	struct sk_buff *new_skb;
1036	unsigned int len;
1037	unsigned long flags;
1038
1039	len = orig_skb->len;
1040
1041	new_skb = orig_skb;
1042
1043	spin_lock_irqsave(&lp->reset_lock, flags);
1044	if (xemaclite_send_data(lp, (u8 *) new_skb->data, len) != 0) {
1045		/* If the Emaclite Tx buffer is busy, stop the Tx queue and
1046		 * defer the skb for transmission at a later point when the
1047		 * current transmission is complete */
1048		netif_stop_queue(dev);
1049		lp->deferred_skb = new_skb;
1050		spin_unlock_irqrestore(&lp->reset_lock, flags);
1051		return 0;
1052	}
1053	spin_unlock_irqrestore(&lp->reset_lock, flags);
1054
1055	dev->stats.tx_bytes += len;
1056	dev_kfree_skb(new_skb);
1057
1058	return 0;
1059}
1060
1061/**
1062 * xemaclite_remove_ndev - Free the network device
1063 * @ndev:	Pointer to the network device to be freed
1064 *
1065 * This function un maps the IO region of the Emaclite device and frees the net
1066 * device.
1067 */
1068static void xemaclite_remove_ndev(struct net_device *ndev)
1069{
1070	if (ndev) {
1071		struct net_local *lp = (struct net_local *) netdev_priv(ndev);
1072
1073		if (lp->base_addr)
1074			iounmap((void __iomem __force *) (lp->base_addr));
1075		free_netdev(ndev);
1076	}
1077}
1078
1079/**
1080 * get_bool - Get a parameter from the OF device
1081 * @ofdev:	Pointer to OF device structure
1082 * @s:		Property to be retrieved
1083 *
1084 * This function looks for a property in the device node and returns the value
1085 * of the property if its found or 0 if the property is not found.
1086 *
1087 * Return:	Value of the parameter if the parameter is found, or 0 otherwise
1088 */
1089static bool get_bool(struct platform_device *ofdev, const char *s)
1090{
1091	u32 *p = (u32 *)of_get_property(ofdev->dev.of_node, s, NULL);
1092
1093	if (p) {
1094		return (bool)*p;
1095	} else {
1096		dev_warn(&ofdev->dev, "Parameter %s not found,"
1097			"defaulting to false\n", s);
1098		return 0;
1099	}
1100}
1101
1102static struct net_device_ops xemaclite_netdev_ops;
1103
1104/**
1105 * xemaclite_of_probe - Probe method for the Emaclite device.
1106 * @ofdev:	Pointer to OF device structure
1107 * @match:	Pointer to the structure used for matching a device
1108 *
1109 * This function probes for the Emaclite device in the device tree.
1110 * It initializes the driver data structure and the hardware, sets the MAC
1111 * address and registers the network device.
1112 * It also registers a mii_bus for the Emaclite device, if MDIO is included
1113 * in the device.
1114 *
1115 * Return:	0, if the driver is bound to the Emaclite device, or
1116 *		a negative error if there is failure.
1117 */
1118static int __devinit xemaclite_of_probe(struct platform_device *ofdev,
1119					const struct of_device_id *match)
1120{
1121	struct resource r_irq; /* Interrupt resources */
1122	struct resource r_mem; /* IO mem resources */
1123	struct net_device *ndev = NULL;
1124	struct net_local *lp = NULL;
1125	struct device *dev = &ofdev->dev;
1126	const void *mac_address;
1127
1128	int rc = 0;
1129
1130	dev_info(dev, "Device Tree Probing\n");
1131
1132	/* Get iospace for the device */
1133	rc = of_address_to_resource(ofdev->dev.of_node, 0, &r_mem);
1134	if (rc) {
1135		dev_err(dev, "invalid address\n");
1136		return rc;
1137	}
1138
1139	/* Get IRQ for the device */
1140	rc = of_irq_to_resource(ofdev->dev.of_node, 0, &r_irq);
1141	if (rc == NO_IRQ) {
1142		dev_err(dev, "no IRQ found\n");
1143		return rc;
1144	}
1145
1146	/* Create an ethernet device instance */
1147	ndev = alloc_etherdev(sizeof(struct net_local));
1148	if (!ndev) {
1149		dev_err(dev, "Could not allocate network device\n");
1150		return -ENOMEM;
1151	}
1152
1153	dev_set_drvdata(dev, ndev);
1154	SET_NETDEV_DEV(ndev, &ofdev->dev);
1155
1156	ndev->irq = r_irq.start;
1157	ndev->mem_start = r_mem.start;
1158	ndev->mem_end = r_mem.end;
1159
1160	lp = netdev_priv(ndev);
1161	lp->ndev = ndev;
1162
1163	if (!request_mem_region(ndev->mem_start,
1164				ndev->mem_end - ndev->mem_start + 1,
1165				DRIVER_NAME)) {
1166		dev_err(dev, "Couldn't lock memory region at %p\n",
1167			(void *)ndev->mem_start);
1168		rc = -EBUSY;
1169		goto error2;
1170	}
1171
1172	/* Get the virtual base address for the device */
1173	lp->base_addr = ioremap(r_mem.start, resource_size(&r_mem));
1174	if (NULL == lp->base_addr) {
1175		dev_err(dev, "EmacLite: Could not allocate iomem\n");
1176		rc = -EIO;
1177		goto error1;
1178	}
1179
1180	spin_lock_init(&lp->reset_lock);
1181	lp->next_tx_buf_to_use = 0x0;
1182	lp->next_rx_buf_to_use = 0x0;
1183	lp->tx_ping_pong = get_bool(ofdev, "xlnx,tx-ping-pong");
1184	lp->rx_ping_pong = get_bool(ofdev, "xlnx,rx-ping-pong");
1185	mac_address = of_get_mac_address(ofdev->dev.of_node);
1186
1187	if (mac_address)
1188		/* Set the MAC address. */
1189		memcpy(ndev->dev_addr, mac_address, 6);
1190	else
1191		dev_warn(dev, "No MAC address found\n");
1192
1193	/* Clear the Tx CSR's in case this is a restart */
1194	out_be32(lp->base_addr + XEL_TSR_OFFSET, 0);
1195	out_be32(lp->base_addr + XEL_BUFFER_OFFSET + XEL_TSR_OFFSET, 0);
1196
1197	/* Set the MAC address in the EmacLite device */
1198	xemaclite_update_address(lp, ndev->dev_addr);
1199
1200	lp->phy_node = of_parse_phandle(ofdev->dev.of_node, "phy-handle", 0);
1201	rc = xemaclite_mdio_setup(lp, &ofdev->dev);
1202	if (rc)
1203		dev_warn(&ofdev->dev, "error registering MDIO bus\n");
1204
1205	dev_info(dev, "MAC address is now %pM\n", ndev->dev_addr);
1206
1207	ndev->netdev_ops = &xemaclite_netdev_ops;
1208	ndev->flags &= ~IFF_MULTICAST;
1209	ndev->watchdog_timeo = TX_TIMEOUT;
1210
1211	/* Finally, register the device */
1212	rc = register_netdev(ndev);
1213	if (rc) {
1214		dev_err(dev,
1215			"Cannot register network device, aborting\n");
1216		goto error1;
1217	}
1218
1219	dev_info(dev,
1220		 "Xilinx EmacLite at 0x%08X mapped to 0x%08X, irq=%d\n",
1221		 (unsigned int __force)ndev->mem_start,
1222		 (unsigned int __force)lp->base_addr, ndev->irq);
1223	return 0;
1224
1225error1:
1226	release_mem_region(ndev->mem_start, resource_size(&r_mem));
1227
1228error2:
1229	xemaclite_remove_ndev(ndev);
1230	return rc;
1231}
1232
1233/**
1234 * xemaclite_of_remove - Unbind the driver from the Emaclite device.
1235 * @of_dev:	Pointer to OF device structure
1236 *
1237 * This function is called if a device is physically removed from the system or
1238 * if the driver module is being unloaded. It frees any resources allocated to
1239 * the device.
1240 *
1241 * Return:	0, always.
1242 */
1243static int __devexit xemaclite_of_remove(struct platform_device *of_dev)
1244{
1245	struct device *dev = &of_dev->dev;
1246	struct net_device *ndev = dev_get_drvdata(dev);
1247
1248	struct net_local *lp = (struct net_local *) netdev_priv(ndev);
1249
1250	/* Un-register the mii_bus, if configured */
1251	if (lp->has_mdio) {
1252		mdiobus_unregister(lp->mii_bus);
1253		kfree(lp->mii_bus->irq);
1254		mdiobus_free(lp->mii_bus);
1255		lp->mii_bus = NULL;
1256	}
1257
1258	unregister_netdev(ndev);
1259
1260	if (lp->phy_node)
1261		of_node_put(lp->phy_node);
1262	lp->phy_node = NULL;
1263
1264	release_mem_region(ndev->mem_start, ndev->mem_end-ndev->mem_start + 1);
1265
1266	xemaclite_remove_ndev(ndev);
1267	dev_set_drvdata(dev, NULL);
1268
1269	return 0;
1270}
1271
1272static struct net_device_ops xemaclite_netdev_ops = {
1273	.ndo_open		= xemaclite_open,
1274	.ndo_stop		= xemaclite_close,
1275	.ndo_start_xmit		= xemaclite_send,
1276	.ndo_set_mac_address	= xemaclite_set_mac_address,
1277	.ndo_tx_timeout		= xemaclite_tx_timeout,
1278	.ndo_get_stats		= xemaclite_get_stats,
1279};
1280
1281/* Match table for OF platform binding */
1282static struct of_device_id xemaclite_of_match[] __devinitdata = {
1283	{ .compatible = "xlnx,opb-ethernetlite-1.01.a", },
1284	{ .compatible = "xlnx,opb-ethernetlite-1.01.b", },
1285	{ .compatible = "xlnx,xps-ethernetlite-1.00.a", },
1286	{ .compatible = "xlnx,xps-ethernetlite-2.00.a", },
1287	{ .compatible = "xlnx,xps-ethernetlite-2.01.a", },
1288	{ .compatible = "xlnx,xps-ethernetlite-3.00.a", },
1289	{ /* end of list */ },
1290};
1291MODULE_DEVICE_TABLE(of, xemaclite_of_match);
1292
1293static struct of_platform_driver xemaclite_of_driver = {
1294	.driver = {
1295		.name = DRIVER_NAME,
1296		.owner = THIS_MODULE,
1297		.of_match_table = xemaclite_of_match,
1298	},
1299	.probe		= xemaclite_of_probe,
1300	.remove		= __devexit_p(xemaclite_of_remove),
1301};
1302
1303/**
1304 * xgpiopss_init - Initial driver registration call
1305 *
1306 * Return:	0 upon success, or a negative error upon failure.
1307 */
1308static int __init xemaclite_init(void)
1309{
1310	/* No kernel boot options used, we just need to register the driver */
1311	return of_register_platform_driver(&xemaclite_of_driver);
1312}
1313
1314/**
1315 * xemaclite_cleanup - Driver un-registration call
1316 */
1317static void __exit xemaclite_cleanup(void)
1318{
1319	of_unregister_platform_driver(&xemaclite_of_driver);
1320}
1321
1322module_init(xemaclite_init);
1323module_exit(xemaclite_cleanup);
1324
1325MODULE_AUTHOR("Xilinx, Inc.");
1326MODULE_DESCRIPTION("Xilinx Ethernet MAC Lite driver");
1327MODULE_LICENSE("GPL");
1328