1#ifndef P54PCI_H 2#define P54PCI_H 3 4/* 5 * Defines for PCI based mac80211 Prism54 driver 6 * 7 * Copyright (c) 2006, Michael Wu <flamingice@sourmilk.net> 8 * 9 * Based on the islsm (softmac prism54) driver, which is: 10 * Copyright 2004-2006 Jean-Baptiste Note <jbnote@gmail.com>, et al. 11 * 12 * This program is free software; you can redistribute it and/or modify 13 * it under the terms of the GNU General Public License version 2 as 14 * published by the Free Software Foundation. 15 */ 16 17/* Device Interrupt register bits */ 18#define ISL38XX_DEV_INT_RESET 0x0001 19#define ISL38XX_DEV_INT_UPDATE 0x0002 20#define ISL38XX_DEV_INT_WAKEUP 0x0008 21#define ISL38XX_DEV_INT_SLEEP 0x0010 22#define ISL38XX_DEV_INT_ABORT 0x0020 23/* these two only used in USB */ 24#define ISL38XX_DEV_INT_DATA 0x0040 25#define ISL38XX_DEV_INT_MGMT 0x0080 26 27#define ISL38XX_DEV_INT_PCIUART_CTS 0x4000 28#define ISL38XX_DEV_INT_PCIUART_DR 0x8000 29 30/* Interrupt Identification/Acknowledge/Enable register bits */ 31#define ISL38XX_INT_IDENT_UPDATE 0x0002 32#define ISL38XX_INT_IDENT_INIT 0x0004 33#define ISL38XX_INT_IDENT_WAKEUP 0x0008 34#define ISL38XX_INT_IDENT_SLEEP 0x0010 35#define ISL38XX_INT_IDENT_PCIUART_CTS 0x4000 36#define ISL38XX_INT_IDENT_PCIUART_DR 0x8000 37 38/* Control/Status register bits */ 39#define ISL38XX_CTRL_STAT_SLEEPMODE 0x00000200 40#define ISL38XX_CTRL_STAT_CLKRUN 0x00800000 41#define ISL38XX_CTRL_STAT_RESET 0x10000000 42#define ISL38XX_CTRL_STAT_RAMBOOT 0x20000000 43#define ISL38XX_CTRL_STAT_STARTHALTED 0x40000000 44#define ISL38XX_CTRL_STAT_HOST_OVERRIDE 0x80000000 45 46struct p54p_csr { 47 __le32 dev_int; 48 u8 unused_1[12]; 49 __le32 int_ident; 50 __le32 int_ack; 51 __le32 int_enable; 52 u8 unused_2[4]; 53 union { 54 __le32 ring_control_base; 55 __le32 gen_purp_com[2]; 56 }; 57 u8 unused_3[8]; 58 __le32 direct_mem_base; 59 u8 unused_4[44]; 60 __le32 dma_addr; 61 __le32 dma_len; 62 __le32 dma_ctrl; 63 u8 unused_5[12]; 64 __le32 ctrl_stat; 65 u8 unused_6[1924]; 66 u8 cardbus_cis[0x800]; 67 u8 direct_mem_win[0x1000]; 68} __packed; 69 70/* usb backend only needs the register defines above */ 71#ifndef P54USB_H 72struct p54p_desc { 73 __le32 host_addr; 74 __le32 device_addr; 75 __le16 len; 76 __le16 flags; 77} __packed; 78 79struct p54p_ring_control { 80 __le32 host_idx[4]; 81 __le32 device_idx[4]; 82 struct p54p_desc rx_data[8]; 83 struct p54p_desc tx_data[32]; 84 struct p54p_desc rx_mgmt[4]; 85 struct p54p_desc tx_mgmt[4]; 86} __packed; 87 88#define P54P_READ(r) (__force __le32)__raw_readl(&priv->map->r) 89#define P54P_WRITE(r, val) __raw_writel((__force u32)(__le32)(val), &priv->map->r) 90 91struct p54p_priv { 92 struct p54_common common; 93 struct pci_dev *pdev; 94 struct p54p_csr __iomem *map; 95 struct tasklet_struct tasklet; 96 const struct firmware *firmware; 97 spinlock_t lock; 98 struct p54p_ring_control *ring_control; 99 dma_addr_t ring_control_dma; 100 u32 rx_idx_data, tx_idx_data; 101 u32 rx_idx_mgmt, tx_idx_mgmt; 102 struct sk_buff *rx_buf_data[8]; 103 struct sk_buff *rx_buf_mgmt[4]; 104 struct sk_buff *tx_buf_data[32]; 105 struct sk_buff *tx_buf_mgmt[4]; 106 struct completion boot_comp; 107}; 108 109#endif /* P54USB_H */ 110#endif /* P54PCI_H */ 111