1/* 2 * Copyright (c) 2010 Atheros Communications Inc. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17#ifndef ATH9K_HW_OPS_H 18#define ATH9K_HW_OPS_H 19 20#include "hw.h" 21 22/* Hardware core and driver accessible callbacks */ 23 24static inline void ath9k_hw_configpcipowersave(struct ath_hw *ah, 25 int restore, 26 int power_off) 27{ 28 ath9k_hw_ops(ah)->config_pci_powersave(ah, restore, power_off); 29} 30 31static inline void ath9k_hw_rxena(struct ath_hw *ah) 32{ 33 ath9k_hw_ops(ah)->rx_enable(ah); 34} 35 36static inline void ath9k_hw_set_desc_link(struct ath_hw *ah, void *ds, 37 u32 link) 38{ 39 ath9k_hw_ops(ah)->set_desc_link(ds, link); 40} 41 42static inline void ath9k_hw_get_desc_link(struct ath_hw *ah, void *ds, 43 u32 **link) 44{ 45 ath9k_hw_ops(ah)->get_desc_link(ds, link); 46} 47static inline bool ath9k_hw_calibrate(struct ath_hw *ah, 48 struct ath9k_channel *chan, 49 u8 rxchainmask, 50 bool longcal) 51{ 52 return ath9k_hw_ops(ah)->calibrate(ah, chan, rxchainmask, longcal); 53} 54 55static inline bool ath9k_hw_getisr(struct ath_hw *ah, enum ath9k_int *masked) 56{ 57 return ath9k_hw_ops(ah)->get_isr(ah, masked); 58} 59 60static inline void ath9k_hw_filltxdesc(struct ath_hw *ah, void *ds, u32 seglen, 61 bool is_firstseg, bool is_lastseg, 62 const void *ds0, dma_addr_t buf_addr, 63 unsigned int qcu) 64{ 65 ath9k_hw_ops(ah)->fill_txdesc(ah, ds, seglen, is_firstseg, is_lastseg, 66 ds0, buf_addr, qcu); 67} 68 69static inline int ath9k_hw_txprocdesc(struct ath_hw *ah, void *ds, 70 struct ath_tx_status *ts) 71{ 72 return ath9k_hw_ops(ah)->proc_txdesc(ah, ds, ts); 73} 74 75static inline void ath9k_hw_set11n_txdesc(struct ath_hw *ah, void *ds, 76 u32 pktLen, enum ath9k_pkt_type type, 77 u32 txPower, u32 keyIx, 78 enum ath9k_key_type keyType, 79 u32 flags) 80{ 81 ath9k_hw_ops(ah)->set11n_txdesc(ah, ds, pktLen, type, txPower, keyIx, 82 keyType, flags); 83} 84 85static inline void ath9k_hw_set11n_ratescenario(struct ath_hw *ah, void *ds, 86 void *lastds, 87 u32 durUpdateEn, u32 rtsctsRate, 88 u32 rtsctsDuration, 89 struct ath9k_11n_rate_series series[], 90 u32 nseries, u32 flags) 91{ 92 ath9k_hw_ops(ah)->set11n_ratescenario(ah, ds, lastds, durUpdateEn, 93 rtsctsRate, rtsctsDuration, series, 94 nseries, flags); 95} 96 97static inline void ath9k_hw_set11n_aggr_first(struct ath_hw *ah, void *ds, 98 u32 aggrLen) 99{ 100 ath9k_hw_ops(ah)->set11n_aggr_first(ah, ds, aggrLen); 101} 102 103static inline void ath9k_hw_set11n_aggr_middle(struct ath_hw *ah, void *ds, 104 u32 numDelims) 105{ 106 ath9k_hw_ops(ah)->set11n_aggr_middle(ah, ds, numDelims); 107} 108 109static inline void ath9k_hw_set11n_aggr_last(struct ath_hw *ah, void *ds) 110{ 111 ath9k_hw_ops(ah)->set11n_aggr_last(ah, ds); 112} 113 114static inline void ath9k_hw_clr11n_aggr(struct ath_hw *ah, void *ds) 115{ 116 ath9k_hw_ops(ah)->clr11n_aggr(ah, ds); 117} 118 119static inline void ath9k_hw_set11n_burstduration(struct ath_hw *ah, void *ds, 120 u32 burstDuration) 121{ 122 ath9k_hw_ops(ah)->set11n_burstduration(ah, ds, burstDuration); 123} 124 125static inline void ath9k_hw_set11n_virtualmorefrag(struct ath_hw *ah, void *ds, 126 u32 vmf) 127{ 128 ath9k_hw_ops(ah)->set11n_virtualmorefrag(ah, ds, vmf); 129} 130 131static inline void ath9k_hw_procmibevent(struct ath_hw *ah) 132{ 133 ath9k_hw_ops(ah)->ani_proc_mib_event(ah); 134} 135 136static inline void ath9k_hw_ani_monitor(struct ath_hw *ah, 137 struct ath9k_channel *chan) 138{ 139 ath9k_hw_ops(ah)->ani_monitor(ah, chan); 140} 141 142/* Private hardware call ops */ 143 144/* PHY ops */ 145 146static inline int ath9k_hw_rf_set_freq(struct ath_hw *ah, 147 struct ath9k_channel *chan) 148{ 149 return ath9k_hw_private_ops(ah)->rf_set_freq(ah, chan); 150} 151 152static inline void ath9k_hw_spur_mitigate_freq(struct ath_hw *ah, 153 struct ath9k_channel *chan) 154{ 155 ath9k_hw_private_ops(ah)->spur_mitigate_freq(ah, chan); 156} 157 158static inline int ath9k_hw_rf_alloc_ext_banks(struct ath_hw *ah) 159{ 160 if (!ath9k_hw_private_ops(ah)->rf_alloc_ext_banks) 161 return 0; 162 163 return ath9k_hw_private_ops(ah)->rf_alloc_ext_banks(ah); 164} 165 166static inline void ath9k_hw_rf_free_ext_banks(struct ath_hw *ah) 167{ 168 if (!ath9k_hw_private_ops(ah)->rf_free_ext_banks) 169 return; 170 171 ath9k_hw_private_ops(ah)->rf_free_ext_banks(ah); 172} 173 174static inline bool ath9k_hw_set_rf_regs(struct ath_hw *ah, 175 struct ath9k_channel *chan, 176 u16 modesIndex) 177{ 178 if (!ath9k_hw_private_ops(ah)->set_rf_regs) 179 return true; 180 181 return ath9k_hw_private_ops(ah)->set_rf_regs(ah, chan, modesIndex); 182} 183 184static inline void ath9k_hw_init_bb(struct ath_hw *ah, 185 struct ath9k_channel *chan) 186{ 187 return ath9k_hw_private_ops(ah)->init_bb(ah, chan); 188} 189 190static inline void ath9k_hw_set_channel_regs(struct ath_hw *ah, 191 struct ath9k_channel *chan) 192{ 193 return ath9k_hw_private_ops(ah)->set_channel_regs(ah, chan); 194} 195 196static inline int ath9k_hw_process_ini(struct ath_hw *ah, 197 struct ath9k_channel *chan) 198{ 199 return ath9k_hw_private_ops(ah)->process_ini(ah, chan); 200} 201 202static inline void ath9k_olc_init(struct ath_hw *ah) 203{ 204 if (!ath9k_hw_private_ops(ah)->olc_init) 205 return; 206 207 return ath9k_hw_private_ops(ah)->olc_init(ah); 208} 209 210static inline void ath9k_hw_set_rfmode(struct ath_hw *ah, 211 struct ath9k_channel *chan) 212{ 213 return ath9k_hw_private_ops(ah)->set_rfmode(ah, chan); 214} 215 216static inline void ath9k_hw_mark_phy_inactive(struct ath_hw *ah) 217{ 218 return ath9k_hw_private_ops(ah)->mark_phy_inactive(ah); 219} 220 221static inline void ath9k_hw_set_delta_slope(struct ath_hw *ah, 222 struct ath9k_channel *chan) 223{ 224 return ath9k_hw_private_ops(ah)->set_delta_slope(ah, chan); 225} 226 227static inline bool ath9k_hw_rfbus_req(struct ath_hw *ah) 228{ 229 return ath9k_hw_private_ops(ah)->rfbus_req(ah); 230} 231 232static inline void ath9k_hw_rfbus_done(struct ath_hw *ah) 233{ 234 return ath9k_hw_private_ops(ah)->rfbus_done(ah); 235} 236 237static inline void ath9k_enable_rfkill(struct ath_hw *ah) 238{ 239 return ath9k_hw_private_ops(ah)->enable_rfkill(ah); 240} 241 242static inline void ath9k_hw_restore_chainmask(struct ath_hw *ah) 243{ 244 if (!ath9k_hw_private_ops(ah)->restore_chainmask) 245 return; 246 247 return ath9k_hw_private_ops(ah)->restore_chainmask(ah); 248} 249 250static inline void ath9k_hw_set_diversity(struct ath_hw *ah, bool value) 251{ 252 return ath9k_hw_private_ops(ah)->set_diversity(ah, value); 253} 254 255static inline bool ath9k_hw_ani_control(struct ath_hw *ah, 256 enum ath9k_ani_cmd cmd, int param) 257{ 258 return ath9k_hw_private_ops(ah)->ani_control(ah, cmd, param); 259} 260 261static inline void ath9k_hw_do_getnf(struct ath_hw *ah, 262 int16_t nfarray[NUM_NF_READINGS]) 263{ 264 ath9k_hw_private_ops(ah)->do_getnf(ah, nfarray); 265} 266 267static inline bool ath9k_hw_init_cal(struct ath_hw *ah, 268 struct ath9k_channel *chan) 269{ 270 return ath9k_hw_private_ops(ah)->init_cal(ah, chan); 271} 272 273static inline void ath9k_hw_setup_calibration(struct ath_hw *ah, 274 struct ath9k_cal_list *currCal) 275{ 276 ath9k_hw_private_ops(ah)->setup_calibration(ah, currCal); 277} 278 279static inline bool ath9k_hw_iscal_supported(struct ath_hw *ah, 280 enum ath9k_cal_types calType) 281{ 282 return ath9k_hw_private_ops(ah)->iscal_supported(ah, calType); 283} 284 285static inline void ath9k_ani_reset(struct ath_hw *ah, bool is_scanning) 286{ 287 ath9k_hw_private_ops(ah)->ani_reset(ah, is_scanning); 288} 289 290#endif /* ATH9K_HW_OPS_H */ 291