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1/****************************************************************************
2 * Driver for Solarflare Solarstorm network controllers and boards
3 * Copyright 2007-2009 Solarflare Communications Inc.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 as published
7 * by the Free Software Foundation, incorporated herein by reference.
8 */
9
10#include <linux/rtnetlink.h>
11
12#include "net_driver.h"
13#include "phy.h"
14#include "efx.h"
15#include "nic.h"
16#include "regs.h"
17#include "io.h"
18#include "workarounds.h"
19
20/* Macros for unpacking the board revision */
21/* The revision info is in host byte order. */
22#define FALCON_BOARD_TYPE(_rev) (_rev >> 8)
23#define FALCON_BOARD_MAJOR(_rev) ((_rev >> 4) & 0xf)
24#define FALCON_BOARD_MINOR(_rev) (_rev & 0xf)
25
26/* Board types */
27#define FALCON_BOARD_SFE4001 0x01
28#define FALCON_BOARD_SFE4002 0x02
29#define FALCON_BOARD_SFN4111T 0x51
30#define FALCON_BOARD_SFN4112F 0x52
31
32/* Board temperature is about 15��C above ambient when air flow is
33 * limited. */
34#define FALCON_BOARD_TEMP_BIAS	15
35
36/* SFC4000 datasheet says: 'The maximum permitted junction temperature
37 * is 125��C; the thermal design of the environment for the SFC4000
38 * should aim to keep this well below 100��C.' */
39#define FALCON_JUNC_TEMP_MAX	90
40
41/*****************************************************************************
42 * Support for LM87 sensor chip used on several boards
43 */
44#define LM87_REG_ALARMS1		0x41
45#define LM87_REG_ALARMS2		0x42
46#define LM87_IN_LIMITS(nr, _min, _max)			\
47	0x2B + (nr) * 2, _max, 0x2C + (nr) * 2, _min
48#define LM87_AIN_LIMITS(nr, _min, _max)			\
49	0x3B + (nr), _max, 0x1A + (nr), _min
50#define LM87_TEMP_INT_LIMITS(_min, _max)		\
51	0x39, _max, 0x3A, _min
52#define LM87_TEMP_EXT1_LIMITS(_min, _max)		\
53	0x37, _max, 0x38, _min
54
55#define LM87_ALARM_TEMP_INT		0x10
56#define LM87_ALARM_TEMP_EXT1		0x20
57
58#if defined(CONFIG_SENSORS_LM87) || defined(CONFIG_SENSORS_LM87_MODULE)
59
60static int efx_init_lm87(struct efx_nic *efx, struct i2c_board_info *info,
61			 const u8 *reg_values)
62{
63	struct falcon_board *board = falcon_board(efx);
64	struct i2c_client *client = i2c_new_device(&board->i2c_adap, info);
65	int rc;
66
67	if (!client)
68		return -EIO;
69
70	while (*reg_values) {
71		u8 reg = *reg_values++;
72		u8 value = *reg_values++;
73		rc = i2c_smbus_write_byte_data(client, reg, value);
74		if (rc)
75			goto err;
76	}
77
78	board->hwmon_client = client;
79	return 0;
80
81err:
82	i2c_unregister_device(client);
83	return rc;
84}
85
86static void efx_fini_lm87(struct efx_nic *efx)
87{
88	i2c_unregister_device(falcon_board(efx)->hwmon_client);
89}
90
91static int efx_check_lm87(struct efx_nic *efx, unsigned mask)
92{
93	struct i2c_client *client = falcon_board(efx)->hwmon_client;
94	s32 alarms1, alarms2;
95
96	/* If link is up then do not monitor temperature */
97	if (EFX_WORKAROUND_7884(efx) && efx->link_state.up)
98		return 0;
99
100	alarms1 = i2c_smbus_read_byte_data(client, LM87_REG_ALARMS1);
101	alarms2 = i2c_smbus_read_byte_data(client, LM87_REG_ALARMS2);
102	if (alarms1 < 0)
103		return alarms1;
104	if (alarms2 < 0)
105		return alarms2;
106	alarms1 &= mask;
107	alarms2 &= mask >> 8;
108	if (alarms1 || alarms2) {
109		netif_err(efx, hw, efx->net_dev,
110			  "LM87 detected a hardware failure (status %02x:%02x)"
111			  "%s%s%s\n",
112			  alarms1, alarms2,
113			  (alarms1 & LM87_ALARM_TEMP_INT) ?
114			  "; board is overheating" : "",
115			  (alarms1 & LM87_ALARM_TEMP_EXT1) ?
116			  "; controller is overheating" : "",
117			  (alarms1 & ~(LM87_ALARM_TEMP_INT | LM87_ALARM_TEMP_EXT1)
118			   || alarms2) ?
119			  "; electrical fault" : "");
120		return -ERANGE;
121	}
122
123	return 0;
124}
125
126#else /* !CONFIG_SENSORS_LM87 */
127
128static inline int
129efx_init_lm87(struct efx_nic *efx, struct i2c_board_info *info,
130	      const u8 *reg_values)
131{
132	return 0;
133}
134static inline void efx_fini_lm87(struct efx_nic *efx)
135{
136}
137static inline int efx_check_lm87(struct efx_nic *efx, unsigned mask)
138{
139	return 0;
140}
141
142#endif /* CONFIG_SENSORS_LM87 */
143
144/*****************************************************************************
145 * Support for the SFE4001 and SFN4111T NICs.
146 *
147 * The SFE4001 does not power-up fully at reset due to its high power
148 * consumption.  We control its power via a PCA9539 I/O expander.
149 * Both boards have a MAX6647 temperature monitor which we expose to
150 * the lm90 driver.
151 *
152 * This also provides minimal support for reflashing the PHY, which is
153 * initiated by resetting it with the FLASH_CFG_1 pin pulled down.
154 * On SFE4001 rev A2 and later this is connected to the 3V3X output of
155 * the IO-expander; on the SFN4111T it is connected to Falcon's GPIO3.
156 * We represent reflash mode as PHY_MODE_SPECIAL and make it mutually
157 * exclusive with the network device being open.
158 */
159
160/**************************************************************************
161 * Support for I2C IO Expander device on SFE4001
162 */
163#define	PCA9539 0x74
164
165#define	P0_IN 0x00
166#define	P0_OUT 0x02
167#define	P0_INVERT 0x04
168#define	P0_CONFIG 0x06
169
170#define	P0_EN_1V0X_LBN 0
171#define	P0_EN_1V0X_WIDTH 1
172#define	P0_EN_1V2_LBN 1
173#define	P0_EN_1V2_WIDTH 1
174#define	P0_EN_2V5_LBN 2
175#define	P0_EN_2V5_WIDTH 1
176#define	P0_EN_3V3X_LBN 3
177#define	P0_EN_3V3X_WIDTH 1
178#define	P0_EN_5V_LBN 4
179#define	P0_EN_5V_WIDTH 1
180#define	P0_SHORTEN_JTAG_LBN 5
181#define	P0_SHORTEN_JTAG_WIDTH 1
182#define	P0_X_TRST_LBN 6
183#define	P0_X_TRST_WIDTH 1
184#define	P0_DSP_RESET_LBN 7
185#define	P0_DSP_RESET_WIDTH 1
186
187#define	P1_IN 0x01
188#define	P1_OUT 0x03
189#define	P1_INVERT 0x05
190#define	P1_CONFIG 0x07
191
192#define	P1_AFE_PWD_LBN 0
193#define	P1_AFE_PWD_WIDTH 1
194#define	P1_DSP_PWD25_LBN 1
195#define	P1_DSP_PWD25_WIDTH 1
196#define	P1_RESERVED_LBN 2
197#define	P1_RESERVED_WIDTH 2
198#define	P1_SPARE_LBN 4
199#define	P1_SPARE_WIDTH 4
200
201/* Temperature Sensor */
202#define MAX664X_REG_RSL		0x02
203#define MAX664X_REG_WLHO	0x0B
204
205static void sfe4001_poweroff(struct efx_nic *efx)
206{
207	struct i2c_client *ioexp_client = falcon_board(efx)->ioexp_client;
208	struct i2c_client *hwmon_client = falcon_board(efx)->hwmon_client;
209
210	/* Turn off all power rails and disable outputs */
211	i2c_smbus_write_byte_data(ioexp_client, P0_OUT, 0xff);
212	i2c_smbus_write_byte_data(ioexp_client, P1_CONFIG, 0xff);
213	i2c_smbus_write_byte_data(ioexp_client, P0_CONFIG, 0xff);
214
215	/* Clear any over-temperature alert */
216	i2c_smbus_read_byte_data(hwmon_client, MAX664X_REG_RSL);
217}
218
219static int sfe4001_poweron(struct efx_nic *efx)
220{
221	struct i2c_client *ioexp_client = falcon_board(efx)->ioexp_client;
222	struct i2c_client *hwmon_client = falcon_board(efx)->hwmon_client;
223	unsigned int i, j;
224	int rc;
225	u8 out;
226
227	/* Clear any previous over-temperature alert */
228	rc = i2c_smbus_read_byte_data(hwmon_client, MAX664X_REG_RSL);
229	if (rc < 0)
230		return rc;
231
232	/* Enable port 0 and port 1 outputs on IO expander */
233	rc = i2c_smbus_write_byte_data(ioexp_client, P0_CONFIG, 0x00);
234	if (rc)
235		return rc;
236	rc = i2c_smbus_write_byte_data(ioexp_client, P1_CONFIG,
237				       0xff & ~(1 << P1_SPARE_LBN));
238	if (rc)
239		goto fail_on;
240
241	/* If PHY power is on, turn it all off and wait 1 second to
242	 * ensure a full reset.
243	 */
244	rc = i2c_smbus_read_byte_data(ioexp_client, P0_OUT);
245	if (rc < 0)
246		goto fail_on;
247	out = 0xff & ~((0 << P0_EN_1V2_LBN) | (0 << P0_EN_2V5_LBN) |
248		       (0 << P0_EN_3V3X_LBN) | (0 << P0_EN_5V_LBN) |
249		       (0 << P0_EN_1V0X_LBN));
250	if (rc != out) {
251		netif_info(efx, hw, efx->net_dev, "power-cycling PHY\n");
252		rc = i2c_smbus_write_byte_data(ioexp_client, P0_OUT, out);
253		if (rc)
254			goto fail_on;
255		schedule_timeout_uninterruptible(HZ);
256	}
257
258	for (i = 0; i < 20; ++i) {
259		/* Turn on 1.2V, 2.5V, 3.3V and 5V power rails */
260		out = 0xff & ~((1 << P0_EN_1V2_LBN) | (1 << P0_EN_2V5_LBN) |
261			       (1 << P0_EN_3V3X_LBN) | (1 << P0_EN_5V_LBN) |
262			       (1 << P0_X_TRST_LBN));
263		if (efx->phy_mode & PHY_MODE_SPECIAL)
264			out |= 1 << P0_EN_3V3X_LBN;
265
266		rc = i2c_smbus_write_byte_data(ioexp_client, P0_OUT, out);
267		if (rc)
268			goto fail_on;
269		msleep(10);
270
271		/* Turn on 1V power rail */
272		out &= ~(1 << P0_EN_1V0X_LBN);
273		rc = i2c_smbus_write_byte_data(ioexp_client, P0_OUT, out);
274		if (rc)
275			goto fail_on;
276
277		netif_info(efx, hw, efx->net_dev,
278			   "waiting for DSP boot (attempt %d)...\n", i);
279
280		/* In flash config mode, DSP does not turn on AFE, so
281		 * just wait 1 second.
282		 */
283		if (efx->phy_mode & PHY_MODE_SPECIAL) {
284			schedule_timeout_uninterruptible(HZ);
285			return 0;
286		}
287
288		for (j = 0; j < 10; ++j) {
289			msleep(100);
290
291			/* Check DSP has asserted AFE power line */
292			rc = i2c_smbus_read_byte_data(ioexp_client, P1_IN);
293			if (rc < 0)
294				goto fail_on;
295			if (rc & (1 << P1_AFE_PWD_LBN))
296				return 0;
297		}
298	}
299
300	netif_info(efx, hw, efx->net_dev, "timed out waiting for DSP boot\n");
301	rc = -ETIMEDOUT;
302fail_on:
303	sfe4001_poweroff(efx);
304	return rc;
305}
306
307static int sfn4111t_reset(struct efx_nic *efx)
308{
309	struct falcon_board *board = falcon_board(efx);
310	efx_oword_t reg;
311
312	/* GPIO 3 and the GPIO register are shared with I2C, so block that */
313	i2c_lock_adapter(&board->i2c_adap);
314
315	/* Pull RST_N (GPIO 2) low then let it up again, setting the
316	 * FLASH_CFG_1 strap (GPIO 3) appropriately.  Only change the
317	 * output enables; the output levels should always be 0 (low)
318	 * and we rely on external pull-ups. */
319	efx_reado(efx, &reg, FR_AB_GPIO_CTL);
320	EFX_SET_OWORD_FIELD(reg, FRF_AB_GPIO2_OEN, true);
321	efx_writeo(efx, &reg, FR_AB_GPIO_CTL);
322	msleep(1000);
323	EFX_SET_OWORD_FIELD(reg, FRF_AB_GPIO2_OEN, false);
324	EFX_SET_OWORD_FIELD(reg, FRF_AB_GPIO3_OEN,
325			    !!(efx->phy_mode & PHY_MODE_SPECIAL));
326	efx_writeo(efx, &reg, FR_AB_GPIO_CTL);
327	msleep(1);
328
329	i2c_unlock_adapter(&board->i2c_adap);
330
331	ssleep(1);
332	return 0;
333}
334
335static ssize_t show_phy_flash_cfg(struct device *dev,
336				  struct device_attribute *attr, char *buf)
337{
338	struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
339	return sprintf(buf, "%d\n", !!(efx->phy_mode & PHY_MODE_SPECIAL));
340}
341
342static ssize_t set_phy_flash_cfg(struct device *dev,
343				 struct device_attribute *attr,
344				 const char *buf, size_t count)
345{
346	struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
347	enum efx_phy_mode old_mode, new_mode;
348	int err;
349
350	rtnl_lock();
351	old_mode = efx->phy_mode;
352	if (count == 0 || *buf == '0')
353		new_mode = old_mode & ~PHY_MODE_SPECIAL;
354	else
355		new_mode = PHY_MODE_SPECIAL;
356	if (old_mode == new_mode) {
357		err = 0;
358	} else if (efx->state != STATE_RUNNING || netif_running(efx->net_dev)) {
359		err = -EBUSY;
360	} else {
361		/* Reset the PHY, reconfigure the MAC and enable/disable
362		 * MAC stats accordingly. */
363		efx->phy_mode = new_mode;
364		if (new_mode & PHY_MODE_SPECIAL)
365			falcon_stop_nic_stats(efx);
366		if (falcon_board(efx)->type->id == FALCON_BOARD_SFE4001)
367			err = sfe4001_poweron(efx);
368		else
369			err = sfn4111t_reset(efx);
370		if (!err)
371			err = efx_reconfigure_port(efx);
372		if (!(new_mode & PHY_MODE_SPECIAL))
373			falcon_start_nic_stats(efx);
374	}
375	rtnl_unlock();
376
377	return err ? err : count;
378}
379
380static DEVICE_ATTR(phy_flash_cfg, 0644, show_phy_flash_cfg, set_phy_flash_cfg);
381
382static void sfe4001_fini(struct efx_nic *efx)
383{
384	struct falcon_board *board = falcon_board(efx);
385
386	netif_info(efx, drv, efx->net_dev, "%s\n", __func__);
387
388	device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_flash_cfg);
389	sfe4001_poweroff(efx);
390	i2c_unregister_device(board->ioexp_client);
391	i2c_unregister_device(board->hwmon_client);
392}
393
394static int sfe4001_check_hw(struct efx_nic *efx)
395{
396	s32 status;
397
398	/* If XAUI link is up then do not monitor */
399	if (EFX_WORKAROUND_7884(efx) && !efx->xmac_poll_required)
400		return 0;
401
402	/* Check the powered status of the PHY. Lack of power implies that
403	 * the MAX6647 has shut down power to it, probably due to a temp.
404	 * alarm. Reading the power status rather than the MAX6647 status
405	 * directly because the later is read-to-clear and would thus
406	 * start to power up the PHY again when polled, causing us to blip
407	 * the power undesirably.
408	 * We know we can read from the IO expander because we did
409	 * it during power-on. Assume failure now is bad news. */
410	status = i2c_smbus_read_byte_data(falcon_board(efx)->ioexp_client, P1_IN);
411	if (status >= 0 &&
412	    (status & ((1 << P1_AFE_PWD_LBN) | (1 << P1_DSP_PWD25_LBN))) != 0)
413		return 0;
414
415	/* Use board power control, not PHY power control */
416	sfe4001_poweroff(efx);
417	efx->phy_mode = PHY_MODE_OFF;
418
419	return (status < 0) ? -EIO : -ERANGE;
420}
421
422static struct i2c_board_info sfe4001_hwmon_info = {
423	I2C_BOARD_INFO("max6647", 0x4e),
424};
425
426/* This board uses an I2C expander to provider power to the PHY, which needs to
427 * be turned on before the PHY can be used.
428 * Context: Process context, rtnl lock held
429 */
430static int sfe4001_init(struct efx_nic *efx)
431{
432	struct falcon_board *board = falcon_board(efx);
433	int rc;
434
435#if defined(CONFIG_SENSORS_LM90) || defined(CONFIG_SENSORS_LM90_MODULE)
436	board->hwmon_client =
437		i2c_new_device(&board->i2c_adap, &sfe4001_hwmon_info);
438#else
439	board->hwmon_client =
440		i2c_new_dummy(&board->i2c_adap, sfe4001_hwmon_info.addr);
441#endif
442	if (!board->hwmon_client)
443		return -EIO;
444
445	/* Raise board/PHY high limit from 85 to 90 degrees Celsius */
446	rc = i2c_smbus_write_byte_data(board->hwmon_client,
447				       MAX664X_REG_WLHO, 90);
448	if (rc)
449		goto fail_hwmon;
450
451	board->ioexp_client = i2c_new_dummy(&board->i2c_adap, PCA9539);
452	if (!board->ioexp_client) {
453		rc = -EIO;
454		goto fail_hwmon;
455	}
456
457	if (efx->phy_mode & PHY_MODE_SPECIAL) {
458		/* PHY won't generate a 156.25 MHz clock and MAC stats fetch
459		 * will fail. */
460		falcon_stop_nic_stats(efx);
461	}
462	rc = sfe4001_poweron(efx);
463	if (rc)
464		goto fail_ioexp;
465
466	rc = device_create_file(&efx->pci_dev->dev, &dev_attr_phy_flash_cfg);
467	if (rc)
468		goto fail_on;
469
470	netif_info(efx, hw, efx->net_dev, "PHY is powered on\n");
471	return 0;
472
473fail_on:
474	sfe4001_poweroff(efx);
475fail_ioexp:
476	i2c_unregister_device(board->ioexp_client);
477fail_hwmon:
478	i2c_unregister_device(board->hwmon_client);
479	return rc;
480}
481
482static int sfn4111t_check_hw(struct efx_nic *efx)
483{
484	s32 status;
485
486	/* If XAUI link is up then do not monitor */
487	if (EFX_WORKAROUND_7884(efx) && !efx->xmac_poll_required)
488		return 0;
489
490	/* Test LHIGH, RHIGH, FAULT, EOT and IOT alarms */
491	status = i2c_smbus_read_byte_data(falcon_board(efx)->hwmon_client,
492					  MAX664X_REG_RSL);
493	if (status < 0)
494		return -EIO;
495	if (status & 0x57)
496		return -ERANGE;
497	return 0;
498}
499
500static void sfn4111t_fini(struct efx_nic *efx)
501{
502	netif_info(efx, drv, efx->net_dev, "%s\n", __func__);
503
504	device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_flash_cfg);
505	i2c_unregister_device(falcon_board(efx)->hwmon_client);
506}
507
508static struct i2c_board_info sfn4111t_a0_hwmon_info = {
509	I2C_BOARD_INFO("max6647", 0x4e),
510};
511
512static struct i2c_board_info sfn4111t_r5_hwmon_info = {
513	I2C_BOARD_INFO("max6646", 0x4d),
514};
515
516static void sfn4111t_init_phy(struct efx_nic *efx)
517{
518	if (!(efx->phy_mode & PHY_MODE_SPECIAL)) {
519		if (sft9001_wait_boot(efx) != -EINVAL)
520			return;
521
522		efx->phy_mode = PHY_MODE_SPECIAL;
523		falcon_stop_nic_stats(efx);
524	}
525
526	sfn4111t_reset(efx);
527	sft9001_wait_boot(efx);
528}
529
530static int sfn4111t_init(struct efx_nic *efx)
531{
532	struct falcon_board *board = falcon_board(efx);
533	int rc;
534
535	board->hwmon_client =
536		i2c_new_device(&board->i2c_adap,
537			       (board->minor < 5) ?
538			       &sfn4111t_a0_hwmon_info :
539			       &sfn4111t_r5_hwmon_info);
540	if (!board->hwmon_client)
541		return -EIO;
542
543	rc = device_create_file(&efx->pci_dev->dev, &dev_attr_phy_flash_cfg);
544	if (rc)
545		goto fail_hwmon;
546
547	if (efx->phy_mode & PHY_MODE_SPECIAL)
548		/* PHY may not generate a 156.25 MHz clock and MAC
549		 * stats fetch will fail. */
550		falcon_stop_nic_stats(efx);
551
552	return 0;
553
554fail_hwmon:
555	i2c_unregister_device(board->hwmon_client);
556	return rc;
557}
558
559/*****************************************************************************
560 * Support for the SFE4002
561 *
562 */
563static u8 sfe4002_lm87_channel = 0x03; /* use AIN not FAN inputs */
564
565static const u8 sfe4002_lm87_regs[] = {
566	LM87_IN_LIMITS(0, 0x7c, 0x99),		/* 2.5V:  1.8V +/- 10% */
567	LM87_IN_LIMITS(1, 0x4c, 0x5e),		/* Vccp1: 1.2V +/- 10% */
568	LM87_IN_LIMITS(2, 0xac, 0xd4),		/* 3.3V:  3.3V +/- 10% */
569	LM87_IN_LIMITS(3, 0xac, 0xd4),		/* 5V:    5.0V +/- 10% */
570	LM87_IN_LIMITS(4, 0xac, 0xe0),		/* 12V:   10.8-14V */
571	LM87_IN_LIMITS(5, 0x3f, 0x4f),		/* Vccp2: 1.0V +/- 10% */
572	LM87_AIN_LIMITS(0, 0x98, 0xbb),		/* AIN1:  1.66V +/- 10% */
573	LM87_AIN_LIMITS(1, 0x8a, 0xa9),		/* AIN2:  1.5V +/- 10% */
574	LM87_TEMP_INT_LIMITS(0, 80 + FALCON_BOARD_TEMP_BIAS),
575	LM87_TEMP_EXT1_LIMITS(0, FALCON_JUNC_TEMP_MAX),
576	0
577};
578
579static struct i2c_board_info sfe4002_hwmon_info = {
580	I2C_BOARD_INFO("lm87", 0x2e),
581	.platform_data	= &sfe4002_lm87_channel,
582};
583
584/****************************************************************************/
585/* LED allocations. Note that on rev A0 boards the schematic and the reality
586 * differ: red and green are swapped. Below is the fixed (A1) layout (there
587 * are only 3 A0 boards in existence, so no real reason to make this
588 * conditional).
589 */
590#define SFE4002_FAULT_LED (2)	/* Red */
591#define SFE4002_RX_LED    (0)	/* Green */
592#define SFE4002_TX_LED    (1)	/* Amber */
593
594static void sfe4002_init_phy(struct efx_nic *efx)
595{
596	/* Set the TX and RX LEDs to reflect status and activity, and the
597	 * fault LED off */
598	falcon_qt202x_set_led(efx, SFE4002_TX_LED,
599			      QUAKE_LED_TXLINK | QUAKE_LED_LINK_ACTSTAT);
600	falcon_qt202x_set_led(efx, SFE4002_RX_LED,
601			      QUAKE_LED_RXLINK | QUAKE_LED_LINK_ACTSTAT);
602	falcon_qt202x_set_led(efx, SFE4002_FAULT_LED, QUAKE_LED_OFF);
603}
604
605static void sfe4002_set_id_led(struct efx_nic *efx, enum efx_led_mode mode)
606{
607	falcon_qt202x_set_led(
608		efx, SFE4002_FAULT_LED,
609		(mode == EFX_LED_ON) ? QUAKE_LED_ON : QUAKE_LED_OFF);
610}
611
612static int sfe4002_check_hw(struct efx_nic *efx)
613{
614	struct falcon_board *board = falcon_board(efx);
615
616	/* A0 board rev. 4002s report a temperature fault the whole time
617	 * (bad sensor) so we mask it out. */
618	unsigned alarm_mask =
619		(board->major == 0 && board->minor == 0) ?
620		~LM87_ALARM_TEMP_EXT1 : ~0;
621
622	return efx_check_lm87(efx, alarm_mask);
623}
624
625static int sfe4002_init(struct efx_nic *efx)
626{
627	return efx_init_lm87(efx, &sfe4002_hwmon_info, sfe4002_lm87_regs);
628}
629
630/*****************************************************************************
631 * Support for the SFN4112F
632 *
633 */
634static u8 sfn4112f_lm87_channel = 0x03; /* use AIN not FAN inputs */
635
636static const u8 sfn4112f_lm87_regs[] = {
637	LM87_IN_LIMITS(0, 0x7c, 0x99),		/* 2.5V:  1.8V +/- 10% */
638	LM87_IN_LIMITS(1, 0x4c, 0x5e),		/* Vccp1: 1.2V +/- 10% */
639	LM87_IN_LIMITS(2, 0xac, 0xd4),		/* 3.3V:  3.3V +/- 10% */
640	LM87_IN_LIMITS(4, 0xac, 0xe0),		/* 12V:   10.8-14V */
641	LM87_IN_LIMITS(5, 0x3f, 0x4f),		/* Vccp2: 1.0V +/- 10% */
642	LM87_AIN_LIMITS(1, 0x8a, 0xa9),		/* AIN2:  1.5V +/- 10% */
643	LM87_TEMP_INT_LIMITS(0, 60 + FALCON_BOARD_TEMP_BIAS),
644	LM87_TEMP_EXT1_LIMITS(0, FALCON_JUNC_TEMP_MAX),
645	0
646};
647
648static struct i2c_board_info sfn4112f_hwmon_info = {
649	I2C_BOARD_INFO("lm87", 0x2e),
650	.platform_data	= &sfn4112f_lm87_channel,
651};
652
653#define SFN4112F_ACT_LED	0
654#define SFN4112F_LINK_LED	1
655
656static void sfn4112f_init_phy(struct efx_nic *efx)
657{
658	falcon_qt202x_set_led(efx, SFN4112F_ACT_LED,
659			      QUAKE_LED_RXLINK | QUAKE_LED_LINK_ACT);
660	falcon_qt202x_set_led(efx, SFN4112F_LINK_LED,
661			      QUAKE_LED_RXLINK | QUAKE_LED_LINK_STAT);
662}
663
664static void sfn4112f_set_id_led(struct efx_nic *efx, enum efx_led_mode mode)
665{
666	int reg;
667
668	switch (mode) {
669	case EFX_LED_OFF:
670		reg = QUAKE_LED_OFF;
671		break;
672	case EFX_LED_ON:
673		reg = QUAKE_LED_ON;
674		break;
675	default:
676		reg = QUAKE_LED_RXLINK | QUAKE_LED_LINK_STAT;
677		break;
678	}
679
680	falcon_qt202x_set_led(efx, SFN4112F_LINK_LED, reg);
681}
682
683static int sfn4112f_check_hw(struct efx_nic *efx)
684{
685	/* Mask out unused sensors */
686	return efx_check_lm87(efx, ~0x48);
687}
688
689static int sfn4112f_init(struct efx_nic *efx)
690{
691	return efx_init_lm87(efx, &sfn4112f_hwmon_info, sfn4112f_lm87_regs);
692}
693
694static const struct falcon_board_type board_types[] = {
695	{
696		.id		= FALCON_BOARD_SFE4001,
697		.ref_model	= "SFE4001",
698		.gen_type	= "10GBASE-T adapter",
699		.init		= sfe4001_init,
700		.init_phy	= efx_port_dummy_op_void,
701		.fini		= sfe4001_fini,
702		.set_id_led	= tenxpress_set_id_led,
703		.monitor	= sfe4001_check_hw,
704	},
705	{
706		.id		= FALCON_BOARD_SFE4002,
707		.ref_model	= "SFE4002",
708		.gen_type	= "XFP adapter",
709		.init		= sfe4002_init,
710		.init_phy	= sfe4002_init_phy,
711		.fini		= efx_fini_lm87,
712		.set_id_led	= sfe4002_set_id_led,
713		.monitor	= sfe4002_check_hw,
714	},
715	{
716		.id		= FALCON_BOARD_SFN4111T,
717		.ref_model	= "SFN4111T",
718		.gen_type	= "100/1000/10GBASE-T adapter",
719		.init		= sfn4111t_init,
720		.init_phy	= sfn4111t_init_phy,
721		.fini		= sfn4111t_fini,
722		.set_id_led	= tenxpress_set_id_led,
723		.monitor	= sfn4111t_check_hw,
724	},
725	{
726		.id		= FALCON_BOARD_SFN4112F,
727		.ref_model	= "SFN4112F",
728		.gen_type	= "SFP+ adapter",
729		.init		= sfn4112f_init,
730		.init_phy	= sfn4112f_init_phy,
731		.fini		= efx_fini_lm87,
732		.set_id_led	= sfn4112f_set_id_led,
733		.monitor	= sfn4112f_check_hw,
734	},
735};
736
737int falcon_probe_board(struct efx_nic *efx, u16 revision_info)
738{
739	struct falcon_board *board = falcon_board(efx);
740	u8 type_id = FALCON_BOARD_TYPE(revision_info);
741	int i;
742
743	board->major = FALCON_BOARD_MAJOR(revision_info);
744	board->minor = FALCON_BOARD_MINOR(revision_info);
745
746	for (i = 0; i < ARRAY_SIZE(board_types); i++)
747		if (board_types[i].id == type_id)
748			board->type = &board_types[i];
749
750	if (board->type) {
751		netif_info(efx, probe, efx->net_dev, "board is %s rev %c%d\n",
752			 (efx->pci_dev->subsystem_vendor == EFX_VENDID_SFC)
753			 ? board->type->ref_model : board->type->gen_type,
754			 'A' + board->major, board->minor);
755		return 0;
756	} else {
757		netif_err(efx, probe, efx->net_dev, "unknown board type %d\n",
758			  type_id);
759		return -ENODEV;
760	}
761}
762