1/* 2 * linux/drivers/mmc/tmio_mmc.c 3 * 4 * Copyright (C) 2004 Ian Molton 5 * Copyright (C) 2007 Ian Molton 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License version 2 as 9 * published by the Free Software Foundation. 10 * 11 * Driver for the MMC / SD / SDIO cell found in: 12 * 13 * TC6393XB TC6391XB TC6387XB T7L66XB ASIC3 14 * 15 * This driver draws mainly on scattered spec sheets, Reverse engineering 16 * of the toshiba e800 SD driver and some parts of the 2.4 ASIC3 driver (4 bit 17 * support). (Further 4 bit support from a later datasheet). 18 * 19 * TODO: 20 * Investigate using a workqueue for PIO transfers 21 * Eliminate FIXMEs 22 * SDIO support 23 * Better Power management 24 * Handle MMC errors better 25 * double buffer support 26 * 27 */ 28#include <linux/module.h> 29#include <linux/irq.h> 30#include <linux/device.h> 31#include <linux/delay.h> 32#include <linux/dmaengine.h> 33#include <linux/mmc/host.h> 34#include <linux/mfd/core.h> 35#include <linux/mfd/tmio.h> 36 37#include "tmio_mmc.h" 38 39static void tmio_mmc_set_clock(struct tmio_mmc_host *host, int new_clock) 40{ 41 u32 clk = 0, clock; 42 43 if (new_clock) { 44 for (clock = host->mmc->f_min, clk = 0x80000080; 45 new_clock >= (clock<<1); clk >>= 1) 46 clock <<= 1; 47 clk |= 0x100; 48 } 49 50 if (host->set_clk_div) 51 host->set_clk_div(host->pdev, (clk>>22) & 1); 52 53 sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, clk & 0x1ff); 54} 55 56static void tmio_mmc_clk_stop(struct tmio_mmc_host *host) 57{ 58 sd_ctrl_write16(host, CTL_CLK_AND_WAIT_CTL, 0x0000); 59 msleep(10); 60 sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, ~0x0100 & 61 sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL)); 62 msleep(10); 63} 64 65static void tmio_mmc_clk_start(struct tmio_mmc_host *host) 66{ 67 sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, 0x0100 | 68 sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL)); 69 msleep(10); 70 sd_ctrl_write16(host, CTL_CLK_AND_WAIT_CTL, 0x0100); 71 msleep(10); 72} 73 74static void reset(struct tmio_mmc_host *host) 75{ 76 sd_ctrl_write16(host, CTL_RESET_SD, 0x0000); 77 sd_ctrl_write16(host, CTL_RESET_SDIO, 0x0000); 78 msleep(10); 79 sd_ctrl_write16(host, CTL_RESET_SD, 0x0001); 80 sd_ctrl_write16(host, CTL_RESET_SDIO, 0x0001); 81 msleep(10); 82} 83 84static void 85tmio_mmc_finish_request(struct tmio_mmc_host *host) 86{ 87 struct mmc_request *mrq = host->mrq; 88 89 host->mrq = NULL; 90 host->cmd = NULL; 91 host->data = NULL; 92 93 mmc_request_done(host->mmc, mrq); 94} 95 96/* These are the bitmasks the tmio chip requires to implement the MMC response 97 * types. Note that R1 and R6 are the same in this scheme. */ 98#define APP_CMD 0x0040 99#define RESP_NONE 0x0300 100#define RESP_R1 0x0400 101#define RESP_R1B 0x0500 102#define RESP_R2 0x0600 103#define RESP_R3 0x0700 104#define DATA_PRESENT 0x0800 105#define TRANSFER_READ 0x1000 106#define TRANSFER_MULTI 0x2000 107#define SECURITY_CMD 0x4000 108 109static int 110tmio_mmc_start_command(struct tmio_mmc_host *host, struct mmc_command *cmd) 111{ 112 struct mmc_data *data = host->data; 113 int c = cmd->opcode; 114 115 /* Command 12 is handled by hardware */ 116 if (cmd->opcode == 12 && !cmd->arg) { 117 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0x001); 118 return 0; 119 } 120 121 switch (mmc_resp_type(cmd)) { 122 case MMC_RSP_NONE: c |= RESP_NONE; break; 123 case MMC_RSP_R1: c |= RESP_R1; break; 124 case MMC_RSP_R1B: c |= RESP_R1B; break; 125 case MMC_RSP_R2: c |= RESP_R2; break; 126 case MMC_RSP_R3: c |= RESP_R3; break; 127 default: 128 pr_debug("Unknown response type %d\n", mmc_resp_type(cmd)); 129 return -EINVAL; 130 } 131 132 host->cmd = cmd; 133 134 if (data) { 135 c |= DATA_PRESENT; 136 if (data->blocks > 1) { 137 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0x100); 138 c |= TRANSFER_MULTI; 139 } 140 if (data->flags & MMC_DATA_READ) 141 c |= TRANSFER_READ; 142 } 143 144 enable_mmc_irqs(host, TMIO_MASK_CMD); 145 146 /* Fire off the command */ 147 sd_ctrl_write32(host, CTL_ARG_REG, cmd->arg); 148 sd_ctrl_write16(host, CTL_SD_CMD, c); 149 150 return 0; 151} 152 153/* 154 * This chip always returns (at least?) as much data as you ask for. 155 * I'm unsure what happens if you ask for less than a block. This should be 156 * looked into to ensure that a funny length read doesnt hose the controller. 157 */ 158static void tmio_mmc_pio_irq(struct tmio_mmc_host *host) 159{ 160 struct mmc_data *data = host->data; 161 void *sg_virt; 162 unsigned short *buf; 163 unsigned int count; 164 unsigned long flags; 165 166 if (!data) { 167 pr_debug("Spurious PIO IRQ\n"); 168 return; 169 } 170 171 sg_virt = tmio_mmc_kmap_atomic(host->sg_ptr, &flags); 172 buf = (unsigned short *)(sg_virt + host->sg_off); 173 174 count = host->sg_ptr->length - host->sg_off; 175 if (count > data->blksz) 176 count = data->blksz; 177 178 pr_debug("count: %08x offset: %08x flags %08x\n", 179 count, host->sg_off, data->flags); 180 181 /* Transfer the data */ 182 if (data->flags & MMC_DATA_READ) 183 sd_ctrl_read16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1); 184 else 185 sd_ctrl_write16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1); 186 187 host->sg_off += count; 188 189 tmio_mmc_kunmap_atomic(sg_virt, &flags); 190 191 if (host->sg_off == host->sg_ptr->length) 192 tmio_mmc_next_sg(host); 193 194 return; 195} 196 197static void tmio_mmc_do_data_irq(struct tmio_mmc_host *host) 198{ 199 struct mmc_data *data = host->data; 200 struct mmc_command *stop; 201 202 host->data = NULL; 203 204 if (!data) { 205 dev_warn(&host->pdev->dev, "Spurious data end IRQ\n"); 206 return; 207 } 208 stop = data->stop; 209 210 if (!data->error) 211 data->bytes_xfered = data->blocks * data->blksz; 212 else 213 data->bytes_xfered = 0; 214 215 pr_debug("Completed data request\n"); 216 217 218 if (data->flags & MMC_DATA_READ) { 219 if (!host->chan_rx) 220 disable_mmc_irqs(host, TMIO_MASK_READOP); 221 dev_dbg(&host->pdev->dev, "Complete Rx request %p\n", 222 host->mrq); 223 } else { 224 if (!host->chan_tx) 225 disable_mmc_irqs(host, TMIO_MASK_WRITEOP); 226 dev_dbg(&host->pdev->dev, "Complete Tx request %p\n", 227 host->mrq); 228 } 229 230 if (stop) { 231 if (stop->opcode == 12 && !stop->arg) 232 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0x000); 233 else 234 BUG(); 235 } 236 237 tmio_mmc_finish_request(host); 238} 239 240static void tmio_mmc_data_irq(struct tmio_mmc_host *host) 241{ 242 struct mmc_data *data = host->data; 243 244 if (!data) 245 return; 246 247 if (host->chan_tx && (data->flags & MMC_DATA_WRITE)) { 248 /* 249 * Has all data been written out yet? Testing on SuperH showed, 250 * that in most cases the first interrupt comes already with the 251 * BUSY status bit clear, but on some operations, like mount or 252 * in the beginning of a write / sync / umount, there is one 253 * DATAEND interrupt with the BUSY bit set, in this cases 254 * waiting for one more interrupt fixes the problem. 255 */ 256 if (!(sd_ctrl_read32(host, CTL_STATUS) & TMIO_STAT_CMD_BUSY)) { 257 disable_mmc_irqs(host, TMIO_STAT_DATAEND); 258 tasklet_schedule(&host->dma_complete); 259 } 260 } else if (host->chan_rx && (data->flags & MMC_DATA_READ)) { 261 disable_mmc_irqs(host, TMIO_STAT_DATAEND); 262 tasklet_schedule(&host->dma_complete); 263 } else { 264 tmio_mmc_do_data_irq(host); 265 } 266} 267 268static void tmio_mmc_cmd_irq(struct tmio_mmc_host *host, 269 unsigned int stat) 270{ 271 struct mmc_command *cmd = host->cmd; 272 int i, addr; 273 274 if (!host->cmd) { 275 pr_debug("Spurious CMD irq\n"); 276 return; 277 } 278 279 host->cmd = NULL; 280 281 /* This controller is sicker than the PXA one. Not only do we need to 282 * drop the top 8 bits of the first response word, we also need to 283 * modify the order of the response for short response command types. 284 */ 285 286 for (i = 3, addr = CTL_RESPONSE ; i >= 0 ; i--, addr += 4) 287 cmd->resp[i] = sd_ctrl_read32(host, addr); 288 289 if (cmd->flags & MMC_RSP_136) { 290 cmd->resp[0] = (cmd->resp[0] << 8) | (cmd->resp[1] >> 24); 291 cmd->resp[1] = (cmd->resp[1] << 8) | (cmd->resp[2] >> 24); 292 cmd->resp[2] = (cmd->resp[2] << 8) | (cmd->resp[3] >> 24); 293 cmd->resp[3] <<= 8; 294 } else if (cmd->flags & MMC_RSP_R3) { 295 cmd->resp[0] = cmd->resp[3]; 296 } 297 298 if (stat & TMIO_STAT_CMDTIMEOUT) 299 cmd->error = -ETIMEDOUT; 300 else if (stat & TMIO_STAT_CRCFAIL && cmd->flags & MMC_RSP_CRC) 301 cmd->error = -EILSEQ; 302 303 /* If there is data to handle we enable data IRQs here, and 304 * we will ultimatley finish the request in the data_end handler. 305 * If theres no data or we encountered an error, finish now. 306 */ 307 if (host->data && !cmd->error) { 308 if (host->data->flags & MMC_DATA_READ) { 309 if (!host->chan_rx) 310 enable_mmc_irqs(host, TMIO_MASK_READOP); 311 } else { 312 struct dma_chan *chan = host->chan_tx; 313 if (!chan) 314 enable_mmc_irqs(host, TMIO_MASK_WRITEOP); 315 else 316 tasklet_schedule(&host->dma_issue); 317 } 318 } else { 319 tmio_mmc_finish_request(host); 320 } 321 322 return; 323} 324 325static irqreturn_t tmio_mmc_irq(int irq, void *devid) 326{ 327 struct tmio_mmc_host *host = devid; 328 unsigned int ireg, irq_mask, status; 329 330 pr_debug("MMC IRQ begin\n"); 331 332 status = sd_ctrl_read32(host, CTL_STATUS); 333 irq_mask = sd_ctrl_read32(host, CTL_IRQ_MASK); 334 ireg = status & TMIO_MASK_IRQ & ~irq_mask; 335 336 pr_debug_status(status); 337 pr_debug_status(ireg); 338 339 if (!ireg) { 340 disable_mmc_irqs(host, status & ~irq_mask); 341 342 pr_warning("tmio_mmc: Spurious irq, disabling! " 343 "0x%08x 0x%08x 0x%08x\n", status, irq_mask, ireg); 344 pr_debug_status(status); 345 346 goto out; 347 } 348 349 while (ireg) { 350 /* Card insert / remove attempts */ 351 if (ireg & (TMIO_STAT_CARD_INSERT | TMIO_STAT_CARD_REMOVE)) { 352 ack_mmc_irqs(host, TMIO_STAT_CARD_INSERT | 353 TMIO_STAT_CARD_REMOVE); 354 mmc_detect_change(host->mmc, msecs_to_jiffies(100)); 355 } 356 357 /* CRC and other errors */ 358/* if (ireg & TMIO_STAT_ERR_IRQ) 359 * handled |= tmio_error_irq(host, irq, stat); 360 */ 361 362 /* Command completion */ 363 if (ireg & TMIO_MASK_CMD) { 364 ack_mmc_irqs(host, TMIO_MASK_CMD); 365 tmio_mmc_cmd_irq(host, status); 366 } 367 368 /* Data transfer */ 369 if (ireg & (TMIO_STAT_RXRDY | TMIO_STAT_TXRQ)) { 370 ack_mmc_irqs(host, TMIO_STAT_RXRDY | TMIO_STAT_TXRQ); 371 tmio_mmc_pio_irq(host); 372 } 373 374 /* Data transfer completion */ 375 if (ireg & TMIO_STAT_DATAEND) { 376 ack_mmc_irqs(host, TMIO_STAT_DATAEND); 377 tmio_mmc_data_irq(host); 378 } 379 380 /* Check status - keep going until we've handled it all */ 381 status = sd_ctrl_read32(host, CTL_STATUS); 382 irq_mask = sd_ctrl_read32(host, CTL_IRQ_MASK); 383 ireg = status & TMIO_MASK_IRQ & ~irq_mask; 384 385 pr_debug("Status at end of loop: %08x\n", status); 386 pr_debug_status(status); 387 } 388 pr_debug("MMC IRQ end\n"); 389 390out: 391 return IRQ_HANDLED; 392} 393 394#ifdef CONFIG_TMIO_MMC_DMA 395static void tmio_mmc_enable_dma(struct tmio_mmc_host *host, bool enable) 396{ 397#if defined(CONFIG_SUPERH) || defined(CONFIG_ARCH_SHMOBILE) 398 /* Switch DMA mode on or off - SuperH specific? */ 399 sd_ctrl_write16(host, 0xd8, enable ? 2 : 0); 400#endif 401} 402 403static void tmio_dma_complete(void *arg) 404{ 405 struct tmio_mmc_host *host = arg; 406 407 dev_dbg(&host->pdev->dev, "Command completed\n"); 408 409 if (!host->data) 410 dev_warn(&host->pdev->dev, "NULL data in DMA completion!\n"); 411 else 412 enable_mmc_irqs(host, TMIO_STAT_DATAEND); 413} 414 415static int tmio_mmc_start_dma_rx(struct tmio_mmc_host *host) 416{ 417 struct scatterlist *sg = host->sg_ptr; 418 struct dma_async_tx_descriptor *desc = NULL; 419 struct dma_chan *chan = host->chan_rx; 420 int ret; 421 422 ret = dma_map_sg(&host->pdev->dev, sg, host->sg_len, DMA_FROM_DEVICE); 423 if (ret > 0) { 424 host->dma_sglen = ret; 425 desc = chan->device->device_prep_slave_sg(chan, sg, ret, 426 DMA_FROM_DEVICE, DMA_PREP_INTERRUPT | DMA_CTRL_ACK); 427 } 428 429 if (desc) { 430 host->desc = desc; 431 desc->callback = tmio_dma_complete; 432 desc->callback_param = host; 433 host->cookie = desc->tx_submit(desc); 434 if (host->cookie < 0) { 435 host->desc = NULL; 436 ret = host->cookie; 437 } else { 438 chan->device->device_issue_pending(chan); 439 } 440 } 441 dev_dbg(&host->pdev->dev, "%s(): mapped %d -> %d, cookie %d, rq %p\n", 442 __func__, host->sg_len, ret, host->cookie, host->mrq); 443 444 if (!host->desc) { 445 /* DMA failed, fall back to PIO */ 446 if (ret >= 0) 447 ret = -EIO; 448 host->chan_rx = NULL; 449 dma_release_channel(chan); 450 /* Free the Tx channel too */ 451 chan = host->chan_tx; 452 if (chan) { 453 host->chan_tx = NULL; 454 dma_release_channel(chan); 455 } 456 dev_warn(&host->pdev->dev, 457 "DMA failed: %d, falling back to PIO\n", ret); 458 tmio_mmc_enable_dma(host, false); 459 reset(host); 460 /* Fail this request, let above layers recover */ 461 host->mrq->cmd->error = ret; 462 tmio_mmc_finish_request(host); 463 } 464 465 dev_dbg(&host->pdev->dev, "%s(): desc %p, cookie %d, sg[%d]\n", __func__, 466 desc, host->cookie, host->sg_len); 467 468 return ret > 0 ? 0 : ret; 469} 470 471static int tmio_mmc_start_dma_tx(struct tmio_mmc_host *host) 472{ 473 struct scatterlist *sg = host->sg_ptr; 474 struct dma_async_tx_descriptor *desc = NULL; 475 struct dma_chan *chan = host->chan_tx; 476 int ret; 477 478 ret = dma_map_sg(&host->pdev->dev, sg, host->sg_len, DMA_TO_DEVICE); 479 if (ret > 0) { 480 host->dma_sglen = ret; 481 desc = chan->device->device_prep_slave_sg(chan, sg, ret, 482 DMA_TO_DEVICE, DMA_PREP_INTERRUPT | DMA_CTRL_ACK); 483 } 484 485 if (desc) { 486 host->desc = desc; 487 desc->callback = tmio_dma_complete; 488 desc->callback_param = host; 489 host->cookie = desc->tx_submit(desc); 490 if (host->cookie < 0) { 491 host->desc = NULL; 492 ret = host->cookie; 493 } 494 } 495 dev_dbg(&host->pdev->dev, "%s(): mapped %d -> %d, cookie %d, rq %p\n", 496 __func__, host->sg_len, ret, host->cookie, host->mrq); 497 498 if (!host->desc) { 499 /* DMA failed, fall back to PIO */ 500 if (ret >= 0) 501 ret = -EIO; 502 host->chan_tx = NULL; 503 dma_release_channel(chan); 504 /* Free the Rx channel too */ 505 chan = host->chan_rx; 506 if (chan) { 507 host->chan_rx = NULL; 508 dma_release_channel(chan); 509 } 510 dev_warn(&host->pdev->dev, 511 "DMA failed: %d, falling back to PIO\n", ret); 512 tmio_mmc_enable_dma(host, false); 513 reset(host); 514 /* Fail this request, let above layers recover */ 515 host->mrq->cmd->error = ret; 516 tmio_mmc_finish_request(host); 517 } 518 519 dev_dbg(&host->pdev->dev, "%s(): desc %p, cookie %d\n", __func__, 520 desc, host->cookie); 521 522 return ret > 0 ? 0 : ret; 523} 524 525static int tmio_mmc_start_dma(struct tmio_mmc_host *host, 526 struct mmc_data *data) 527{ 528 if (data->flags & MMC_DATA_READ) { 529 if (host->chan_rx) 530 return tmio_mmc_start_dma_rx(host); 531 } else { 532 if (host->chan_tx) 533 return tmio_mmc_start_dma_tx(host); 534 } 535 536 return 0; 537} 538 539static void tmio_issue_tasklet_fn(unsigned long priv) 540{ 541 struct tmio_mmc_host *host = (struct tmio_mmc_host *)priv; 542 struct dma_chan *chan = host->chan_tx; 543 544 chan->device->device_issue_pending(chan); 545} 546 547static void tmio_tasklet_fn(unsigned long arg) 548{ 549 struct tmio_mmc_host *host = (struct tmio_mmc_host *)arg; 550 551 if (host->data->flags & MMC_DATA_READ) 552 dma_unmap_sg(&host->pdev->dev, host->sg_ptr, host->dma_sglen, 553 DMA_FROM_DEVICE); 554 else 555 dma_unmap_sg(&host->pdev->dev, host->sg_ptr, host->dma_sglen, 556 DMA_TO_DEVICE); 557 558 tmio_mmc_do_data_irq(host); 559} 560 561/* It might be necessary to make filter MFD specific */ 562static bool tmio_mmc_filter(struct dma_chan *chan, void *arg) 563{ 564 dev_dbg(chan->device->dev, "%s: slave data %p\n", __func__, arg); 565 chan->private = arg; 566 return true; 567} 568 569static void tmio_mmc_request_dma(struct tmio_mmc_host *host, 570 struct tmio_mmc_data *pdata) 571{ 572 host->cookie = -EINVAL; 573 host->desc = NULL; 574 575 /* We can only either use DMA for both Tx and Rx or not use it at all */ 576 if (pdata->dma) { 577 dma_cap_mask_t mask; 578 579 dma_cap_zero(mask); 580 dma_cap_set(DMA_SLAVE, mask); 581 582 host->chan_tx = dma_request_channel(mask, tmio_mmc_filter, 583 pdata->dma->chan_priv_tx); 584 dev_dbg(&host->pdev->dev, "%s: TX: got channel %p\n", __func__, 585 host->chan_tx); 586 587 if (!host->chan_tx) 588 return; 589 590 host->chan_rx = dma_request_channel(mask, tmio_mmc_filter, 591 pdata->dma->chan_priv_rx); 592 dev_dbg(&host->pdev->dev, "%s: RX: got channel %p\n", __func__, 593 host->chan_rx); 594 595 if (!host->chan_rx) { 596 dma_release_channel(host->chan_tx); 597 host->chan_tx = NULL; 598 return; 599 } 600 601 tasklet_init(&host->dma_complete, tmio_tasklet_fn, (unsigned long)host); 602 tasklet_init(&host->dma_issue, tmio_issue_tasklet_fn, (unsigned long)host); 603 604 tmio_mmc_enable_dma(host, true); 605 } 606} 607 608static void tmio_mmc_release_dma(struct tmio_mmc_host *host) 609{ 610 if (host->chan_tx) { 611 struct dma_chan *chan = host->chan_tx; 612 host->chan_tx = NULL; 613 dma_release_channel(chan); 614 } 615 if (host->chan_rx) { 616 struct dma_chan *chan = host->chan_rx; 617 host->chan_rx = NULL; 618 dma_release_channel(chan); 619 } 620 621 host->cookie = -EINVAL; 622 host->desc = NULL; 623} 624#else 625static int tmio_mmc_start_dma(struct tmio_mmc_host *host, 626 struct mmc_data *data) 627{ 628 return 0; 629} 630 631static void tmio_mmc_request_dma(struct tmio_mmc_host *host, 632 struct tmio_mmc_data *pdata) 633{ 634 host->chan_tx = NULL; 635 host->chan_rx = NULL; 636} 637 638static void tmio_mmc_release_dma(struct tmio_mmc_host *host) 639{ 640} 641#endif 642 643static int tmio_mmc_start_data(struct tmio_mmc_host *host, 644 struct mmc_data *data) 645{ 646 pr_debug("setup data transfer: blocksize %08x nr_blocks %d\n", 647 data->blksz, data->blocks); 648 649 /* Hardware cannot perform 1 and 2 byte requests in 4 bit mode */ 650 if (data->blksz < 4 && host->mmc->ios.bus_width == MMC_BUS_WIDTH_4) { 651 pr_err("%s: %d byte block unsupported in 4 bit mode\n", 652 mmc_hostname(host->mmc), data->blksz); 653 return -EINVAL; 654 } 655 656 tmio_mmc_init_sg(host, data); 657 host->data = data; 658 659 /* Set transfer length / blocksize */ 660 sd_ctrl_write16(host, CTL_SD_XFER_LEN, data->blksz); 661 sd_ctrl_write16(host, CTL_XFER_BLK_COUNT, data->blocks); 662 663 return tmio_mmc_start_dma(host, data); 664} 665 666/* Process requests from the MMC layer */ 667static void tmio_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq) 668{ 669 struct tmio_mmc_host *host = mmc_priv(mmc); 670 int ret; 671 672 if (host->mrq) 673 pr_debug("request not null\n"); 674 675 host->mrq = mrq; 676 677 if (mrq->data) { 678 ret = tmio_mmc_start_data(host, mrq->data); 679 if (ret) 680 goto fail; 681 } 682 683 ret = tmio_mmc_start_command(host, mrq->cmd); 684 if (!ret) 685 return; 686 687fail: 688 mrq->cmd->error = ret; 689 mmc_request_done(mmc, mrq); 690} 691 692/* Set MMC clock / power. 693 * Note: This controller uses a simple divider scheme therefore it cannot 694 * run a MMC card at full speed (20MHz). The max clock is 24MHz on SD, but as 695 * MMC wont run that fast, it has to be clocked at 12MHz which is the next 696 * slowest setting. 697 */ 698static void tmio_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) 699{ 700 struct tmio_mmc_host *host = mmc_priv(mmc); 701 702 if (ios->clock) 703 tmio_mmc_set_clock(host, ios->clock); 704 705 /* Power sequence - OFF -> ON -> UP */ 706 switch (ios->power_mode) { 707 case MMC_POWER_OFF: /* power down SD bus */ 708 if (host->set_pwr) 709 host->set_pwr(host->pdev, 0); 710 tmio_mmc_clk_stop(host); 711 break; 712 case MMC_POWER_ON: /* power up SD bus */ 713 if (host->set_pwr) 714 host->set_pwr(host->pdev, 1); 715 break; 716 case MMC_POWER_UP: /* start bus clock */ 717 tmio_mmc_clk_start(host); 718 break; 719 } 720 721 switch (ios->bus_width) { 722 case MMC_BUS_WIDTH_1: 723 sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, 0x80e0); 724 break; 725 case MMC_BUS_WIDTH_4: 726 sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, 0x00e0); 727 break; 728 } 729 730 /* Let things settle. delay taken from winCE driver */ 731 udelay(140); 732} 733 734static int tmio_mmc_get_ro(struct mmc_host *mmc) 735{ 736 struct tmio_mmc_host *host = mmc_priv(mmc); 737 struct mfd_cell *cell = host->pdev->dev.platform_data; 738 struct tmio_mmc_data *pdata = cell->driver_data; 739 740 return ((pdata->flags & TMIO_MMC_WRPROTECT_DISABLE) || 741 (sd_ctrl_read32(host, CTL_STATUS) & TMIO_STAT_WRPROTECT)) ? 0 : 1; 742} 743 744static const struct mmc_host_ops tmio_mmc_ops = { 745 .request = tmio_mmc_request, 746 .set_ios = tmio_mmc_set_ios, 747 .get_ro = tmio_mmc_get_ro, 748}; 749 750#ifdef CONFIG_PM 751static int tmio_mmc_suspend(struct platform_device *dev, pm_message_t state) 752{ 753 struct mfd_cell *cell = (struct mfd_cell *)dev->dev.platform_data; 754 struct mmc_host *mmc = platform_get_drvdata(dev); 755 int ret; 756 757 ret = mmc_suspend_host(mmc); 758 759 /* Tell MFD core it can disable us now.*/ 760 if (!ret && cell->disable) 761 cell->disable(dev); 762 763 return ret; 764} 765 766static int tmio_mmc_resume(struct platform_device *dev) 767{ 768 struct mfd_cell *cell = (struct mfd_cell *)dev->dev.platform_data; 769 struct mmc_host *mmc = platform_get_drvdata(dev); 770 int ret = 0; 771 772 /* Tell the MFD core we are ready to be enabled */ 773 if (cell->resume) { 774 ret = cell->resume(dev); 775 if (ret) 776 goto out; 777 } 778 779 mmc_resume_host(mmc); 780 781out: 782 return ret; 783} 784#else 785#define tmio_mmc_suspend NULL 786#define tmio_mmc_resume NULL 787#endif 788 789static int __devinit tmio_mmc_probe(struct platform_device *dev) 790{ 791 struct mfd_cell *cell = (struct mfd_cell *)dev->dev.platform_data; 792 struct tmio_mmc_data *pdata; 793 struct resource *res_ctl; 794 struct tmio_mmc_host *host; 795 struct mmc_host *mmc; 796 int ret = -EINVAL; 797 u32 irq_mask = TMIO_MASK_CMD; 798 799 if (dev->num_resources != 2) 800 goto out; 801 802 res_ctl = platform_get_resource(dev, IORESOURCE_MEM, 0); 803 if (!res_ctl) 804 goto out; 805 806 pdata = cell->driver_data; 807 if (!pdata || !pdata->hclk) 808 goto out; 809 810 ret = -ENOMEM; 811 812 mmc = mmc_alloc_host(sizeof(struct tmio_mmc_host), &dev->dev); 813 if (!mmc) 814 goto out; 815 816 host = mmc_priv(mmc); 817 host->mmc = mmc; 818 host->pdev = dev; 819 platform_set_drvdata(dev, mmc); 820 821 host->set_pwr = pdata->set_pwr; 822 host->set_clk_div = pdata->set_clk_div; 823 824 /* SD control register space size is 0x200, 0x400 for bus_shift=1 */ 825 host->bus_shift = resource_size(res_ctl) >> 10; 826 827 host->ctl = ioremap(res_ctl->start, resource_size(res_ctl)); 828 if (!host->ctl) 829 goto host_free; 830 831 mmc->ops = &tmio_mmc_ops; 832 mmc->caps = MMC_CAP_4_BIT_DATA; 833 mmc->caps |= pdata->capabilities; 834 mmc->f_max = pdata->hclk; 835 mmc->f_min = mmc->f_max / 512; 836 if (pdata->ocr_mask) 837 mmc->ocr_avail = pdata->ocr_mask; 838 else 839 mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34; 840 841 /* Tell the MFD core we are ready to be enabled */ 842 if (cell->enable) { 843 ret = cell->enable(dev); 844 if (ret) 845 goto unmap_ctl; 846 } 847 848 tmio_mmc_clk_stop(host); 849 reset(host); 850 851 ret = platform_get_irq(dev, 0); 852 if (ret >= 0) 853 host->irq = ret; 854 else 855 goto cell_disable; 856 857 disable_mmc_irqs(host, TMIO_MASK_ALL); 858 859 ret = request_irq(host->irq, tmio_mmc_irq, IRQF_DISABLED | 860 IRQF_TRIGGER_FALLING, dev_name(&dev->dev), host); 861 if (ret) 862 goto cell_disable; 863 864 /* See if we also get DMA */ 865 tmio_mmc_request_dma(host, pdata); 866 867 mmc_add_host(mmc); 868 869 pr_info("%s at 0x%08lx irq %d\n", mmc_hostname(host->mmc), 870 (unsigned long)host->ctl, host->irq); 871 872 /* Unmask the IRQs we want to know about */ 873 if (!host->chan_rx) 874 irq_mask |= TMIO_MASK_READOP; 875 if (!host->chan_tx) 876 irq_mask |= TMIO_MASK_WRITEOP; 877 enable_mmc_irqs(host, irq_mask); 878 879 return 0; 880 881cell_disable: 882 if (cell->disable) 883 cell->disable(dev); 884unmap_ctl: 885 iounmap(host->ctl); 886host_free: 887 mmc_free_host(mmc); 888out: 889 return ret; 890} 891 892static int __devexit tmio_mmc_remove(struct platform_device *dev) 893{ 894 struct mfd_cell *cell = (struct mfd_cell *)dev->dev.platform_data; 895 struct mmc_host *mmc = platform_get_drvdata(dev); 896 897 platform_set_drvdata(dev, NULL); 898 899 if (mmc) { 900 struct tmio_mmc_host *host = mmc_priv(mmc); 901 mmc_remove_host(mmc); 902 tmio_mmc_release_dma(host); 903 free_irq(host->irq, host); 904 if (cell->disable) 905 cell->disable(dev); 906 iounmap(host->ctl); 907 mmc_free_host(mmc); 908 } 909 910 return 0; 911} 912 913/* ------------------- device registration ----------------------- */ 914 915static struct platform_driver tmio_mmc_driver = { 916 .driver = { 917 .name = "tmio-mmc", 918 .owner = THIS_MODULE, 919 }, 920 .probe = tmio_mmc_probe, 921 .remove = __devexit_p(tmio_mmc_remove), 922 .suspend = tmio_mmc_suspend, 923 .resume = tmio_mmc_resume, 924}; 925 926 927static int __init tmio_mmc_init(void) 928{ 929 return platform_driver_register(&tmio_mmc_driver); 930} 931 932static void __exit tmio_mmc_exit(void) 933{ 934 platform_driver_unregister(&tmio_mmc_driver); 935} 936 937module_init(tmio_mmc_init); 938module_exit(tmio_mmc_exit); 939 940MODULE_DESCRIPTION("Toshiba TMIO SD/MMC driver"); 941MODULE_AUTHOR("Ian Molton <spyro@f2s.com>"); 942MODULE_LICENSE("GPL v2"); 943MODULE_ALIAS("platform:tmio-mmc"); 944