1/* 2 * Video Capture Driver (Video for Linux 1/2) 3 * for the Matrox Marvel G200,G400 and Rainbow Runner-G series 4 * 5 * This module is an interface to the KS0127 video decoder chip. 6 * 7 * Copyright (C) 1999 Ryan Drake <stiletto@mediaone.net> 8 * 9 * This program is free software; you can redistribute it and/or 10 * modify it under the terms of the GNU General Public License 11 * as published by the Free Software Foundation; either version 2 12 * of the License, or (at your option) any later version. 13 * 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * You should have received a copy of the GNU General Public License 20 * along with this program; if not, write to the Free Software 21 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. 22 * 23 ***************************************************************************** 24 * 25 * Modified and extended by 26 * Mike Bernson <mike@mlb.org> 27 * Gerard v.d. Horst 28 * Leon van Stuivenberg <l.vanstuivenberg@chello.nl> 29 * Gernot Ziegler <gz@lysator.liu.se> 30 * 31 * Version History: 32 * V1.0 Ryan Drake Initial version by Ryan Drake 33 * V1.1 Gerard v.d. Horst Added some debugoutput, reset the video-standard 34 */ 35 36#include <linux/init.h> 37#include <linux/module.h> 38#include <linux/delay.h> 39#include <linux/errno.h> 40#include <linux/kernel.h> 41#include <linux/i2c.h> 42#include <linux/videodev2.h> 43#include <linux/slab.h> 44#include <media/v4l2-device.h> 45#include <media/v4l2-chip-ident.h> 46#include <media/v4l2-i2c-drv.h> 47#include "ks0127.h" 48 49MODULE_DESCRIPTION("KS0127 video decoder driver"); 50MODULE_AUTHOR("Ryan Drake"); 51MODULE_LICENSE("GPL"); 52 53/* Addresses */ 54#define I2C_KS0127_ADDON 0xD8 55#define I2C_KS0127_ONBOARD 0xDA 56 57 58/* ks0127 control registers */ 59#define KS_STAT 0x00 60#define KS_CMDA 0x01 61#define KS_CMDB 0x02 62#define KS_CMDC 0x03 63#define KS_CMDD 0x04 64#define KS_HAVB 0x05 65#define KS_HAVE 0x06 66#define KS_HS1B 0x07 67#define KS_HS1E 0x08 68#define KS_HS2B 0x09 69#define KS_HS2E 0x0a 70#define KS_AGC 0x0b 71#define KS_HXTRA 0x0c 72#define KS_CDEM 0x0d 73#define KS_PORTAB 0x0e 74#define KS_LUMA 0x0f 75#define KS_CON 0x10 76#define KS_BRT 0x11 77#define KS_CHROMA 0x12 78#define KS_CHROMB 0x13 79#define KS_DEMOD 0x14 80#define KS_SAT 0x15 81#define KS_HUE 0x16 82#define KS_VERTIA 0x17 83#define KS_VERTIB 0x18 84#define KS_VERTIC 0x19 85#define KS_HSCLL 0x1a 86#define KS_HSCLH 0x1b 87#define KS_VSCLL 0x1c 88#define KS_VSCLH 0x1d 89#define KS_OFMTA 0x1e 90#define KS_OFMTB 0x1f 91#define KS_VBICTL 0x20 92#define KS_CCDAT2 0x21 93#define KS_CCDAT1 0x22 94#define KS_VBIL30 0x23 95#define KS_VBIL74 0x24 96#define KS_VBIL118 0x25 97#define KS_VBIL1512 0x26 98#define KS_TTFRAM 0x27 99#define KS_TESTA 0x28 100#define KS_UVOFFH 0x29 101#define KS_UVOFFL 0x2a 102#define KS_UGAIN 0x2b 103#define KS_VGAIN 0x2c 104#define KS_VAVB 0x2d 105#define KS_VAVE 0x2e 106#define KS_CTRACK 0x2f 107#define KS_POLCTL 0x30 108#define KS_REFCOD 0x31 109#define KS_INVALY 0x32 110#define KS_INVALU 0x33 111#define KS_INVALV 0x34 112#define KS_UNUSEY 0x35 113#define KS_UNUSEU 0x36 114#define KS_UNUSEV 0x37 115#define KS_USRSAV 0x38 116#define KS_USREAV 0x39 117#define KS_SHS1A 0x3a 118#define KS_SHS1B 0x3b 119#define KS_SHS1C 0x3c 120#define KS_CMDE 0x3d 121#define KS_VSDEL 0x3e 122#define KS_CMDF 0x3f 123#define KS_GAMMA0 0x40 124#define KS_GAMMA1 0x41 125#define KS_GAMMA2 0x42 126#define KS_GAMMA3 0x43 127#define KS_GAMMA4 0x44 128#define KS_GAMMA5 0x45 129#define KS_GAMMA6 0x46 130#define KS_GAMMA7 0x47 131#define KS_GAMMA8 0x48 132#define KS_GAMMA9 0x49 133#define KS_GAMMA10 0x4a 134#define KS_GAMMA11 0x4b 135#define KS_GAMMA12 0x4c 136#define KS_GAMMA13 0x4d 137#define KS_GAMMA14 0x4e 138#define KS_GAMMA15 0x4f 139#define KS_GAMMA16 0x50 140#define KS_GAMMA17 0x51 141#define KS_GAMMA18 0x52 142#define KS_GAMMA19 0x53 143#define KS_GAMMA20 0x54 144#define KS_GAMMA21 0x55 145#define KS_GAMMA22 0x56 146#define KS_GAMMA23 0x57 147#define KS_GAMMA24 0x58 148#define KS_GAMMA25 0x59 149#define KS_GAMMA26 0x5a 150#define KS_GAMMA27 0x5b 151#define KS_GAMMA28 0x5c 152#define KS_GAMMA29 0x5d 153#define KS_GAMMA30 0x5e 154#define KS_GAMMA31 0x5f 155#define KS_GAMMAD0 0x60 156#define KS_GAMMAD1 0x61 157#define KS_GAMMAD2 0x62 158#define KS_GAMMAD3 0x63 159#define KS_GAMMAD4 0x64 160#define KS_GAMMAD5 0x65 161#define KS_GAMMAD6 0x66 162#define KS_GAMMAD7 0x67 163#define KS_GAMMAD8 0x68 164#define KS_GAMMAD9 0x69 165#define KS_GAMMAD10 0x6a 166#define KS_GAMMAD11 0x6b 167#define KS_GAMMAD12 0x6c 168#define KS_GAMMAD13 0x6d 169#define KS_GAMMAD14 0x6e 170#define KS_GAMMAD15 0x6f 171#define KS_GAMMAD16 0x70 172#define KS_GAMMAD17 0x71 173#define KS_GAMMAD18 0x72 174#define KS_GAMMAD19 0x73 175#define KS_GAMMAD20 0x74 176#define KS_GAMMAD21 0x75 177#define KS_GAMMAD22 0x76 178#define KS_GAMMAD23 0x77 179#define KS_GAMMAD24 0x78 180#define KS_GAMMAD25 0x79 181#define KS_GAMMAD26 0x7a 182#define KS_GAMMAD27 0x7b 183#define KS_GAMMAD28 0x7c 184#define KS_GAMMAD29 0x7d 185#define KS_GAMMAD30 0x7e 186#define KS_GAMMAD31 0x7f 187 188 189/**************************************************************************** 190* mga_dev : represents one ks0127 chip. 191****************************************************************************/ 192 193struct adjust { 194 int contrast; 195 int bright; 196 int hue; 197 int ugain; 198 int vgain; 199}; 200 201struct ks0127 { 202 struct v4l2_subdev sd; 203 v4l2_std_id norm; 204 int ident; 205 u8 regs[256]; 206}; 207 208static inline struct ks0127 *to_ks0127(struct v4l2_subdev *sd) 209{ 210 return container_of(sd, struct ks0127, sd); 211} 212 213 214static int debug; /* insmod parameter */ 215 216module_param(debug, int, 0); 217MODULE_PARM_DESC(debug, "Debug output"); 218 219static u8 reg_defaults[64]; 220 221static void init_reg_defaults(void) 222{ 223 static int initialized; 224 u8 *table = reg_defaults; 225 226 if (initialized) 227 return; 228 initialized = 1; 229 230 table[KS_CMDA] = 0x2c; /* VSE=0, CCIR 601, autodetect standard */ 231 table[KS_CMDB] = 0x12; /* VALIGN=0, AGC control and input */ 232 table[KS_CMDC] = 0x00; /* Test options */ 233 /* clock & input select, write 1 to PORTA */ 234 table[KS_CMDD] = 0x01; 235 table[KS_HAVB] = 0x00; /* HAV Start Control */ 236 table[KS_HAVE] = 0x00; /* HAV End Control */ 237 table[KS_HS1B] = 0x10; /* HS1 Start Control */ 238 table[KS_HS1E] = 0x00; /* HS1 End Control */ 239 table[KS_HS2B] = 0x00; /* HS2 Start Control */ 240 table[KS_HS2E] = 0x00; /* HS2 End Control */ 241 table[KS_AGC] = 0x53; /* Manual setting for AGC */ 242 table[KS_HXTRA] = 0x00; /* Extra Bits for HAV and HS1/2 */ 243 table[KS_CDEM] = 0x00; /* Chroma Demodulation Control */ 244 table[KS_PORTAB] = 0x0f; /* port B is input, port A output GPPORT */ 245 table[KS_LUMA] = 0x01; /* Luma control */ 246 table[KS_CON] = 0x00; /* Contrast Control */ 247 table[KS_BRT] = 0x00; /* Brightness Control */ 248 table[KS_CHROMA] = 0x2a; /* Chroma control A */ 249 table[KS_CHROMB] = 0x90; /* Chroma control B */ 250 table[KS_DEMOD] = 0x00; /* Chroma Demodulation Control & Status */ 251 table[KS_SAT] = 0x00; /* Color Saturation Control*/ 252 table[KS_HUE] = 0x00; /* Hue Control */ 253 table[KS_VERTIA] = 0x00; /* Vertical Processing Control A */ 254 /* Vertical Processing Control B, luma 1 line delayed */ 255 table[KS_VERTIB] = 0x12; 256 table[KS_VERTIC] = 0x0b; /* Vertical Processing Control C */ 257 table[KS_HSCLL] = 0x00; /* Horizontal Scaling Ratio Low */ 258 table[KS_HSCLH] = 0x00; /* Horizontal Scaling Ratio High */ 259 table[KS_VSCLL] = 0x00; /* Vertical Scaling Ratio Low */ 260 table[KS_VSCLH] = 0x00; /* Vertical Scaling Ratio High */ 261 /* 16 bit YCbCr 4:2:2 output; I can't make the bt866 like 8 bit /Sam */ 262 table[KS_OFMTA] = 0x30; 263 table[KS_OFMTB] = 0x00; /* Output Control B */ 264 /* VBI Decoder Control; 4bit fmt: avoid Y overflow */ 265 table[KS_VBICTL] = 0x5d; 266 table[KS_CCDAT2] = 0x00; /* Read Only register */ 267 table[KS_CCDAT1] = 0x00; /* Read Only register */ 268 table[KS_VBIL30] = 0xa8; /* VBI data decoding options */ 269 table[KS_VBIL74] = 0xaa; /* VBI data decoding options */ 270 table[KS_VBIL118] = 0x2a; /* VBI data decoding options */ 271 table[KS_VBIL1512] = 0x00; /* VBI data decoding options */ 272 table[KS_TTFRAM] = 0x00; /* Teletext frame alignment pattern */ 273 table[KS_TESTA] = 0x00; /* test register, shouldn't be written */ 274 table[KS_UVOFFH] = 0x00; /* UV Offset Adjustment High */ 275 table[KS_UVOFFL] = 0x00; /* UV Offset Adjustment Low */ 276 table[KS_UGAIN] = 0x00; /* U Component Gain Adjustment */ 277 table[KS_VGAIN] = 0x00; /* V Component Gain Adjustment */ 278 table[KS_VAVB] = 0x07; /* VAV Begin */ 279 table[KS_VAVE] = 0x00; /* VAV End */ 280 table[KS_CTRACK] = 0x00; /* Chroma Tracking Control */ 281 table[KS_POLCTL] = 0x41; /* Timing Signal Polarity Control */ 282 table[KS_REFCOD] = 0x80; /* Reference Code Insertion Control */ 283 table[KS_INVALY] = 0x10; /* Invalid Y Code */ 284 table[KS_INVALU] = 0x80; /* Invalid U Code */ 285 table[KS_INVALV] = 0x80; /* Invalid V Code */ 286 table[KS_UNUSEY] = 0x10; /* Unused Y Code */ 287 table[KS_UNUSEU] = 0x80; /* Unused U Code */ 288 table[KS_UNUSEV] = 0x80; /* Unused V Code */ 289 table[KS_USRSAV] = 0x00; /* reserved */ 290 table[KS_USREAV] = 0x00; /* reserved */ 291 table[KS_SHS1A] = 0x00; /* User Defined SHS1 A */ 292 /* User Defined SHS1 B, ALT656=1 on 0127B */ 293 table[KS_SHS1B] = 0x80; 294 table[KS_SHS1C] = 0x00; /* User Defined SHS1 C */ 295 table[KS_CMDE] = 0x00; /* Command Register E */ 296 table[KS_VSDEL] = 0x00; /* VS Delay Control */ 297 /* Command Register F, update -immediately- */ 298 /* (there might come no vsync)*/ 299 table[KS_CMDF] = 0x02; 300} 301 302 303 304 305static u8 ks0127_read(struct v4l2_subdev *sd, u8 reg) 306{ 307 struct i2c_client *client = v4l2_get_subdevdata(sd); 308 char val = 0; 309 struct i2c_msg msgs[] = { 310 { client->addr, 0, sizeof(reg), ® }, 311 { client->addr, I2C_M_RD | I2C_M_NO_RD_ACK, sizeof(val), &val } 312 }; 313 int ret; 314 315 ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs)); 316 if (ret != ARRAY_SIZE(msgs)) 317 v4l2_dbg(1, debug, sd, "read error\n"); 318 319 return val; 320} 321 322 323static void ks0127_write(struct v4l2_subdev *sd, u8 reg, u8 val) 324{ 325 struct i2c_client *client = v4l2_get_subdevdata(sd); 326 struct ks0127 *ks = to_ks0127(sd); 327 char msg[] = { reg, val }; 328 329 if (i2c_master_send(client, msg, sizeof(msg)) != sizeof(msg)) 330 v4l2_dbg(1, debug, sd, "write error\n"); 331 332 ks->regs[reg] = val; 333} 334 335 336/* generic bit-twiddling */ 337static void ks0127_and_or(struct v4l2_subdev *sd, u8 reg, u8 and_v, u8 or_v) 338{ 339 struct ks0127 *ks = to_ks0127(sd); 340 341 u8 val = ks->regs[reg]; 342 val = (val & and_v) | or_v; 343 ks0127_write(sd, reg, val); 344} 345 346 347 348/**************************************************************************** 349* ks0127 private api 350****************************************************************************/ 351static void ks0127_init(struct v4l2_subdev *sd) 352{ 353 struct ks0127 *ks = to_ks0127(sd); 354 u8 *table = reg_defaults; 355 int i; 356 357 ks->ident = V4L2_IDENT_KS0127; 358 359 v4l2_dbg(1, debug, sd, "reset\n"); 360 msleep(1); 361 362 /* initialize all registers to known values */ 363 /* (except STAT, 0x21, 0x22, TEST and 0x38,0x39) */ 364 365 for (i = 1; i < 33; i++) 366 ks0127_write(sd, i, table[i]); 367 368 for (i = 35; i < 40; i++) 369 ks0127_write(sd, i, table[i]); 370 371 for (i = 41; i < 56; i++) 372 ks0127_write(sd, i, table[i]); 373 374 for (i = 58; i < 64; i++) 375 ks0127_write(sd, i, table[i]); 376 377 378 if ((ks0127_read(sd, KS_STAT) & 0x80) == 0) { 379 ks->ident = V4L2_IDENT_KS0122S; 380 v4l2_dbg(1, debug, sd, "ks0122s found\n"); 381 return; 382 } 383 384 switch (ks0127_read(sd, KS_CMDE) & 0x0f) { 385 case 0: 386 v4l2_dbg(1, debug, sd, "ks0127 found\n"); 387 break; 388 389 case 9: 390 ks->ident = V4L2_IDENT_KS0127B; 391 v4l2_dbg(1, debug, sd, "ks0127B Revision A found\n"); 392 break; 393 394 default: 395 v4l2_dbg(1, debug, sd, "unknown revision\n"); 396 break; 397 } 398} 399 400static int ks0127_s_routing(struct v4l2_subdev *sd, 401 u32 input, u32 output, u32 config) 402{ 403 struct ks0127 *ks = to_ks0127(sd); 404 405 switch (input) { 406 case KS_INPUT_COMPOSITE_1: 407 case KS_INPUT_COMPOSITE_2: 408 case KS_INPUT_COMPOSITE_3: 409 case KS_INPUT_COMPOSITE_4: 410 case KS_INPUT_COMPOSITE_5: 411 case KS_INPUT_COMPOSITE_6: 412 v4l2_dbg(1, debug, sd, 413 "s_routing %d: Composite\n", input); 414 /* autodetect 50/60 Hz */ 415 ks0127_and_or(sd, KS_CMDA, 0xfc, 0x00); 416 /* VSE=0 */ 417 ks0127_and_or(sd, KS_CMDA, ~0x40, 0x00); 418 /* set input line */ 419 ks0127_and_or(sd, KS_CMDB, 0xb0, input); 420 /* non-freerunning mode */ 421 ks0127_and_or(sd, KS_CMDC, 0x70, 0x0a); 422 /* analog input */ 423 ks0127_and_or(sd, KS_CMDD, 0x03, 0x00); 424 /* enable chroma demodulation */ 425 ks0127_and_or(sd, KS_CTRACK, 0xcf, 0x00); 426 /* chroma trap, HYBWR=1 */ 427 ks0127_and_or(sd, KS_LUMA, 0x00, 428 (reg_defaults[KS_LUMA])|0x0c); 429 /* scaler fullbw, luma comb off */ 430 ks0127_and_or(sd, KS_VERTIA, 0x08, 0x81); 431 /* manual chroma comb .25 .5 .25 */ 432 ks0127_and_or(sd, KS_VERTIC, 0x0f, 0x90); 433 434 /* chroma path delay */ 435 ks0127_and_or(sd, KS_CHROMB, 0x0f, 0x90); 436 437 ks0127_write(sd, KS_UGAIN, reg_defaults[KS_UGAIN]); 438 ks0127_write(sd, KS_VGAIN, reg_defaults[KS_VGAIN]); 439 ks0127_write(sd, KS_UVOFFH, reg_defaults[KS_UVOFFH]); 440 ks0127_write(sd, KS_UVOFFL, reg_defaults[KS_UVOFFL]); 441 break; 442 443 case KS_INPUT_SVIDEO_1: 444 case KS_INPUT_SVIDEO_2: 445 case KS_INPUT_SVIDEO_3: 446 v4l2_dbg(1, debug, sd, 447 "s_routing %d: S-Video\n", input); 448 /* autodetect 50/60 Hz */ 449 ks0127_and_or(sd, KS_CMDA, 0xfc, 0x00); 450 /* VSE=0 */ 451 ks0127_and_or(sd, KS_CMDA, ~0x40, 0x00); 452 /* set input line */ 453 ks0127_and_or(sd, KS_CMDB, 0xb0, input); 454 /* non-freerunning mode */ 455 ks0127_and_or(sd, KS_CMDC, 0x70, 0x0a); 456 /* analog input */ 457 ks0127_and_or(sd, KS_CMDD, 0x03, 0x00); 458 /* enable chroma demodulation */ 459 ks0127_and_or(sd, KS_CTRACK, 0xcf, 0x00); 460 ks0127_and_or(sd, KS_LUMA, 0x00, 461 reg_defaults[KS_LUMA]); 462 /* disable luma comb */ 463 ks0127_and_or(sd, KS_VERTIA, 0x08, 464 (reg_defaults[KS_VERTIA]&0xf0)|0x01); 465 ks0127_and_or(sd, KS_VERTIC, 0x0f, 466 reg_defaults[KS_VERTIC]&0xf0); 467 468 ks0127_and_or(sd, KS_CHROMB, 0x0f, 469 reg_defaults[KS_CHROMB]&0xf0); 470 471 ks0127_write(sd, KS_UGAIN, reg_defaults[KS_UGAIN]); 472 ks0127_write(sd, KS_VGAIN, reg_defaults[KS_VGAIN]); 473 ks0127_write(sd, KS_UVOFFH, reg_defaults[KS_UVOFFH]); 474 ks0127_write(sd, KS_UVOFFL, reg_defaults[KS_UVOFFL]); 475 break; 476 477 case KS_INPUT_YUV656: 478 v4l2_dbg(1, debug, sd, "s_routing 15: YUV656\n"); 479 if (ks->norm & V4L2_STD_525_60) 480 /* force 60 Hz */ 481 ks0127_and_or(sd, KS_CMDA, 0xfc, 0x03); 482 else 483 /* force 50 Hz */ 484 ks0127_and_or(sd, KS_CMDA, 0xfc, 0x02); 485 486 ks0127_and_or(sd, KS_CMDA, 0xff, 0x40); /* VSE=1 */ 487 /* set input line and VALIGN */ 488 ks0127_and_or(sd, KS_CMDB, 0xb0, (input | 0x40)); 489 /* freerunning mode, */ 490 /* TSTGEN = 1 TSTGFR=11 TSTGPH=0 TSTGPK=0 VMEM=1*/ 491 ks0127_and_or(sd, KS_CMDC, 0x70, 0x87); 492 /* digital input, SYNDIR = 0 INPSL=01 CLKDIR=0 EAV=0 */ 493 ks0127_and_or(sd, KS_CMDD, 0x03, 0x08); 494 /* disable chroma demodulation */ 495 ks0127_and_or(sd, KS_CTRACK, 0xcf, 0x30); 496 /* HYPK =01 CTRAP = 0 HYBWR=0 PED=1 RGBH=1 UNIT=1 */ 497 ks0127_and_or(sd, KS_LUMA, 0x00, 0x71); 498 ks0127_and_or(sd, KS_VERTIC, 0x0f, 499 reg_defaults[KS_VERTIC]&0xf0); 500 501 /* scaler fullbw, luma comb off */ 502 ks0127_and_or(sd, KS_VERTIA, 0x08, 0x81); 503 504 ks0127_and_or(sd, KS_CHROMB, 0x0f, 505 reg_defaults[KS_CHROMB]&0xf0); 506 507 ks0127_and_or(sd, KS_CON, 0x00, 0x00); 508 ks0127_and_or(sd, KS_BRT, 0x00, 32); /* spec: 34 */ 509 /* spec: 229 (e5) */ 510 ks0127_and_or(sd, KS_SAT, 0x00, 0xe8); 511 ks0127_and_or(sd, KS_HUE, 0x00, 0); 512 513 ks0127_and_or(sd, KS_UGAIN, 0x00, 238); 514 ks0127_and_or(sd, KS_VGAIN, 0x00, 0x00); 515 516 /*UOFF:0x30, VOFF:0x30, TSTCGN=1 */ 517 ks0127_and_or(sd, KS_UVOFFH, 0x00, 0x4f); 518 ks0127_and_or(sd, KS_UVOFFL, 0x00, 0x00); 519 break; 520 521 default: 522 v4l2_dbg(1, debug, sd, 523 "s_routing: Unknown input %d\n", input); 524 break; 525 } 526 527 /* hack: CDMLPF sometimes spontaneously switches on; */ 528 /* force back off */ 529 ks0127_write(sd, KS_DEMOD, reg_defaults[KS_DEMOD]); 530 return 0; 531} 532 533static int ks0127_s_std(struct v4l2_subdev *sd, v4l2_std_id std) 534{ 535 struct ks0127 *ks = to_ks0127(sd); 536 537 /* Set to automatic SECAM/Fsc mode */ 538 ks0127_and_or(sd, KS_DEMOD, 0xf0, 0x00); 539 540 ks->norm = std; 541 if (std & V4L2_STD_NTSC) { 542 v4l2_dbg(1, debug, sd, 543 "s_std: NTSC_M\n"); 544 ks0127_and_or(sd, KS_CHROMA, 0x9f, 0x20); 545 } else if (std & V4L2_STD_PAL_N) { 546 v4l2_dbg(1, debug, sd, 547 "s_std: NTSC_N (fixme)\n"); 548 ks0127_and_or(sd, KS_CHROMA, 0x9f, 0x40); 549 } else if (std & V4L2_STD_PAL) { 550 v4l2_dbg(1, debug, sd, 551 "s_std: PAL_N\n"); 552 ks0127_and_or(sd, KS_CHROMA, 0x9f, 0x20); 553 } else if (std & V4L2_STD_PAL_M) { 554 v4l2_dbg(1, debug, sd, 555 "s_std: PAL_M (fixme)\n"); 556 ks0127_and_or(sd, KS_CHROMA, 0x9f, 0x40); 557 } else if (std & V4L2_STD_SECAM) { 558 v4l2_dbg(1, debug, sd, 559 "s_std: SECAM\n"); 560 561 /* set to secam autodetection */ 562 ks0127_and_or(sd, KS_CHROMA, 0xdf, 0x20); 563 ks0127_and_or(sd, KS_DEMOD, 0xf0, 0x00); 564 schedule_timeout_interruptible(HZ/10+1); 565 566 /* did it autodetect? */ 567 if (!(ks0127_read(sd, KS_DEMOD) & 0x40)) 568 /* force to secam mode */ 569 ks0127_and_or(sd, KS_DEMOD, 0xf0, 0x0f); 570 } else { 571 v4l2_dbg(1, debug, sd, "s_std: Unknown norm %llx\n", 572 (unsigned long long)std); 573 } 574 return 0; 575} 576 577static int ks0127_s_stream(struct v4l2_subdev *sd, int enable) 578{ 579 v4l2_dbg(1, debug, sd, "s_stream(%d)\n", enable); 580 if (enable) { 581 /* All output pins on */ 582 ks0127_and_or(sd, KS_OFMTA, 0xcf, 0x30); 583 /* Obey the OEN pin */ 584 ks0127_and_or(sd, KS_CDEM, 0x7f, 0x00); 585 } else { 586 /* Video output pins off */ 587 ks0127_and_or(sd, KS_OFMTA, 0xcf, 0x00); 588 /* Ignore the OEN pin */ 589 ks0127_and_or(sd, KS_CDEM, 0x7f, 0x80); 590 } 591 return 0; 592} 593 594static int ks0127_status(struct v4l2_subdev *sd, u32 *pstatus, v4l2_std_id *pstd) 595{ 596 int stat = V4L2_IN_ST_NO_SIGNAL; 597 u8 status; 598 v4l2_std_id std = V4L2_STD_ALL; 599 600 status = ks0127_read(sd, KS_STAT); 601 if (!(status & 0x20)) /* NOVID not set */ 602 stat = 0; 603 if (!(status & 0x01)) /* CLOCK set */ 604 stat |= V4L2_IN_ST_NO_COLOR; 605 if ((status & 0x08)) /* PALDET set */ 606 std = V4L2_STD_PAL; 607 else 608 std = V4L2_STD_NTSC; 609 if (pstd) 610 *pstd = std; 611 if (pstatus) 612 *pstatus = stat; 613 return 0; 614} 615 616static int ks0127_querystd(struct v4l2_subdev *sd, v4l2_std_id *std) 617{ 618 v4l2_dbg(1, debug, sd, "querystd\n"); 619 return ks0127_status(sd, NULL, std); 620} 621 622static int ks0127_g_input_status(struct v4l2_subdev *sd, u32 *status) 623{ 624 v4l2_dbg(1, debug, sd, "g_input_status\n"); 625 return ks0127_status(sd, status, NULL); 626} 627 628static int ks0127_g_chip_ident(struct v4l2_subdev *sd, struct v4l2_dbg_chip_ident *chip) 629{ 630 struct i2c_client *client = v4l2_get_subdevdata(sd); 631 struct ks0127 *ks = to_ks0127(sd); 632 633 return v4l2_chip_ident_i2c_client(client, chip, ks->ident, 0); 634} 635 636/* ----------------------------------------------------------------------- */ 637 638static const struct v4l2_subdev_core_ops ks0127_core_ops = { 639 .g_chip_ident = ks0127_g_chip_ident, 640 .s_std = ks0127_s_std, 641}; 642 643static const struct v4l2_subdev_video_ops ks0127_video_ops = { 644 .s_routing = ks0127_s_routing, 645 .s_stream = ks0127_s_stream, 646 .querystd = ks0127_querystd, 647 .g_input_status = ks0127_g_input_status, 648}; 649 650static const struct v4l2_subdev_ops ks0127_ops = { 651 .core = &ks0127_core_ops, 652 .video = &ks0127_video_ops, 653}; 654 655/* ----------------------------------------------------------------------- */ 656 657 658static int ks0127_probe(struct i2c_client *client, const struct i2c_device_id *id) 659{ 660 struct ks0127 *ks; 661 struct v4l2_subdev *sd; 662 663 v4l_info(client, "%s chip found @ 0x%x (%s)\n", 664 client->addr == (I2C_KS0127_ADDON >> 1) ? "addon" : "on-board", 665 client->addr << 1, client->adapter->name); 666 667 ks = kzalloc(sizeof(*ks), GFP_KERNEL); 668 if (ks == NULL) 669 return -ENOMEM; 670 sd = &ks->sd; 671 v4l2_i2c_subdev_init(sd, client, &ks0127_ops); 672 673 /* power up */ 674 init_reg_defaults(); 675 ks0127_write(sd, KS_CMDA, 0x2c); 676 mdelay(10); 677 678 /* reset the device */ 679 ks0127_init(sd); 680 return 0; 681} 682 683static int ks0127_remove(struct i2c_client *client) 684{ 685 struct v4l2_subdev *sd = i2c_get_clientdata(client); 686 687 v4l2_device_unregister_subdev(sd); 688 ks0127_write(sd, KS_OFMTA, 0x20); /* tristate */ 689 ks0127_write(sd, KS_CMDA, 0x2c | 0x80); /* power down */ 690 kfree(to_ks0127(sd)); 691 return 0; 692} 693 694static const struct i2c_device_id ks0127_id[] = { 695 { "ks0127", 0 }, 696 { "ks0127b", 0 }, 697 { "ks0122s", 0 }, 698 { } 699}; 700MODULE_DEVICE_TABLE(i2c, ks0127_id); 701 702static struct v4l2_i2c_driver_data v4l2_i2c_data = { 703 .name = "ks0127", 704 .probe = ks0127_probe, 705 .remove = ks0127_remove, 706 .id_table = ks0127_id, 707}; 708