1/* 2 * Machine specific calibrate_tsc() for generic. 3 * Split out from timer_tsc.c by Osamu Tomita <tomita@cinet.co.jp> 4 */ 5/* ------ Calibrate the TSC ------- 6 * Return 2^32 * (1 / (TSC clocks per usec)) for do_fast_gettimeoffset(). 7 * Too much 64-bit arithmetic here to do this cleanly in C, and for 8 * accuracy's sake we want to keep the overhead on the CTC speaker (channel 2) 9 * output busy loop as low as possible. We avoid reading the CTC registers 10 * directly because of the awkward 8-bit access mechanism of the 82C54 11 * device. 12 */ 13#ifndef _ASM_X86_MACH_DEFAULT_MACH_TIMER_H 14#define _ASM_X86_MACH_DEFAULT_MACH_TIMER_H 15 16#define CALIBRATE_TIME_MSEC 30 /* 30 msecs */ 17#define CALIBRATE_LATCH \ 18 ((CLOCK_TICK_RATE * CALIBRATE_TIME_MSEC + 1000/2)/1000) 19 20static inline void mach_prepare_counter(void) 21{ 22 /* Set the Gate high, disable speaker */ 23 outb((inb(0x61) & ~0x02) | 0x01, 0x61); 24 25 /* 26 * Now let's take care of CTC channel 2 27 * 28 * Set the Gate high, program CTC channel 2 for mode 0, 29 * (interrupt on terminal count mode), binary count, 30 * load 5 * LATCH count, (LSB and MSB) to begin countdown. 31 * 32 * Some devices need a delay here. 33 */ 34 outb(0xb0, 0x43); /* binary, mode 0, LSB/MSB, Ch 2 */ 35 outb_p(CALIBRATE_LATCH & 0xff, 0x42); /* LSB of count */ 36 outb_p(CALIBRATE_LATCH >> 8, 0x42); /* MSB of count */ 37} 38 39static inline void mach_countup(unsigned long *count_p) 40{ 41 unsigned long count = 0; 42 do { 43 count++; 44 } while ((inb_p(0x61) & 0x20) == 0); 45 *count_p = count; 46} 47 48#endif /* _ASM_X86_MACH_DEFAULT_MACH_TIMER_H */ 49