• Home
  • History
  • Annotate
  • Line#
  • Navigate
  • Raw
  • Download
  • only in /netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/sh/kernel/cpu/sh2a/
1/*
2 * arch/sh/kernel/cpu/sh2a/clock-sh7203.c
3 *
4 * SH7203 support for the clock framework
5 *
6 *  Copyright (C) 2007 Kieran Bingham (MPC-Data Ltd)
7 *
8 * Based on clock-sh7263.c
9 *  Copyright (C) 2006  Yoshinori Sato
10 *
11 * Based on clock-sh4.c
12 *  Copyright (C) 2005  Paul Mundt
13 *
14 * This file is subject to the terms and conditions of the GNU General Public
15 * License.  See the file "COPYING" in the main directory of this archive
16 * for more details.
17 */
18#include <linux/init.h>
19#include <linux/kernel.h>
20#include <asm/clock.h>
21#include <asm/freq.h>
22#include <asm/io.h>
23
24static const int pll1rate[]={8,12,16,0};
25static const int pfc_divisors[]={1,2,3,4,6,8,12};
26#define ifc_divisors pfc_divisors
27
28#if (CONFIG_SH_CLK_MD == 0)
29#define PLL2 (1)
30#elif (CONFIG_SH_CLK_MD == 1)
31#define PLL2 (2)
32#elif (CONFIG_SH_CLK_MD == 2)
33#define PLL2 (4)
34#elif (CONFIG_SH_CLK_MD == 3)
35#define PLL2 (4)
36#else
37#error "Illegal Clock Mode!"
38#endif
39
40static void master_clk_init(struct clk *clk)
41{
42	clk->rate *= pll1rate[(__raw_readw(FREQCR) >> 8) & 0x0003] * PLL2 ;
43}
44
45static struct clk_ops sh7203_master_clk_ops = {
46	.init		= master_clk_init,
47};
48
49static unsigned long module_clk_recalc(struct clk *clk)
50{
51	int idx = (__raw_readw(FREQCR) & 0x0007);
52	return clk->parent->rate / pfc_divisors[idx];
53}
54
55static struct clk_ops sh7203_module_clk_ops = {
56	.recalc		= module_clk_recalc,
57};
58
59static unsigned long bus_clk_recalc(struct clk *clk)
60{
61	int idx = (__raw_readw(FREQCR) & 0x0007);
62	return clk->parent->rate / pfc_divisors[idx-2];
63}
64
65static struct clk_ops sh7203_bus_clk_ops = {
66	.recalc		= bus_clk_recalc,
67};
68
69static struct clk_ops sh7203_cpu_clk_ops = {
70	.recalc		= followparent_recalc,
71};
72
73static struct clk_ops *sh7203_clk_ops[] = {
74	&sh7203_master_clk_ops,
75	&sh7203_module_clk_ops,
76	&sh7203_bus_clk_ops,
77	&sh7203_cpu_clk_ops,
78};
79
80void __init arch_init_clk_ops(struct clk_ops **ops, int idx)
81{
82	if (idx < ARRAY_SIZE(sh7203_clk_ops))
83		*ops = sh7203_clk_ops[idx];
84}
85