1/* 2 * Copyright (C) 2009 Renesas Solutions Corp. 3 * 4 * Kuninori Morimoto <morimoto.kuninori@renesas.com> 5 * 6 * This file is subject to the terms and conditions of the GNU General Public 7 * License. See the file "COPYING" in the main directory of this archive 8 * for more details. 9 */ 10 11#include <linux/init.h> 12#include <linux/device.h> 13#include <linux/platform_device.h> 14#include <linux/mfd/sh_mobile_sdhi.h> 15#include <linux/mmc/host.h> 16#include <linux/mmc/sh_mmcif.h> 17#include <linux/mtd/physmap.h> 18#include <linux/gpio.h> 19#include <linux/interrupt.h> 20#include <linux/io.h> 21#include <linux/delay.h> 22#include <linux/usb/r8a66597.h> 23#include <linux/i2c.h> 24#include <linux/i2c/tsc2007.h> 25#include <linux/spi/spi.h> 26#include <linux/spi/sh_msiof.h> 27#include <linux/spi/mmc_spi.h> 28#include <linux/input.h> 29#include <linux/input/sh_keysc.h> 30#include <video/sh_mobile_lcdc.h> 31#include <sound/sh_fsi.h> 32#include <media/sh_mobile_ceu.h> 33#include <media/tw9910.h> 34#include <media/mt9t112.h> 35#include <asm/heartbeat.h> 36#include <asm/sh_eth.h> 37#include <asm/clock.h> 38#include <asm/suspend.h> 39#include <cpu/sh7724.h> 40 41/* 42 * Address Interface BusWidth 43 *----------------------------------------- 44 * 0x0000_0000 uboot 16bit 45 * 0x0004_0000 Linux romImage 16bit 46 * 0x0014_0000 MTD for Linux 16bit 47 * 0x0400_0000 Internal I/O 16/32bit 48 * 0x0800_0000 DRAM 32bit 49 * 0x1800_0000 MFI 16bit 50 */ 51 52/* SWITCH 53 *------------------------------ 54 * DS2[1] = FlashROM write protect ON : write protect 55 * OFF : No write protect 56 * DS2[2] = RMII / TS, SCIF ON : RMII 57 * OFF : TS, SCIF3 58 * DS2[3] = Camera / Video ON : Camera 59 * OFF : NTSC/PAL (IN) 60 * DS2[5] = NTSC_OUT Clock ON : On board OSC 61 * OFF : SH7724 DV_CLK 62 * DS2[6-7] = MMC / SD ON-OFF : SD 63 * OFF-ON : MMC 64 */ 65 66/* Heartbeat */ 67static unsigned char led_pos[] = { 0, 1, 2, 3 }; 68 69static struct heartbeat_data heartbeat_data = { 70 .nr_bits = 4, 71 .bit_pos = led_pos, 72}; 73 74static struct resource heartbeat_resource = { 75 .start = 0xA405012C, /* PTG */ 76 .end = 0xA405012E - 1, 77 .flags = IORESOURCE_MEM | IORESOURCE_MEM_8BIT, 78}; 79 80static struct platform_device heartbeat_device = { 81 .name = "heartbeat", 82 .id = -1, 83 .dev = { 84 .platform_data = &heartbeat_data, 85 }, 86 .num_resources = 1, 87 .resource = &heartbeat_resource, 88}; 89 90/* MTD */ 91static struct mtd_partition nor_flash_partitions[] = { 92 { 93 .name = "boot loader", 94 .offset = 0, 95 .size = (5 * 1024 * 1024), 96 .mask_flags = MTD_WRITEABLE, /* force read-only */ 97 }, { 98 .name = "free-area", 99 .offset = MTDPART_OFS_APPEND, 100 .size = MTDPART_SIZ_FULL, 101 }, 102}; 103 104static struct physmap_flash_data nor_flash_data = { 105 .width = 2, 106 .parts = nor_flash_partitions, 107 .nr_parts = ARRAY_SIZE(nor_flash_partitions), 108}; 109 110static struct resource nor_flash_resources[] = { 111 [0] = { 112 .name = "NOR Flash", 113 .start = 0x00000000, 114 .end = 0x03ffffff, 115 .flags = IORESOURCE_MEM, 116 } 117}; 118 119static struct platform_device nor_flash_device = { 120 .name = "physmap-flash", 121 .resource = nor_flash_resources, 122 .num_resources = ARRAY_SIZE(nor_flash_resources), 123 .dev = { 124 .platform_data = &nor_flash_data, 125 }, 126}; 127 128/* SH Eth */ 129#define SH_ETH_ADDR (0xA4600000) 130static struct resource sh_eth_resources[] = { 131 [0] = { 132 .start = SH_ETH_ADDR, 133 .end = SH_ETH_ADDR + 0x1FC, 134 .flags = IORESOURCE_MEM, 135 }, 136 [1] = { 137 .start = 91, 138 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, 139 }, 140}; 141 142static struct sh_eth_plat_data sh_eth_plat = { 143 .phy = 0x1f, /* SMSC LAN8700 */ 144 .edmac_endian = EDMAC_LITTLE_ENDIAN, 145 .ether_link_active_low = 1 146}; 147 148static struct platform_device sh_eth_device = { 149 .name = "sh-eth", 150 .id = 0, 151 .dev = { 152 .platform_data = &sh_eth_plat, 153 }, 154 .num_resources = ARRAY_SIZE(sh_eth_resources), 155 .resource = sh_eth_resources, 156 .archdata = { 157 .hwblk_id = HWBLK_ETHER, 158 }, 159}; 160 161/* USB0 host */ 162static void usb0_port_power(int port, int power) 163{ 164 gpio_set_value(GPIO_PTB4, power); 165} 166 167static struct r8a66597_platdata usb0_host_data = { 168 .on_chip = 1, 169 .port_power = usb0_port_power, 170}; 171 172static struct resource usb0_host_resources[] = { 173 [0] = { 174 .start = 0xa4d80000, 175 .end = 0xa4d80124 - 1, 176 .flags = IORESOURCE_MEM, 177 }, 178 [1] = { 179 .start = 65, 180 .end = 65, 181 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW, 182 }, 183}; 184 185static struct platform_device usb0_host_device = { 186 .name = "r8a66597_hcd", 187 .id = 0, 188 .dev = { 189 .dma_mask = NULL, /* not use dma */ 190 .coherent_dma_mask = 0xffffffff, 191 .platform_data = &usb0_host_data, 192 }, 193 .num_resources = ARRAY_SIZE(usb0_host_resources), 194 .resource = usb0_host_resources, 195}; 196 197/* USB1 host/function */ 198static void usb1_port_power(int port, int power) 199{ 200 gpio_set_value(GPIO_PTB5, power); 201} 202 203static struct r8a66597_platdata usb1_common_data = { 204 .on_chip = 1, 205 .port_power = usb1_port_power, 206}; 207 208static struct resource usb1_common_resources[] = { 209 [0] = { 210 .start = 0xa4d90000, 211 .end = 0xa4d90124 - 1, 212 .flags = IORESOURCE_MEM, 213 }, 214 [1] = { 215 .start = 66, 216 .end = 66, 217 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW, 218 }, 219}; 220 221static struct platform_device usb1_common_device = { 222 /* .name will be added in arch_setup */ 223 .id = 1, 224 .dev = { 225 .dma_mask = NULL, /* not use dma */ 226 .coherent_dma_mask = 0xffffffff, 227 .platform_data = &usb1_common_data, 228 }, 229 .num_resources = ARRAY_SIZE(usb1_common_resources), 230 .resource = usb1_common_resources, 231}; 232 233/* LCDC */ 234static struct sh_mobile_lcdc_info lcdc_info = { 235 .ch[0] = { 236 .interface_type = RGB18, 237 .chan = LCDC_CHAN_MAINLCD, 238 .bpp = 16, 239 .lcd_cfg = { 240 .sync = 0, /* hsync and vsync are active low */ 241 }, 242 .lcd_size_cfg = { /* 7.0 inch */ 243 .width = 152, 244 .height = 91, 245 }, 246 .board_cfg = { 247 }, 248 } 249}; 250 251static struct resource lcdc_resources[] = { 252 [0] = { 253 .name = "LCDC", 254 .start = 0xfe940000, 255 .end = 0xfe942fff, 256 .flags = IORESOURCE_MEM, 257 }, 258 [1] = { 259 .start = 106, 260 .flags = IORESOURCE_IRQ, 261 }, 262}; 263 264static struct platform_device lcdc_device = { 265 .name = "sh_mobile_lcdc_fb", 266 .num_resources = ARRAY_SIZE(lcdc_resources), 267 .resource = lcdc_resources, 268 .dev = { 269 .platform_data = &lcdc_info, 270 }, 271 .archdata = { 272 .hwblk_id = HWBLK_LCDC, 273 }, 274}; 275 276/* CEU0 */ 277static struct sh_mobile_ceu_info sh_mobile_ceu0_info = { 278 .flags = SH_CEU_FLAG_USE_8BIT_BUS, 279}; 280 281static struct resource ceu0_resources[] = { 282 [0] = { 283 .name = "CEU0", 284 .start = 0xfe910000, 285 .end = 0xfe91009f, 286 .flags = IORESOURCE_MEM, 287 }, 288 [1] = { 289 .start = 52, 290 .flags = IORESOURCE_IRQ, 291 }, 292 [2] = { 293 /* place holder for contiguous memory */ 294 }, 295}; 296 297static struct platform_device ceu0_device = { 298 .name = "sh_mobile_ceu", 299 .id = 0, /* "ceu0" clock */ 300 .num_resources = ARRAY_SIZE(ceu0_resources), 301 .resource = ceu0_resources, 302 .dev = { 303 .platform_data = &sh_mobile_ceu0_info, 304 }, 305 .archdata = { 306 .hwblk_id = HWBLK_CEU0, 307 }, 308}; 309 310/* CEU1 */ 311static struct sh_mobile_ceu_info sh_mobile_ceu1_info = { 312 .flags = SH_CEU_FLAG_USE_8BIT_BUS, 313}; 314 315static struct resource ceu1_resources[] = { 316 [0] = { 317 .name = "CEU1", 318 .start = 0xfe914000, 319 .end = 0xfe91409f, 320 .flags = IORESOURCE_MEM, 321 }, 322 [1] = { 323 .start = 63, 324 .flags = IORESOURCE_IRQ, 325 }, 326 [2] = { 327 /* place holder for contiguous memory */ 328 }, 329}; 330 331static struct platform_device ceu1_device = { 332 .name = "sh_mobile_ceu", 333 .id = 1, /* "ceu1" clock */ 334 .num_resources = ARRAY_SIZE(ceu1_resources), 335 .resource = ceu1_resources, 336 .dev = { 337 .platform_data = &sh_mobile_ceu1_info, 338 }, 339 .archdata = { 340 .hwblk_id = HWBLK_CEU1, 341 }, 342}; 343 344/* I2C device */ 345static struct i2c_board_info i2c0_devices[] = { 346 { 347 I2C_BOARD_INFO("da7210", 0x1a), 348 }, 349}; 350 351static struct i2c_board_info i2c1_devices[] = { 352 { 353 I2C_BOARD_INFO("r2025sd", 0x32), 354 }, 355 { 356 I2C_BOARD_INFO("lis3lv02d", 0x1c), 357 .irq = 33, 358 } 359}; 360 361/* KEYSC */ 362static struct sh_keysc_info keysc_info = { 363 .mode = SH_KEYSC_MODE_1, 364 .scan_timing = 3, 365 .delay = 50, 366 .kycr2_delay = 100, 367 .keycodes = { KEY_1, 0, 0, 0, 0, 368 KEY_2, 0, 0, 0, 0, 369 KEY_3, 0, 0, 0, 0, 370 KEY_4, 0, 0, 0, 0, 371 KEY_5, 0, 0, 0, 0, 372 KEY_6, 0, 0, 0, 0, }, 373}; 374 375static struct resource keysc_resources[] = { 376 [0] = { 377 .name = "KEYSC", 378 .start = 0x044b0000, 379 .end = 0x044b000f, 380 .flags = IORESOURCE_MEM, 381 }, 382 [1] = { 383 .start = 79, 384 .flags = IORESOURCE_IRQ, 385 }, 386}; 387 388static struct platform_device keysc_device = { 389 .name = "sh_keysc", 390 .id = 0, /* keysc0 clock */ 391 .num_resources = ARRAY_SIZE(keysc_resources), 392 .resource = keysc_resources, 393 .dev = { 394 .platform_data = &keysc_info, 395 }, 396 .archdata = { 397 .hwblk_id = HWBLK_KEYSC, 398 }, 399}; 400 401/* TouchScreen */ 402#define IRQ0 32 403static int ts_get_pendown_state(void) 404{ 405 int val = 0; 406 gpio_free(GPIO_FN_INTC_IRQ0); 407 gpio_request(GPIO_PTZ0, NULL); 408 gpio_direction_input(GPIO_PTZ0); 409 410 val = gpio_get_value(GPIO_PTZ0); 411 412 gpio_free(GPIO_PTZ0); 413 gpio_request(GPIO_FN_INTC_IRQ0, NULL); 414 415 return val ? 0 : 1; 416} 417 418static int ts_init(void) 419{ 420 gpio_request(GPIO_FN_INTC_IRQ0, NULL); 421 return 0; 422} 423 424static struct tsc2007_platform_data tsc2007_info = { 425 .model = 2007, 426 .x_plate_ohms = 180, 427 .get_pendown_state = ts_get_pendown_state, 428 .init_platform_hw = ts_init, 429}; 430 431static struct i2c_board_info ts_i2c_clients = { 432 I2C_BOARD_INFO("tsc2007", 0x48), 433 .type = "tsc2007", 434 .platform_data = &tsc2007_info, 435 .irq = IRQ0, 436}; 437 438#ifdef CONFIG_MFD_SH_MOBILE_SDHI 439/* SDHI0 */ 440static void sdhi0_set_pwr(struct platform_device *pdev, int state) 441{ 442 gpio_set_value(GPIO_PTB6, state); 443} 444 445static struct sh_mobile_sdhi_info sdhi0_info = { 446 .dma_slave_tx = SHDMA_SLAVE_SDHI0_TX, 447 .dma_slave_rx = SHDMA_SLAVE_SDHI0_RX, 448 .set_pwr = sdhi0_set_pwr, 449}; 450 451static struct resource sdhi0_resources[] = { 452 [0] = { 453 .name = "SDHI0", 454 .start = 0x04ce0000, 455 .end = 0x04ce01ff, 456 .flags = IORESOURCE_MEM, 457 }, 458 [1] = { 459 .start = 100, 460 .flags = IORESOURCE_IRQ, 461 }, 462}; 463 464static struct platform_device sdhi0_device = { 465 .name = "sh_mobile_sdhi", 466 .num_resources = ARRAY_SIZE(sdhi0_resources), 467 .resource = sdhi0_resources, 468 .id = 0, 469 .dev = { 470 .platform_data = &sdhi0_info, 471 }, 472 .archdata = { 473 .hwblk_id = HWBLK_SDHI0, 474 }, 475}; 476 477#if !defined(CONFIG_MMC_SH_MMCIF) 478/* SDHI1 */ 479static void sdhi1_set_pwr(struct platform_device *pdev, int state) 480{ 481 gpio_set_value(GPIO_PTB7, state); 482} 483 484static struct sh_mobile_sdhi_info sdhi1_info = { 485 .dma_slave_tx = SHDMA_SLAVE_SDHI1_TX, 486 .dma_slave_rx = SHDMA_SLAVE_SDHI1_RX, 487 .set_pwr = sdhi1_set_pwr, 488}; 489 490static struct resource sdhi1_resources[] = { 491 [0] = { 492 .name = "SDHI1", 493 .start = 0x04cf0000, 494 .end = 0x04cf01ff, 495 .flags = IORESOURCE_MEM, 496 }, 497 [1] = { 498 .start = 23, 499 .flags = IORESOURCE_IRQ, 500 }, 501}; 502 503static struct platform_device sdhi1_device = { 504 .name = "sh_mobile_sdhi", 505 .num_resources = ARRAY_SIZE(sdhi1_resources), 506 .resource = sdhi1_resources, 507 .id = 1, 508 .dev = { 509 .platform_data = &sdhi1_info, 510 }, 511 .archdata = { 512 .hwblk_id = HWBLK_SDHI1, 513 }, 514}; 515#endif /* CONFIG_MMC_SH_MMCIF */ 516 517#else 518 519/* MMC SPI */ 520static int mmc_spi_get_ro(struct device *dev) 521{ 522 return gpio_get_value(GPIO_PTY6); 523} 524 525static int mmc_spi_get_cd(struct device *dev) 526{ 527 return !gpio_get_value(GPIO_PTY7); 528} 529 530static void mmc_spi_setpower(struct device *dev, unsigned int maskval) 531{ 532 gpio_set_value(GPIO_PTB6, maskval ? 1 : 0); 533} 534 535static struct mmc_spi_platform_data mmc_spi_info = { 536 .get_ro = mmc_spi_get_ro, 537 .get_cd = mmc_spi_get_cd, 538 .caps = MMC_CAP_NEEDS_POLL, 539 .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, /* 3.3V only */ 540 .setpower = mmc_spi_setpower, 541}; 542 543static struct spi_board_info spi_bus[] = { 544 { 545 .modalias = "mmc_spi", 546 .platform_data = &mmc_spi_info, 547 .max_speed_hz = 5000000, 548 .mode = SPI_MODE_0, 549 .controller_data = (void *) GPIO_PTM4, 550 }, 551}; 552 553/* MSIOF0 */ 554static struct sh_msiof_spi_info msiof0_data = { 555 .num_chipselect = 1, 556}; 557 558static struct resource msiof0_resources[] = { 559 [0] = { 560 .name = "MSIOF0", 561 .start = 0xa4c40000, 562 .end = 0xa4c40063, 563 .flags = IORESOURCE_MEM, 564 }, 565 [1] = { 566 .start = 84, 567 .flags = IORESOURCE_IRQ, 568 }, 569}; 570 571static struct platform_device msiof0_device = { 572 .name = "spi_sh_msiof", 573 .id = 0, /* MSIOF0 */ 574 .dev = { 575 .platform_data = &msiof0_data, 576 }, 577 .num_resources = ARRAY_SIZE(msiof0_resources), 578 .resource = msiof0_resources, 579 .archdata = { 580 .hwblk_id = HWBLK_MSIOF0, 581 }, 582}; 583 584#endif 585 586/* I2C Video/Camera */ 587static struct i2c_board_info i2c_camera[] = { 588 { 589 I2C_BOARD_INFO("tw9910", 0x45), 590 }, 591 { 592 /* 1st camera */ 593 I2C_BOARD_INFO("mt9t112", 0x3c), 594 }, 595 { 596 /* 2nd camera */ 597 I2C_BOARD_INFO("mt9t112", 0x3c), 598 }, 599}; 600 601/* tw9910 */ 602static int tw9910_power(struct device *dev, int mode) 603{ 604 int val = mode ? 0 : 1; 605 606 gpio_set_value(GPIO_PTU2, val); 607 if (mode) 608 mdelay(100); 609 610 return 0; 611} 612 613static struct tw9910_video_info tw9910_info = { 614 .buswidth = SOCAM_DATAWIDTH_8, 615 .mpout = TW9910_MPO_FIELD, 616}; 617 618static struct soc_camera_link tw9910_link = { 619 .i2c_adapter_id = 0, 620 .bus_id = 1, 621 .power = tw9910_power, 622 .board_info = &i2c_camera[0], 623 .module_name = "tw9910", 624 .priv = &tw9910_info, 625}; 626 627/* mt9t112 */ 628static int mt9t112_power1(struct device *dev, int mode) 629{ 630 gpio_set_value(GPIO_PTA3, mode); 631 if (mode) 632 mdelay(100); 633 634 return 0; 635} 636 637static struct mt9t112_camera_info mt9t112_info1 = { 638 .flags = MT9T112_FLAG_PCLK_RISING_EDGE | MT9T112_FLAG_DATAWIDTH_8, 639 .divider = { 0x49, 0x6, 0, 6, 0, 9, 9, 6, 0 }, /* for 24MHz */ 640}; 641 642static struct soc_camera_link mt9t112_link1 = { 643 .i2c_adapter_id = 0, 644 .power = mt9t112_power1, 645 .bus_id = 0, 646 .board_info = &i2c_camera[1], 647 .module_name = "mt9t112", 648 .priv = &mt9t112_info1, 649}; 650 651static int mt9t112_power2(struct device *dev, int mode) 652{ 653 gpio_set_value(GPIO_PTA4, mode); 654 if (mode) 655 mdelay(100); 656 657 return 0; 658} 659 660static struct mt9t112_camera_info mt9t112_info2 = { 661 .flags = MT9T112_FLAG_PCLK_RISING_EDGE | MT9T112_FLAG_DATAWIDTH_8, 662 .divider = { 0x49, 0x6, 0, 6, 0, 9, 9, 6, 0 }, /* for 24MHz */ 663}; 664 665static struct soc_camera_link mt9t112_link2 = { 666 .i2c_adapter_id = 1, 667 .power = mt9t112_power2, 668 .bus_id = 1, 669 .board_info = &i2c_camera[2], 670 .module_name = "mt9t112", 671 .priv = &mt9t112_info2, 672}; 673 674static struct platform_device camera_devices[] = { 675 { 676 .name = "soc-camera-pdrv", 677 .id = 0, 678 .dev = { 679 .platform_data = &tw9910_link, 680 }, 681 }, 682 { 683 .name = "soc-camera-pdrv", 684 .id = 1, 685 .dev = { 686 .platform_data = &mt9t112_link1, 687 }, 688 }, 689 { 690 .name = "soc-camera-pdrv", 691 .id = 2, 692 .dev = { 693 .platform_data = &mt9t112_link2, 694 }, 695 }, 696}; 697 698/* FSI */ 699/* 700 * FSI-B use external clock which came from da7210. 701 * So, we should change parent of fsi 702 */ 703#define FCLKBCR 0xa415000c 704static void fsimck_init(struct clk *clk) 705{ 706 u32 status = __raw_readl(clk->enable_reg); 707 708 /* use external clock */ 709 status &= ~0x000000ff; 710 status |= 0x00000080; 711 712 __raw_writel(status, clk->enable_reg); 713} 714 715static struct clk_ops fsimck_clk_ops = { 716 .init = fsimck_init, 717}; 718 719static struct clk fsimckb_clk = { 720 .ops = &fsimck_clk_ops, 721 .enable_reg = (void __iomem *)FCLKBCR, 722 .rate = 0, /* unknown */ 723}; 724 725static struct sh_fsi_platform_info fsi_info = { 726 .portb_flags = SH_FSI_BRS_INV | 727 SH_FSI_OUT_SLAVE_MODE | 728 SH_FSI_IN_SLAVE_MODE | 729 SH_FSI_OFMT(I2S) | 730 SH_FSI_IFMT(I2S), 731}; 732 733static struct resource fsi_resources[] = { 734 [0] = { 735 .name = "FSI", 736 .start = 0xFE3C0000, 737 .end = 0xFE3C021d, 738 .flags = IORESOURCE_MEM, 739 }, 740 [1] = { 741 .start = 108, 742 .flags = IORESOURCE_IRQ, 743 }, 744}; 745 746static struct platform_device fsi_device = { 747 .name = "sh_fsi", 748 .id = 0, 749 .num_resources = ARRAY_SIZE(fsi_resources), 750 .resource = fsi_resources, 751 .dev = { 752 .platform_data = &fsi_info, 753 }, 754 .archdata = { 755 .hwblk_id = HWBLK_SPU, /* FSI needs SPU hwblk */ 756 }, 757}; 758 759/* IrDA */ 760static struct resource irda_resources[] = { 761 [0] = { 762 .name = "IrDA", 763 .start = 0xA45D0000, 764 .end = 0xA45D0049, 765 .flags = IORESOURCE_MEM, 766 }, 767 [1] = { 768 .start = 20, 769 .flags = IORESOURCE_IRQ, 770 }, 771}; 772 773static struct platform_device irda_device = { 774 .name = "sh_sir", 775 .num_resources = ARRAY_SIZE(irda_resources), 776 .resource = irda_resources, 777}; 778 779#include <media/ak881x.h> 780#include <media/sh_vou.h> 781 782static struct ak881x_pdata ak881x_pdata = { 783 .flags = AK881X_IF_MODE_SLAVE, 784}; 785 786static struct i2c_board_info ak8813 = { 787 I2C_BOARD_INFO("ak8813", 0x20), 788 .platform_data = &ak881x_pdata, 789}; 790 791static struct sh_vou_pdata sh_vou_pdata = { 792 .bus_fmt = SH_VOU_BUS_8BIT, 793 .flags = SH_VOU_HSYNC_LOW | SH_VOU_VSYNC_LOW, 794 .board_info = &ak8813, 795 .i2c_adap = 0, 796 .module_name = "ak881x", 797}; 798 799static struct resource sh_vou_resources[] = { 800 [0] = { 801 .start = 0xfe960000, 802 .end = 0xfe962043, 803 .flags = IORESOURCE_MEM, 804 }, 805 [1] = { 806 .start = 55, 807 .flags = IORESOURCE_IRQ, 808 }, 809}; 810 811static struct platform_device vou_device = { 812 .name = "sh-vou", 813 .id = -1, 814 .num_resources = ARRAY_SIZE(sh_vou_resources), 815 .resource = sh_vou_resources, 816 .dev = { 817 .platform_data = &sh_vou_pdata, 818 }, 819 .archdata = { 820 .hwblk_id = HWBLK_VOU, 821 }, 822}; 823 824#if defined(CONFIG_MMC_SH_MMCIF) 825/* SH_MMCIF */ 826static void mmcif_set_pwr(struct platform_device *pdev, int state) 827{ 828 gpio_set_value(GPIO_PTB7, state); 829} 830 831static void mmcif_down_pwr(struct platform_device *pdev) 832{ 833 gpio_set_value(GPIO_PTB7, 0); 834} 835 836static struct resource sh_mmcif_resources[] = { 837 [0] = { 838 .name = "SH_MMCIF", 839 .start = 0xA4CA0000, 840 .end = 0xA4CA00FF, 841 .flags = IORESOURCE_MEM, 842 }, 843 [1] = { 844 /* MMC2I */ 845 .start = 29, 846 .flags = IORESOURCE_IRQ, 847 }, 848 [2] = { 849 /* MMC3I */ 850 .start = 30, 851 .flags = IORESOURCE_IRQ, 852 }, 853}; 854 855static struct sh_mmcif_plat_data sh_mmcif_plat = { 856 .set_pwr = mmcif_set_pwr, 857 .down_pwr = mmcif_down_pwr, 858 .sup_pclk = 0, /* SH7724: Max Pclk/2 */ 859 .caps = MMC_CAP_4_BIT_DATA | 860 MMC_CAP_8_BIT_DATA | 861 MMC_CAP_NEEDS_POLL, 862 .ocr = MMC_VDD_32_33 | MMC_VDD_33_34, 863}; 864 865static struct platform_device sh_mmcif_device = { 866 .name = "sh_mmcif", 867 .id = 0, 868 .dev = { 869 .platform_data = &sh_mmcif_plat, 870 }, 871 .num_resources = ARRAY_SIZE(sh_mmcif_resources), 872 .resource = sh_mmcif_resources, 873}; 874#endif 875 876static struct platform_device *ecovec_devices[] __initdata = { 877 &heartbeat_device, 878 &nor_flash_device, 879 &sh_eth_device, 880 &usb0_host_device, 881 &usb1_common_device, 882 &lcdc_device, 883 &ceu0_device, 884 &ceu1_device, 885 &keysc_device, 886#ifdef CONFIG_MFD_SH_MOBILE_SDHI 887 &sdhi0_device, 888#if !defined(CONFIG_MMC_SH_MMCIF) 889 &sdhi1_device, 890#endif 891#else 892 &msiof0_device, 893#endif 894 &camera_devices[0], 895 &camera_devices[1], 896 &camera_devices[2], 897 &fsi_device, 898 &irda_device, 899 &vou_device, 900#if defined(CONFIG_MMC_SH_MMCIF) 901 &sh_mmcif_device, 902#endif 903}; 904 905#ifdef CONFIG_I2C 906#define EEPROM_ADDR 0x50 907static u8 mac_read(struct i2c_adapter *a, u8 command) 908{ 909 struct i2c_msg msg[2]; 910 u8 buf; 911 int ret; 912 913 msg[0].addr = EEPROM_ADDR; 914 msg[0].flags = 0; 915 msg[0].len = 1; 916 msg[0].buf = &command; 917 918 msg[1].addr = EEPROM_ADDR; 919 msg[1].flags = I2C_M_RD; 920 msg[1].len = 1; 921 msg[1].buf = &buf; 922 923 ret = i2c_transfer(a, msg, 2); 924 if (ret < 0) { 925 printk(KERN_ERR "error %d\n", ret); 926 buf = 0xff; 927 } 928 929 return buf; 930} 931 932static void __init sh_eth_init(struct sh_eth_plat_data *pd) 933{ 934 struct i2c_adapter *a = i2c_get_adapter(1); 935 int i; 936 937 if (!a) { 938 pr_err("can not get I2C 1\n"); 939 return; 940 } 941 942 /* read MAC address frome EEPROM */ 943 for (i = 0; i < sizeof(pd->mac_addr); i++) { 944 pd->mac_addr[i] = mac_read(a, 0x10 + i); 945 msleep(10); 946 } 947 948 i2c_put_adapter(a); 949} 950#else 951static void __init sh_eth_init(struct sh_eth_plat_data *pd) 952{ 953 pr_err("unable to read sh_eth MAC address\n"); 954} 955#endif 956 957#define PORT_HIZA 0xA4050158 958#define IODRIVEA 0xA405018A 959 960extern char ecovec24_sdram_enter_start; 961extern char ecovec24_sdram_enter_end; 962extern char ecovec24_sdram_leave_start; 963extern char ecovec24_sdram_leave_end; 964 965static int __init arch_setup(void) 966{ 967 struct clk *clk; 968 969 /* register board specific self-refresh code */ 970 sh_mobile_register_self_refresh(SUSP_SH_STANDBY | SUSP_SH_SF | 971 SUSP_SH_RSTANDBY, 972 &ecovec24_sdram_enter_start, 973 &ecovec24_sdram_enter_end, 974 &ecovec24_sdram_leave_start, 975 &ecovec24_sdram_leave_end); 976 977 /* enable STATUS0, STATUS2 and PDSTATUS */ 978 gpio_request(GPIO_FN_STATUS0, NULL); 979 gpio_request(GPIO_FN_STATUS2, NULL); 980 gpio_request(GPIO_FN_PDSTATUS, NULL); 981 982 /* enable SCIFA0 */ 983 gpio_request(GPIO_FN_SCIF0_TXD, NULL); 984 gpio_request(GPIO_FN_SCIF0_RXD, NULL); 985 986 /* enable debug LED */ 987 gpio_request(GPIO_PTG0, NULL); 988 gpio_request(GPIO_PTG1, NULL); 989 gpio_request(GPIO_PTG2, NULL); 990 gpio_request(GPIO_PTG3, NULL); 991 gpio_direction_output(GPIO_PTG0, 0); 992 gpio_direction_output(GPIO_PTG1, 0); 993 gpio_direction_output(GPIO_PTG2, 0); 994 gpio_direction_output(GPIO_PTG3, 0); 995 __raw_writew((__raw_readw(PORT_HIZA) & ~(0x1 << 1)) , PORT_HIZA); 996 997 /* enable SH-Eth */ 998 gpio_request(GPIO_PTA1, NULL); 999 gpio_direction_output(GPIO_PTA1, 1); 1000 mdelay(20); 1001 1002 gpio_request(GPIO_FN_RMII_RXD0, NULL); 1003 gpio_request(GPIO_FN_RMII_RXD1, NULL); 1004 gpio_request(GPIO_FN_RMII_TXD0, NULL); 1005 gpio_request(GPIO_FN_RMII_TXD1, NULL); 1006 gpio_request(GPIO_FN_RMII_REF_CLK, NULL); 1007 gpio_request(GPIO_FN_RMII_TX_EN, NULL); 1008 gpio_request(GPIO_FN_RMII_RX_ER, NULL); 1009 gpio_request(GPIO_FN_RMII_CRS_DV, NULL); 1010 gpio_request(GPIO_FN_MDIO, NULL); 1011 gpio_request(GPIO_FN_MDC, NULL); 1012 gpio_request(GPIO_FN_LNKSTA, NULL); 1013 1014 /* enable USB */ 1015 __raw_writew(0x0000, 0xA4D80000); 1016 __raw_writew(0x0000, 0xA4D90000); 1017 gpio_request(GPIO_PTB3, NULL); 1018 gpio_request(GPIO_PTB4, NULL); 1019 gpio_request(GPIO_PTB5, NULL); 1020 gpio_direction_input(GPIO_PTB3); 1021 gpio_direction_output(GPIO_PTB4, 0); 1022 gpio_direction_output(GPIO_PTB5, 0); 1023 __raw_writew(0x0600, 0xa40501d4); 1024 __raw_writew(0x0600, 0xa4050192); 1025 1026 if (gpio_get_value(GPIO_PTB3)) { 1027 printk(KERN_INFO "USB1 function is selected\n"); 1028 usb1_common_device.name = "r8a66597_udc"; 1029 } else { 1030 printk(KERN_INFO "USB1 host is selected\n"); 1031 usb1_common_device.name = "r8a66597_hcd"; 1032 } 1033 1034 /* enable LCDC */ 1035 gpio_request(GPIO_FN_LCDD23, NULL); 1036 gpio_request(GPIO_FN_LCDD22, NULL); 1037 gpio_request(GPIO_FN_LCDD21, NULL); 1038 gpio_request(GPIO_FN_LCDD20, NULL); 1039 gpio_request(GPIO_FN_LCDD19, NULL); 1040 gpio_request(GPIO_FN_LCDD18, NULL); 1041 gpio_request(GPIO_FN_LCDD17, NULL); 1042 gpio_request(GPIO_FN_LCDD16, NULL); 1043 gpio_request(GPIO_FN_LCDD15, NULL); 1044 gpio_request(GPIO_FN_LCDD14, NULL); 1045 gpio_request(GPIO_FN_LCDD13, NULL); 1046 gpio_request(GPIO_FN_LCDD12, NULL); 1047 gpio_request(GPIO_FN_LCDD11, NULL); 1048 gpio_request(GPIO_FN_LCDD10, NULL); 1049 gpio_request(GPIO_FN_LCDD9, NULL); 1050 gpio_request(GPIO_FN_LCDD8, NULL); 1051 gpio_request(GPIO_FN_LCDD7, NULL); 1052 gpio_request(GPIO_FN_LCDD6, NULL); 1053 gpio_request(GPIO_FN_LCDD5, NULL); 1054 gpio_request(GPIO_FN_LCDD4, NULL); 1055 gpio_request(GPIO_FN_LCDD3, NULL); 1056 gpio_request(GPIO_FN_LCDD2, NULL); 1057 gpio_request(GPIO_FN_LCDD1, NULL); 1058 gpio_request(GPIO_FN_LCDD0, NULL); 1059 gpio_request(GPIO_FN_LCDDISP, NULL); 1060 gpio_request(GPIO_FN_LCDHSYN, NULL); 1061 gpio_request(GPIO_FN_LCDDCK, NULL); 1062 gpio_request(GPIO_FN_LCDVSYN, NULL); 1063 gpio_request(GPIO_FN_LCDDON, NULL); 1064 gpio_request(GPIO_FN_LCDLCLK, NULL); 1065 __raw_writew((__raw_readw(PORT_HIZA) & ~0x0001), PORT_HIZA); 1066 1067 gpio_request(GPIO_PTE6, NULL); 1068 gpio_request(GPIO_PTU1, NULL); 1069 gpio_request(GPIO_PTR1, NULL); 1070 gpio_request(GPIO_PTA2, NULL); 1071 gpio_direction_input(GPIO_PTE6); 1072 gpio_direction_output(GPIO_PTU1, 0); 1073 gpio_direction_output(GPIO_PTR1, 0); 1074 gpio_direction_output(GPIO_PTA2, 0); 1075 1076 /* I/O buffer drive ability is high */ 1077 __raw_writew((__raw_readw(IODRIVEA) & ~0x00c0) | 0x0080 , IODRIVEA); 1078 1079 if (gpio_get_value(GPIO_PTE6)) { 1080 /* DVI */ 1081 lcdc_info.clock_source = LCDC_CLK_EXTERNAL; 1082 lcdc_info.ch[0].clock_divider = 1, 1083 lcdc_info.ch[0].lcd_cfg.name = "DVI"; 1084 lcdc_info.ch[0].lcd_cfg.xres = 1280; 1085 lcdc_info.ch[0].lcd_cfg.yres = 720; 1086 lcdc_info.ch[0].lcd_cfg.left_margin = 220; 1087 lcdc_info.ch[0].lcd_cfg.right_margin = 110; 1088 lcdc_info.ch[0].lcd_cfg.hsync_len = 40; 1089 lcdc_info.ch[0].lcd_cfg.upper_margin = 20; 1090 lcdc_info.ch[0].lcd_cfg.lower_margin = 5; 1091 lcdc_info.ch[0].lcd_cfg.vsync_len = 5; 1092 1093 gpio_set_value(GPIO_PTA2, 1); 1094 gpio_set_value(GPIO_PTU1, 1); 1095 } else { 1096 /* Panel */ 1097 1098 lcdc_info.clock_source = LCDC_CLK_PERIPHERAL; 1099 lcdc_info.ch[0].clock_divider = 2, 1100 lcdc_info.ch[0].lcd_cfg.name = "Panel"; 1101 lcdc_info.ch[0].lcd_cfg.xres = 800; 1102 lcdc_info.ch[0].lcd_cfg.yres = 480; 1103 lcdc_info.ch[0].lcd_cfg.left_margin = 220; 1104 lcdc_info.ch[0].lcd_cfg.right_margin = 110; 1105 lcdc_info.ch[0].lcd_cfg.hsync_len = 70; 1106 lcdc_info.ch[0].lcd_cfg.upper_margin = 20; 1107 lcdc_info.ch[0].lcd_cfg.lower_margin = 5; 1108 lcdc_info.ch[0].lcd_cfg.vsync_len = 5; 1109 1110 gpio_set_value(GPIO_PTR1, 1); 1111 1112 gpio_request(GPIO_PTF4, NULL); 1113 gpio_direction_output(GPIO_PTF4, 1); 1114 1115 /* enable TouchScreen */ 1116 i2c_register_board_info(0, &ts_i2c_clients, 1); 1117 set_irq_type(IRQ0, IRQ_TYPE_LEVEL_LOW); 1118 } 1119 1120 /* enable CEU0 */ 1121 gpio_request(GPIO_FN_VIO0_D15, NULL); 1122 gpio_request(GPIO_FN_VIO0_D14, NULL); 1123 gpio_request(GPIO_FN_VIO0_D13, NULL); 1124 gpio_request(GPIO_FN_VIO0_D12, NULL); 1125 gpio_request(GPIO_FN_VIO0_D11, NULL); 1126 gpio_request(GPIO_FN_VIO0_D10, NULL); 1127 gpio_request(GPIO_FN_VIO0_D9, NULL); 1128 gpio_request(GPIO_FN_VIO0_D8, NULL); 1129 gpio_request(GPIO_FN_VIO0_D7, NULL); 1130 gpio_request(GPIO_FN_VIO0_D6, NULL); 1131 gpio_request(GPIO_FN_VIO0_D5, NULL); 1132 gpio_request(GPIO_FN_VIO0_D4, NULL); 1133 gpio_request(GPIO_FN_VIO0_D3, NULL); 1134 gpio_request(GPIO_FN_VIO0_D2, NULL); 1135 gpio_request(GPIO_FN_VIO0_D1, NULL); 1136 gpio_request(GPIO_FN_VIO0_D0, NULL); 1137 gpio_request(GPIO_FN_VIO0_VD, NULL); 1138 gpio_request(GPIO_FN_VIO0_CLK, NULL); 1139 gpio_request(GPIO_FN_VIO0_FLD, NULL); 1140 gpio_request(GPIO_FN_VIO0_HD, NULL); 1141 platform_resource_setup_memory(&ceu0_device, "ceu0", 4 << 20); 1142 1143 /* enable CEU1 */ 1144 gpio_request(GPIO_FN_VIO1_D7, NULL); 1145 gpio_request(GPIO_FN_VIO1_D6, NULL); 1146 gpio_request(GPIO_FN_VIO1_D5, NULL); 1147 gpio_request(GPIO_FN_VIO1_D4, NULL); 1148 gpio_request(GPIO_FN_VIO1_D3, NULL); 1149 gpio_request(GPIO_FN_VIO1_D2, NULL); 1150 gpio_request(GPIO_FN_VIO1_D1, NULL); 1151 gpio_request(GPIO_FN_VIO1_D0, NULL); 1152 gpio_request(GPIO_FN_VIO1_FLD, NULL); 1153 gpio_request(GPIO_FN_VIO1_HD, NULL); 1154 gpio_request(GPIO_FN_VIO1_VD, NULL); 1155 gpio_request(GPIO_FN_VIO1_CLK, NULL); 1156 platform_resource_setup_memory(&ceu1_device, "ceu1", 4 << 20); 1157 1158 /* enable KEYSC */ 1159 gpio_request(GPIO_FN_KEYOUT5_IN5, NULL); 1160 gpio_request(GPIO_FN_KEYOUT4_IN6, NULL); 1161 gpio_request(GPIO_FN_KEYOUT3, NULL); 1162 gpio_request(GPIO_FN_KEYOUT2, NULL); 1163 gpio_request(GPIO_FN_KEYOUT1, NULL); 1164 gpio_request(GPIO_FN_KEYOUT0, NULL); 1165 gpio_request(GPIO_FN_KEYIN0, NULL); 1166 1167 /* enable user debug switch */ 1168 gpio_request(GPIO_PTR0, NULL); 1169 gpio_request(GPIO_PTR4, NULL); 1170 gpio_request(GPIO_PTR5, NULL); 1171 gpio_request(GPIO_PTR6, NULL); 1172 gpio_direction_input(GPIO_PTR0); 1173 gpio_direction_input(GPIO_PTR4); 1174 gpio_direction_input(GPIO_PTR5); 1175 gpio_direction_input(GPIO_PTR6); 1176 1177#ifdef CONFIG_MFD_SH_MOBILE_SDHI 1178 /* enable SDHI0 on CN11 (needs DS2.4 set to ON) */ 1179 gpio_request(GPIO_FN_SDHI0CD, NULL); 1180 gpio_request(GPIO_FN_SDHI0WP, NULL); 1181 gpio_request(GPIO_FN_SDHI0CMD, NULL); 1182 gpio_request(GPIO_FN_SDHI0CLK, NULL); 1183 gpio_request(GPIO_FN_SDHI0D3, NULL); 1184 gpio_request(GPIO_FN_SDHI0D2, NULL); 1185 gpio_request(GPIO_FN_SDHI0D1, NULL); 1186 gpio_request(GPIO_FN_SDHI0D0, NULL); 1187 gpio_request(GPIO_PTB6, NULL); 1188 gpio_direction_output(GPIO_PTB6, 0); 1189 1190#if !defined(CONFIG_MMC_SH_MMCIF) 1191 /* enable SDHI1 on CN12 (needs DS2.6,7 set to ON,OFF) */ 1192 gpio_request(GPIO_FN_SDHI1CD, NULL); 1193 gpio_request(GPIO_FN_SDHI1WP, NULL); 1194 gpio_request(GPIO_FN_SDHI1CMD, NULL); 1195 gpio_request(GPIO_FN_SDHI1CLK, NULL); 1196 gpio_request(GPIO_FN_SDHI1D3, NULL); 1197 gpio_request(GPIO_FN_SDHI1D2, NULL); 1198 gpio_request(GPIO_FN_SDHI1D1, NULL); 1199 gpio_request(GPIO_FN_SDHI1D0, NULL); 1200 gpio_request(GPIO_PTB7, NULL); 1201 gpio_direction_output(GPIO_PTB7, 0); 1202 1203 /* I/O buffer drive ability is high for SDHI1 */ 1204 __raw_writew((__raw_readw(IODRIVEA) & ~0x3000) | 0x2000 , IODRIVEA); 1205#endif /* CONFIG_MMC_SH_MMCIF */ 1206#else 1207 /* enable MSIOF0 on CN11 (needs DS2.4 set to OFF) */ 1208 gpio_request(GPIO_FN_MSIOF0_TXD, NULL); 1209 gpio_request(GPIO_FN_MSIOF0_RXD, NULL); 1210 gpio_request(GPIO_FN_MSIOF0_TSCK, NULL); 1211 gpio_request(GPIO_PTM4, NULL); /* software CS control of TSYNC pin */ 1212 gpio_direction_output(GPIO_PTM4, 1); /* active low CS */ 1213 gpio_request(GPIO_PTB6, NULL); /* 3.3V power control */ 1214 gpio_direction_output(GPIO_PTB6, 0); /* disable power by default */ 1215 gpio_request(GPIO_PTY6, NULL); /* write protect */ 1216 gpio_direction_input(GPIO_PTY6); 1217 gpio_request(GPIO_PTY7, NULL); /* card detect */ 1218 gpio_direction_input(GPIO_PTY7); 1219 1220 spi_register_board_info(spi_bus, ARRAY_SIZE(spi_bus)); 1221#endif 1222 1223 /* enable Video */ 1224 gpio_request(GPIO_PTU2, NULL); 1225 gpio_direction_output(GPIO_PTU2, 1); 1226 1227 /* enable Camera */ 1228 gpio_request(GPIO_PTA3, NULL); 1229 gpio_request(GPIO_PTA4, NULL); 1230 gpio_direction_output(GPIO_PTA3, 0); 1231 gpio_direction_output(GPIO_PTA4, 0); 1232 1233 /* enable FSI */ 1234 gpio_request(GPIO_FN_FSIMCKB, NULL); 1235 gpio_request(GPIO_FN_FSIIBSD, NULL); 1236 gpio_request(GPIO_FN_FSIOBSD, NULL); 1237 gpio_request(GPIO_FN_FSIIBBCK, NULL); 1238 gpio_request(GPIO_FN_FSIIBLRCK, NULL); 1239 gpio_request(GPIO_FN_FSIOBBCK, NULL); 1240 gpio_request(GPIO_FN_FSIOBLRCK, NULL); 1241 gpio_request(GPIO_FN_CLKAUDIOBO, NULL); 1242 1243 /* set SPU2 clock to 83.4 MHz */ 1244 clk = clk_get(NULL, "spu_clk"); 1245 if (clk) { 1246 clk_set_rate(clk, clk_round_rate(clk, 83333333)); 1247 clk_put(clk); 1248 } 1249 1250 /* change parent of FSI B */ 1251 clk = clk_get(NULL, "fsib_clk"); 1252 if (clk) { 1253 clk_register(&fsimckb_clk); 1254 clk_set_parent(clk, &fsimckb_clk); 1255 clk_set_rate(clk, 11000); 1256 clk_set_rate(&fsimckb_clk, 11000); 1257 clk_put(clk); 1258 } 1259 1260 gpio_request(GPIO_PTU0, NULL); 1261 gpio_direction_output(GPIO_PTU0, 0); 1262 mdelay(20); 1263 1264 /* enable motion sensor */ 1265 gpio_request(GPIO_FN_INTC_IRQ1, NULL); 1266 gpio_direction_input(GPIO_FN_INTC_IRQ1); 1267 1268 /* set VPU clock to 166 MHz */ 1269 clk = clk_get(NULL, "vpu_clk"); 1270 if (clk) { 1271 clk_set_rate(clk, clk_round_rate(clk, 166000000)); 1272 clk_put(clk); 1273 } 1274 1275 /* enable IrDA */ 1276 gpio_request(GPIO_FN_IRDA_OUT, NULL); 1277 gpio_request(GPIO_FN_IRDA_IN, NULL); 1278 gpio_request(GPIO_PTU5, NULL); 1279 gpio_direction_output(GPIO_PTU5, 0); 1280 1281#if defined(CONFIG_MMC_SH_MMCIF) 1282 /* enable MMCIF (needs DS2.6,7 set to OFF,ON) */ 1283 gpio_request(GPIO_FN_MMC_D7, NULL); 1284 gpio_request(GPIO_FN_MMC_D6, NULL); 1285 gpio_request(GPIO_FN_MMC_D5, NULL); 1286 gpio_request(GPIO_FN_MMC_D4, NULL); 1287 gpio_request(GPIO_FN_MMC_D3, NULL); 1288 gpio_request(GPIO_FN_MMC_D2, NULL); 1289 gpio_request(GPIO_FN_MMC_D1, NULL); 1290 gpio_request(GPIO_FN_MMC_D0, NULL); 1291 gpio_request(GPIO_FN_MMC_CLK, NULL); 1292 gpio_request(GPIO_FN_MMC_CMD, NULL); 1293 gpio_request(GPIO_PTB7, NULL); 1294 gpio_direction_output(GPIO_PTB7, 0); 1295 1296 /* I/O buffer drive ability is high for MMCIF */ 1297 __raw_writew((__raw_readw(IODRIVEA) & ~0x3000) | 0x2000 , IODRIVEA); 1298#endif 1299 1300 /* enable I2C device */ 1301 i2c_register_board_info(0, i2c0_devices, 1302 ARRAY_SIZE(i2c0_devices)); 1303 1304 i2c_register_board_info(1, i2c1_devices, 1305 ARRAY_SIZE(i2c1_devices)); 1306 1307 /* VOU */ 1308 gpio_request(GPIO_FN_DV_D15, NULL); 1309 gpio_request(GPIO_FN_DV_D14, NULL); 1310 gpio_request(GPIO_FN_DV_D13, NULL); 1311 gpio_request(GPIO_FN_DV_D12, NULL); 1312 gpio_request(GPIO_FN_DV_D11, NULL); 1313 gpio_request(GPIO_FN_DV_D10, NULL); 1314 gpio_request(GPIO_FN_DV_D9, NULL); 1315 gpio_request(GPIO_FN_DV_D8, NULL); 1316 gpio_request(GPIO_FN_DV_CLKI, NULL); 1317 gpio_request(GPIO_FN_DV_CLK, NULL); 1318 gpio_request(GPIO_FN_DV_VSYNC, NULL); 1319 gpio_request(GPIO_FN_DV_HSYNC, NULL); 1320 1321 /* AK8813 power / reset sequence */ 1322 gpio_request(GPIO_PTG4, NULL); 1323 gpio_request(GPIO_PTU3, NULL); 1324 /* Reset */ 1325 gpio_direction_output(GPIO_PTG4, 0); 1326 /* Power down */ 1327 gpio_direction_output(GPIO_PTU3, 1); 1328 1329 udelay(10); 1330 1331 /* Power up, reset */ 1332 gpio_set_value(GPIO_PTU3, 0); 1333 1334 udelay(10); 1335 1336 /* Remove reset */ 1337 gpio_set_value(GPIO_PTG4, 1); 1338 1339 return platform_add_devices(ecovec_devices, 1340 ARRAY_SIZE(ecovec_devices)); 1341} 1342arch_initcall(arch_setup); 1343 1344static int __init devices_setup(void) 1345{ 1346 sh_eth_init(&sh_eth_plat); 1347 return 0; 1348} 1349device_initcall(devices_setup); 1350 1351static struct sh_machine_vector mv_ecovec __initmv = { 1352 .mv_name = "R0P7724 (EcoVec)", 1353}; 1354