1/* 2 * spu_csa.h: Definitions for SPU context save area (CSA). 3 * 4 * (C) Copyright IBM 2005 5 * 6 * Author: Mark Nutter <mnutter@us.ibm.com> 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License as published by 10 * the Free Software Foundation; either version 2, or (at your option) 11 * any later version. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * You should have received a copy of the GNU General Public License 19 * along with this program; if not, write to the Free Software 20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 21 */ 22 23#ifndef _SPU_CSA_H_ 24#define _SPU_CSA_H_ 25#ifdef __KERNEL__ 26 27/* 28 * Total number of 128-bit registers. 29 */ 30#define NR_SPU_GPRS 128 31#define NR_SPU_SPRS 9 32#define NR_SPU_REGS_PAD 7 33#define NR_SPU_SPILL_REGS 144 /* GPRS + SPRS + PAD */ 34#define SIZEOF_SPU_SPILL_REGS NR_SPU_SPILL_REGS * 16 35 36#define SPU_SAVE_COMPLETE 0x3FFB 37#define SPU_RESTORE_COMPLETE 0x3FFC 38 39/* 40 * Definitions for various 'stopped' status conditions, 41 * to be recreated during context restore. 42 */ 43#define SPU_STOPPED_STATUS_P 1 44#define SPU_STOPPED_STATUS_I 2 45#define SPU_STOPPED_STATUS_H 3 46#define SPU_STOPPED_STATUS_S 4 47#define SPU_STOPPED_STATUS_S_I 5 48#define SPU_STOPPED_STATUS_S_P 6 49#define SPU_STOPPED_STATUS_P_H 7 50#define SPU_STOPPED_STATUS_P_I 8 51#define SPU_STOPPED_STATUS_R 9 52 53/* 54 * Definitions for software decrementer status flag. 55 */ 56#define SPU_DECR_STATUS_RUNNING 0x1 57#define SPU_DECR_STATUS_WRAPPED 0x2 58 59#ifndef __ASSEMBLY__ 60/** 61 * spu_reg128 - generic 128-bit register definition. 62 */ 63struct spu_reg128 { 64 u32 slot[4]; 65}; 66 67/** 68 * struct spu_lscsa - Local Store Context Save Area. 69 * @gprs: Array of saved registers. 70 * @fpcr: Saved floating point status control register. 71 * @decr: Saved decrementer value. 72 * @decr_status: Indicates software decrementer status flags. 73 * @ppu_mb: Saved PPU mailbox data. 74 * @ppuint_mb: Saved PPU interrupting mailbox data. 75 * @tag_mask: Saved tag group mask. 76 * @event_mask: Saved event mask. 77 * @srr0: Saved SRR0. 78 * @stopped_status: Conditions to be recreated by restore. 79 * @ls: Saved contents of Local Storage Area. 80 * 81 * The LSCSA represents state that is primarily saved and 82 * restored by SPU-side code. 83 */ 84struct spu_lscsa { 85 struct spu_reg128 gprs[128]; 86 struct spu_reg128 fpcr; 87 struct spu_reg128 decr; 88 struct spu_reg128 decr_status; 89 struct spu_reg128 ppu_mb; 90 struct spu_reg128 ppuint_mb; 91 struct spu_reg128 tag_mask; 92 struct spu_reg128 event_mask; 93 struct spu_reg128 srr0; 94 struct spu_reg128 stopped_status; 95 96 /* 97 * 'ls' must be page-aligned on all configurations. 98 * Since we don't want to rely on having the spu-gcc 99 * installed to build the kernel and this structure 100 * is used in the SPU-side code, make it 64k-page 101 * aligned for now. 102 */ 103 unsigned char ls[LS_SIZE] __attribute__((aligned(65536))); 104}; 105 106#ifndef __SPU__ 107/* 108 * struct spu_problem_collapsed - condensed problem state area, w/o pads. 109 */ 110struct spu_problem_collapsed { 111 u64 spc_mssync_RW; 112 u32 mfc_lsa_W; 113 u32 unused_pad0; 114 u64 mfc_ea_W; 115 union mfc_tag_size_class_cmd mfc_union_W; 116 u32 dma_qstatus_R; 117 u32 dma_querytype_RW; 118 u32 dma_querymask_RW; 119 u32 dma_tagstatus_R; 120 u32 pu_mb_R; 121 u32 spu_mb_W; 122 u32 mb_stat_R; 123 u32 spu_runcntl_RW; 124 u32 spu_status_R; 125 u32 spu_spc_R; 126 u32 spu_npc_RW; 127 u32 signal_notify1; 128 u32 signal_notify2; 129 u32 unused_pad1; 130}; 131 132/* 133 * struct spu_priv1_collapsed - condensed privileged 1 area, w/o pads. 134 */ 135struct spu_priv1_collapsed { 136 u64 mfc_sr1_RW; 137 u64 mfc_lpid_RW; 138 u64 spu_idr_RW; 139 u64 mfc_vr_RO; 140 u64 spu_vr_RO; 141 u64 int_mask_class0_RW; 142 u64 int_mask_class1_RW; 143 u64 int_mask_class2_RW; 144 u64 int_stat_class0_RW; 145 u64 int_stat_class1_RW; 146 u64 int_stat_class2_RW; 147 u64 int_route_RW; 148 u64 mfc_atomic_flush_RW; 149 u64 resource_allocation_groupID_RW; 150 u64 resource_allocation_enable_RW; 151 u64 mfc_fir_R; 152 u64 mfc_fir_status_or_W; 153 u64 mfc_fir_status_and_W; 154 u64 mfc_fir_mask_R; 155 u64 mfc_fir_mask_or_W; 156 u64 mfc_fir_mask_and_W; 157 u64 mfc_fir_chkstp_enable_RW; 158 u64 smf_sbi_signal_sel; 159 u64 smf_ato_signal_sel; 160 u64 tlb_index_hint_RO; 161 u64 tlb_index_W; 162 u64 tlb_vpn_RW; 163 u64 tlb_rpn_RW; 164 u64 tlb_invalidate_entry_W; 165 u64 tlb_invalidate_all_W; 166 u64 smm_hid; 167 u64 mfc_accr_RW; 168 u64 mfc_dsisr_RW; 169 u64 mfc_dar_RW; 170 u64 rmt_index_RW; 171 u64 rmt_data1_RW; 172 u64 mfc_dsir_R; 173 u64 mfc_lsacr_RW; 174 u64 mfc_lscrr_R; 175 u64 mfc_tclass_id_RW; 176 u64 mfc_rm_boundary; 177 u64 smf_dma_signal_sel; 178 u64 smm_signal_sel; 179 u64 mfc_cer_R; 180 u64 pu_ecc_cntl_RW; 181 u64 pu_ecc_stat_RW; 182 u64 spu_ecc_addr_RW; 183 u64 spu_err_mask_RW; 184 u64 spu_trig0_sel; 185 u64 spu_trig1_sel; 186 u64 spu_trig2_sel; 187 u64 spu_trig3_sel; 188 u64 spu_trace_sel; 189 u64 spu_event0_sel; 190 u64 spu_event1_sel; 191 u64 spu_event2_sel; 192 u64 spu_event3_sel; 193 u64 spu_trace_cntl; 194}; 195 196/* 197 * struct spu_priv2_collapsed - condensed privileged 2 area, w/o pads. 198 */ 199struct spu_priv2_collapsed { 200 u64 slb_index_W; 201 u64 slb_esid_RW; 202 u64 slb_vsid_RW; 203 u64 slb_invalidate_entry_W; 204 u64 slb_invalidate_all_W; 205 struct mfc_cq_sr spuq[16]; 206 struct mfc_cq_sr puq[8]; 207 u64 mfc_control_RW; 208 u64 puint_mb_R; 209 u64 spu_privcntl_RW; 210 u64 spu_lslr_RW; 211 u64 spu_chnlcntptr_RW; 212 u64 spu_chnlcnt_RW; 213 u64 spu_chnldata_RW; 214 u64 spu_cfg_RW; 215 u64 spu_tag_status_query_RW; 216 u64 spu_cmd_buf1_RW; 217 u64 spu_cmd_buf2_RW; 218 u64 spu_atomic_status_RW; 219}; 220 221/** 222 * struct spu_state 223 * @lscsa: Local Store Context Save Area. 224 * @prob: Collapsed Problem State Area, w/o pads. 225 * @priv1: Collapsed Privileged 1 Area, w/o pads. 226 * @priv2: Collapsed Privileged 2 Area, w/o pads. 227 * @spu_chnlcnt_RW: Array of saved channel counts. 228 * @spu_chnldata_RW: Array of saved channel data. 229 * @suspend_time: Time stamp when decrementer disabled. 230 * 231 * Structure representing the whole of the SPU 232 * context save area (CSA). This struct contains 233 * all of the state necessary to suspend and then 234 * later optionally resume execution of an SPU 235 * context. 236 * 237 * The @lscsa region is by far the largest, and is 238 * allocated separately so that it may either be 239 * pinned or mapped to/from application memory, as 240 * appropriate for the OS environment. 241 */ 242struct spu_state { 243 struct spu_lscsa *lscsa; 244#ifdef CONFIG_SPU_FS_64K_LS 245 int use_big_pages; 246 /* One struct page per 64k page */ 247#define SPU_LSCSA_NUM_BIG_PAGES (sizeof(struct spu_lscsa) / 0x10000) 248 struct page *lscsa_pages[SPU_LSCSA_NUM_BIG_PAGES]; 249#endif 250 struct spu_problem_collapsed prob; 251 struct spu_priv1_collapsed priv1; 252 struct spu_priv2_collapsed priv2; 253 u64 spu_chnlcnt_RW[32]; 254 u64 spu_chnldata_RW[32]; 255 u32 spu_mailbox_data[4]; 256 u32 pu_mailbox_data[1]; 257 u64 class_0_dar, class_0_pending; 258 u64 class_1_dar, class_1_dsisr; 259 unsigned long suspend_time; 260 spinlock_t register_lock; 261}; 262 263#endif /* !__SPU__ */ 264#endif /* __KERNEL__ */ 265#endif /* !__ASSEMBLY__ */ 266#endif /* _SPU_CSA_H_ */ 267