1/* 2 * Copyright (C) 2001 Mike Corrigan IBM Corporation 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License as published by 6 * the Free Software Foundation; either version 2 of the License, or 7 * (at your option) any later version. 8 * 9 * This program is distributed in the hope that it will be useful, 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * GNU General Public License for more details. 13 * 14 * You should have received a copy of the GNU General Public License 15 * along with this program; if not, write to the Free Software 16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 17 */ 18#ifndef _ASM_POWERPC_ISERIES_LPAR_MAP_H 19#define _ASM_POWERPC_ISERIES_LPAR_MAP_H 20 21#ifndef __ASSEMBLY__ 22 23#include <asm/types.h> 24 25#endif 26 27/* 28 * The iSeries hypervisor will set up mapping for one or more 29 * ESID/VSID pairs (in SLB/segment registers) and will set up 30 * mappings of one or more ranges of pages to VAs. 31 * We will have the hypervisor set up the ESID->VSID mapping 32 * for the four kernel segments (C-F). With shared processors, 33 * the hypervisor will clear all segment registers and reload 34 * these four whenever the processor is switched from one 35 * partition to another. 36 */ 37 38/* The Vsid and Esid identified below will be used by the hypervisor 39 * to set up a memory mapping for part of the load area before giving 40 * control to the Linux kernel. The load area is 64 MB, but this must 41 * not attempt to map the whole load area. The Hashed Page Table may 42 * need to be located within the load area (if the total partition size 43 * is 64 MB), but cannot be mapped. Typically, this should specify 44 * to map half (32 MB) of the load area. 45 * 46 * The hypervisor will set up page table entries for the number of 47 * pages specified. 48 * 49 * In 32-bit mode, the hypervisor will load all four of the 50 * segment registers (identified by the low-order four bits of the 51 * Esid field. In 64-bit mode, the hypervisor will load one SLB 52 * entry to map the Esid to the Vsid. 53*/ 54 55#define HvEsidsToMap 2 56#define HvRangesToMap 1 57 58/* Hypervisor initially maps 32MB of the load area */ 59#define HvPagesToMap 8192 60 61#ifndef __ASSEMBLY__ 62struct LparMap { 63 u64 xNumberEsids; // Number of ESID/VSID pairs 64 u64 xNumberRanges; // Number of VA ranges to map 65 u64 xSegmentTableOffs; // Page number within load area of seg table 66 u64 xRsvd[5]; 67 struct { 68 u64 xKernelEsid; // Esid used to map kernel load 69 u64 xKernelVsid; // Vsid used to map kernel load 70 } xEsids[HvEsidsToMap]; 71 struct { 72 u64 xPages; // Number of pages to be mapped 73 u64 xOffset; // Offset from start of load area 74 u64 xVPN; // Virtual Page Number 75 } xRanges[HvRangesToMap]; 76}; 77 78extern const struct LparMap xLparMap; 79 80#endif /* __ASSEMBLY__ */ 81 82/* the fixed address where the LparMap exists */ 83#define LPARMAP_PHYS 0x7000 84 85#endif /* _ASM_POWERPC_ISERIES_LPAR_MAP_H */ 86