1/* 2 * P1022 DS 36Bit Physical Address Map Device Tree Source 3 * 4 * Copyright 2010 Freescale Semiconductor, Inc. 5 * 6 * This file is licensed under the terms of the GNU General Public License 7 * version 2. This program is licensed "as is" without any warranty of any 8 * kind, whether express or implied. 9 */ 10 11/dts-v1/; 12/ { 13 model = "fsl,P1022"; 14 compatible = "fsl,P1022DS"; 15 #address-cells = <2>; 16 #size-cells = <2>; 17 interrupt-parent = <&mpic>; 18 19 aliases { 20 ethernet0 = &enet0; 21 ethernet1 = &enet1; 22 serial0 = &serial0; 23 serial1 = &serial1; 24 pci0 = &pci0; 25 pci1 = &pci1; 26 pci2 = &pci2; 27 }; 28 29 cpus { 30 #address-cells = <1>; 31 #size-cells = <0>; 32 33 PowerPC,P1022@0 { 34 device_type = "cpu"; 35 reg = <0x0>; 36 next-level-cache = <&L2>; 37 }; 38 39 PowerPC,P1022@1 { 40 device_type = "cpu"; 41 reg = <0x1>; 42 next-level-cache = <&L2>; 43 }; 44 }; 45 46 memory { 47 device_type = "memory"; 48 }; 49 50 localbus@fffe05000 { 51 #address-cells = <2>; 52 #size-cells = <1>; 53 compatible = "fsl,p1022-elbc", "fsl,elbc", "simple-bus"; 54 reg = <0 0xffe05000 0 0x1000>; 55 interrupts = <19 2>; 56 57 ranges = <0x0 0x0 0xf 0xe8000000 0x08000000 58 0x1 0x0 0xf 0xe0000000 0x08000000 59 0x2 0x0 0x0 0xffa00000 0x00040000 60 0x3 0x0 0xf 0xffdf0000 0x00008000>; 61 62 nor@0,0 { 63 #address-cells = <1>; 64 #size-cells = <1>; 65 compatible = "cfi-flash"; 66 reg = <0x0 0x0 0x8000000>; 67 bank-width = <2>; 68 device-width = <1>; 69 70 partition@0 { 71 reg = <0x0 0x03000000>; 72 label = "ramdisk-nor"; 73 read-only; 74 }; 75 76 partition@3000000 { 77 reg = <0x03000000 0x00e00000>; 78 label = "diagnostic-nor"; 79 read-only; 80 }; 81 82 partition@3e00000 { 83 reg = <0x03e00000 0x00200000>; 84 label = "dink-nor"; 85 read-only; 86 }; 87 88 partition@4000000 { 89 reg = <0x04000000 0x00400000>; 90 label = "kernel-nor"; 91 read-only; 92 }; 93 94 partition@4400000 { 95 reg = <0x04400000 0x03b00000>; 96 label = "jffs2-nor"; 97 }; 98 99 partition@7f00000 { 100 reg = <0x07f00000 0x00080000>; 101 label = "dtb-nor"; 102 read-only; 103 }; 104 105 partition@7f80000 { 106 reg = <0x07f80000 0x00080000>; 107 label = "u-boot-nor"; 108 read-only; 109 }; 110 }; 111 112 nand@2,0 { 113 #address-cells = <1>; 114 #size-cells = <1>; 115 compatible = "fsl,elbc-fcm-nand"; 116 reg = <0x2 0x0 0x40000>; 117 118 partition@0 { 119 reg = <0x0 0x02000000>; 120 label = "u-boot-nand"; 121 read-only; 122 }; 123 124 partition@2000000 { 125 reg = <0x02000000 0x10000000>; 126 label = "jffs2-nand"; 127 }; 128 129 partition@12000000 { 130 reg = <0x12000000 0x10000000>; 131 label = "ramdisk-nand"; 132 read-only; 133 }; 134 135 partition@22000000 { 136 reg = <0x22000000 0x04000000>; 137 label = "kernel-nand"; 138 }; 139 140 partition@26000000 { 141 reg = <0x26000000 0x01000000>; 142 label = "dtb-nand"; 143 read-only; 144 }; 145 146 partition@27000000 { 147 reg = <0x27000000 0x19000000>; 148 label = "reserved-nand"; 149 }; 150 }; 151 }; 152 153 soc@fffe00000 { 154 #address-cells = <1>; 155 #size-cells = <1>; 156 device_type = "soc"; 157 compatible = "fsl,p1022-immr", "simple-bus"; 158 ranges = <0x0 0xf 0xffe00000 0x100000>; 159 bus-frequency = <0>; // Filled out by uboot. 160 161 ecm-law@0 { 162 compatible = "fsl,ecm-law"; 163 reg = <0x0 0x1000>; 164 fsl,num-laws = <12>; 165 }; 166 167 ecm@1000 { 168 compatible = "fsl,p1022-ecm", "fsl,ecm"; 169 reg = <0x1000 0x1000>; 170 interrupts = <16 2>; 171 }; 172 173 memory-controller@2000 { 174 compatible = "fsl,p1022-memory-controller"; 175 reg = <0x2000 0x1000>; 176 interrupts = <16 2>; 177 }; 178 179 i2c@3000 { 180 #address-cells = <1>; 181 #size-cells = <0>; 182 cell-index = <0>; 183 compatible = "fsl-i2c"; 184 reg = <0x3000 0x100>; 185 interrupts = <43 2>; 186 dfsrr; 187 }; 188 189 i2c@3100 { 190 #address-cells = <1>; 191 #size-cells = <0>; 192 cell-index = <1>; 193 compatible = "fsl-i2c"; 194 reg = <0x3100 0x100>; 195 interrupts = <43 2>; 196 dfsrr; 197 198 wm8776:codec@1a { 199 compatible = "wlf,wm8776"; 200 reg = <0x1a>; 201 /* MCLK source is a stand-alone oscillator */ 202 clock-frequency = <12288000>; 203 }; 204 }; 205 206 serial0: serial@4500 { 207 cell-index = <0>; 208 device_type = "serial"; 209 compatible = "ns16550"; 210 reg = <0x4500 0x100>; 211 clock-frequency = <0>; 212 interrupts = <42 2>; 213 }; 214 215 serial1: serial@4600 { 216 cell-index = <1>; 217 device_type = "serial"; 218 compatible = "ns16550"; 219 reg = <0x4600 0x100>; 220 clock-frequency = <0>; 221 interrupts = <42 2>; 222 }; 223 224 spi@7000 { 225 cell-index = <0>; 226 #address-cells = <1>; 227 #size-cells = <0>; 228 compatible = "fsl,espi"; 229 reg = <0x7000 0x1000>; 230 interrupts = <59 0x2>; 231 espi,num-ss-bits = <4>; 232 mode = "cpu"; 233 234 fsl_m25p80@0 { 235 #address-cells = <1>; 236 #size-cells = <1>; 237 compatible = "fsl,espi-flash"; 238 reg = <0>; 239 linux,modalias = "fsl_m25p80"; 240 spi-max-frequency = <40000000>; /* input clock */ 241 partition@0 { 242 label = "u-boot-spi"; 243 reg = <0x00000000 0x00100000>; 244 read-only; 245 }; 246 partition@100000 { 247 label = "kernel-spi"; 248 reg = <0x00100000 0x00500000>; 249 read-only; 250 }; 251 partition@600000 { 252 label = "dtb-spi"; 253 reg = <0x00600000 0x00100000>; 254 read-only; 255 }; 256 partition@700000 { 257 label = "file system-spi"; 258 reg = <0x00700000 0x00900000>; 259 }; 260 }; 261 }; 262 263 ssi@15000 { 264 compatible = "fsl,mpc8610-ssi"; 265 cell-index = <0>; 266 reg = <0x15000 0x100>; 267 interrupts = <75 2>; 268 fsl,mode = "i2s-slave"; 269 codec-handle = <&wm8776>; 270 fsl,playback-dma = <&dma00>; 271 fsl,capture-dma = <&dma01>; 272 fsl,fifo-depth = <16>; 273 }; 274 275 dma@c300 { 276 #address-cells = <1>; 277 #size-cells = <1>; 278 compatible = "fsl,eloplus-dma"; 279 reg = <0xc300 0x4>; 280 ranges = <0x0 0xc100 0x200>; 281 cell-index = <1>; 282 dma00: dma-channel@0 { 283 compatible = "fsl,ssi-dma-channel"; 284 reg = <0x0 0x80>; 285 cell-index = <0>; 286 interrupts = <76 2>; 287 }; 288 dma01: dma-channel@80 { 289 compatible = "fsl,ssi-dma-channel"; 290 reg = <0x80 0x80>; 291 cell-index = <1>; 292 interrupts = <77 2>; 293 }; 294 dma-channel@100 { 295 compatible = "fsl,eloplus-dma-channel"; 296 reg = <0x100 0x80>; 297 cell-index = <2>; 298 interrupts = <78 2>; 299 }; 300 dma-channel@180 { 301 compatible = "fsl,eloplus-dma-channel"; 302 reg = <0x180 0x80>; 303 cell-index = <3>; 304 interrupts = <79 2>; 305 }; 306 }; 307 308 gpio: gpio-controller@f000 { 309 #gpio-cells = <2>; 310 compatible = "fsl,mpc8572-gpio"; 311 reg = <0xf000 0x100>; 312 interrupts = <47 0x2>; 313 gpio-controller; 314 }; 315 316 L2: l2-cache-controller@20000 { 317 compatible = "fsl,p1022-l2-cache-controller"; 318 reg = <0x20000 0x1000>; 319 cache-line-size = <32>; // 32 bytes 320 cache-size = <0x40000>; // L2, 256K 321 interrupts = <16 2>; 322 }; 323 324 dma@21300 { 325 #address-cells = <1>; 326 #size-cells = <1>; 327 compatible = "fsl,eloplus-dma"; 328 reg = <0x21300 0x4>; 329 ranges = <0x0 0x21100 0x200>; 330 cell-index = <0>; 331 dma-channel@0 { 332 compatible = "fsl,eloplus-dma-channel"; 333 reg = <0x0 0x80>; 334 cell-index = <0>; 335 interrupts = <20 2>; 336 }; 337 dma-channel@80 { 338 compatible = "fsl,eloplus-dma-channel"; 339 reg = <0x80 0x80>; 340 cell-index = <1>; 341 interrupts = <21 2>; 342 }; 343 dma-channel@100 { 344 compatible = "fsl,eloplus-dma-channel"; 345 reg = <0x100 0x80>; 346 cell-index = <2>; 347 interrupts = <22 2>; 348 }; 349 dma-channel@180 { 350 compatible = "fsl,eloplus-dma-channel"; 351 reg = <0x180 0x80>; 352 cell-index = <3>; 353 interrupts = <23 2>; 354 }; 355 }; 356 357 usb@22000 { 358 #address-cells = <1>; 359 #size-cells = <0>; 360 compatible = "fsl-usb2-dr"; 361 reg = <0x22000 0x1000>; 362 interrupts = <28 0x2>; 363 phy_type = "ulpi"; 364 }; 365 366 mdio@24000 { 367 #address-cells = <1>; 368 #size-cells = <0>; 369 compatible = "fsl,etsec2-mdio"; 370 reg = <0x24000 0x1000 0xb0030 0x4>; 371 372 phy0: ethernet-phy@0 { 373 interrupts = <3 1>; 374 reg = <0x1>; 375 }; 376 phy1: ethernet-phy@1 { 377 interrupts = <9 1>; 378 reg = <0x2>; 379 }; 380 }; 381 382 mdio@25000 { 383 #address-cells = <1>; 384 #size-cells = <0>; 385 compatible = "fsl,etsec2-mdio"; 386 reg = <0x25000 0x1000 0xb1030 0x4>; 387 }; 388 389 enet0: ethernet@B0000 { 390 #address-cells = <1>; 391 #size-cells = <1>; 392 cell-index = <0>; 393 device_type = "network"; 394 model = "eTSEC"; 395 compatible = "fsl,etsec2"; 396 fsl,num_rx_queues = <0x8>; 397 fsl,num_tx_queues = <0x8>; 398 fsl,magic-packet; 399 fsl,wake-on-filer; 400 local-mac-address = [ 00 00 00 00 00 00 ]; 401 fixed-link = <1 1 1000 0 0>; 402 phy-handle = <&phy0>; 403 phy-connection-type = "rgmii-id"; 404 queue-group@0{ 405 #address-cells = <1>; 406 #size-cells = <1>; 407 reg = <0xB0000 0x1000>; 408 interrupts = <29 2 30 2 34 2>; 409 }; 410 queue-group@1{ 411 #address-cells = <1>; 412 #size-cells = <1>; 413 reg = <0xB4000 0x1000>; 414 interrupts = <17 2 18 2 24 2>; 415 }; 416 }; 417 418 enet1: ethernet@B1000 { 419 #address-cells = <1>; 420 #size-cells = <1>; 421 cell-index = <0>; 422 device_type = "network"; 423 model = "eTSEC"; 424 compatible = "fsl,etsec2"; 425 fsl,num_rx_queues = <0x8>; 426 fsl,num_tx_queues = <0x8>; 427 local-mac-address = [ 00 00 00 00 00 00 ]; 428 fixed-link = <1 1 1000 0 0>; 429 phy-handle = <&phy1>; 430 phy-connection-type = "rgmii-id"; 431 queue-group@0{ 432 #address-cells = <1>; 433 #size-cells = <1>; 434 reg = <0xB1000 0x1000>; 435 interrupts = <35 2 36 2 40 2>; 436 }; 437 queue-group@1{ 438 #address-cells = <1>; 439 #size-cells = <1>; 440 reg = <0xB5000 0x1000>; 441 interrupts = <51 2 52 2 67 2>; 442 }; 443 }; 444 445 sdhci@2e000 { 446 compatible = "fsl,p1022-esdhc", "fsl,esdhc"; 447 reg = <0x2e000 0x1000>; 448 interrupts = <72 0x2>; 449 fsl,sdhci-auto-cmd12; 450 /* Filled in by U-Boot */ 451 clock-frequency = <0>; 452 }; 453 454 crypto@30000 { 455 compatible = "fsl,sec3.3", "fsl,sec3.1", "fsl,sec3.0", 456 "fsl,sec2.4", "fsl,sec2.2", "fsl,sec2.1", 457 "fsl,sec2.0"; 458 reg = <0x30000 0x10000>; 459 interrupts = <45 2 58 2>; 460 fsl,num-channels = <4>; 461 fsl,channel-fifo-len = <24>; 462 fsl,exec-units-mask = <0x97c>; 463 fsl,descriptor-types-mask = <0x3a30abf>; 464 }; 465 466 sata@18000 { 467 compatible = "fsl,mpc8536-sata", "fsl,pq-sata"; 468 reg = <0x18000 0x1000>; 469 cell-index = <1>; 470 interrupts = <74 0x2>; 471 }; 472 473 sata@19000 { 474 compatible = "fsl,mpc8536-sata", "fsl,pq-sata"; 475 reg = <0x19000 0x1000>; 476 cell-index = <2>; 477 interrupts = <41 0x2>; 478 }; 479 480 power@e0070{ 481 compatible = "fsl,mpc8536-pmc", "fsl,mpc8548-pmc"; 482 reg = <0xe0070 0x20>; 483 }; 484 485 display@10000 { 486 compatible = "fsl,diu", "fsl,p1022-diu"; 487 reg = <0x10000 1000>; 488 interrupts = <64 2>; 489 }; 490 491 timer@41100 { 492 compatible = "fsl,mpic-global-timer"; 493 reg = <0x41100 0x204>; 494 interrupts = <0xf7 0x2>; 495 }; 496 497 mpic: pic@40000 { 498 interrupt-controller; 499 #address-cells = <0>; 500 #interrupt-cells = <2>; 501 reg = <0x40000 0x40000>; 502 compatible = "chrp,open-pic"; 503 device_type = "open-pic"; 504 }; 505 506 msi@41600 { 507 compatible = "fsl,p1022-msi", "fsl,mpic-msi"; 508 reg = <0x41600 0x80>; 509 msi-available-ranges = <0 0x100>; 510 interrupts = < 511 0xe0 0 512 0xe1 0 513 0xe2 0 514 0xe3 0 515 0xe4 0 516 0xe5 0 517 0xe6 0 518 0xe7 0>; 519 }; 520 521 global-utilities@e0000 { //global utilities block 522 compatible = "fsl,p1022-guts"; 523 reg = <0xe0000 0x1000>; 524 fsl,has-rstcr; 525 }; 526 }; 527 528 pci0: pcie@fffe09000 { 529 compatible = "fsl,p1022-pcie"; 530 device_type = "pci"; 531 #interrupt-cells = <1>; 532 #size-cells = <2>; 533 #address-cells = <3>; 534 reg = <0xf 0xffe09000 0 0x1000>; 535 bus-range = <0 255>; 536 ranges = <0x2000000 0x0 0xa0000000 0xc 0x20000000 0x0 0x20000000 537 0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>; 538 clock-frequency = <33333333>; 539 interrupts = <16 2>; 540 interrupt-map-mask = <0xf800 0 0 7>; 541 interrupt-map = < 542 /* IDSEL 0x0 */ 543 0000 0 0 1 &mpic 4 1 544 0000 0 0 2 &mpic 5 1 545 0000 0 0 3 &mpic 6 1 546 0000 0 0 4 &mpic 7 1 547 >; 548 pcie@0 { 549 reg = <0x0 0x0 0x0 0x0 0x0>; 550 #size-cells = <2>; 551 #address-cells = <3>; 552 device_type = "pci"; 553 ranges = <0x2000000 0x0 0xe0000000 554 0x2000000 0x0 0xe0000000 555 0x0 0x20000000 556 557 0x1000000 0x0 0x0 558 0x1000000 0x0 0x0 559 0x0 0x100000>; 560 }; 561 }; 562 563 pci1: pcie@fffe0a000 { 564 compatible = "fsl,p1022-pcie"; 565 device_type = "pci"; 566 #interrupt-cells = <1>; 567 #size-cells = <2>; 568 #address-cells = <3>; 569 reg = <0xf 0xffe0a000 0 0x1000>; 570 bus-range = <0 255>; 571 ranges = <0x2000000 0x0 0xc0000000 0xc 0x40000000 0x0 0x20000000 572 0x1000000 0x0 0x00000000 0xf 0xffc20000 0x0 0x10000>; 573 clock-frequency = <33333333>; 574 interrupts = <16 2>; 575 interrupt-map-mask = <0xf800 0 0 7>; 576 interrupt-map = < 577 /* IDSEL 0x0 */ 578 0000 0 0 1 &mpic 0 1 579 0000 0 0 2 &mpic 1 1 580 0000 0 0 3 &mpic 2 1 581 0000 0 0 4 &mpic 3 1 582 >; 583 pcie@0 { 584 reg = <0x0 0x0 0x0 0x0 0x0>; 585 #size-cells = <2>; 586 #address-cells = <3>; 587 device_type = "pci"; 588 ranges = <0x2000000 0x0 0xe0000000 589 0x2000000 0x0 0xe0000000 590 0x0 0x20000000 591 592 0x1000000 0x0 0x0 593 0x1000000 0x0 0x0 594 0x0 0x100000>; 595 }; 596 }; 597 598 599 pci2: pcie@fffe0b000 { 600 compatible = "fsl,p1022-pcie"; 601 device_type = "pci"; 602 #interrupt-cells = <1>; 603 #size-cells = <2>; 604 #address-cells = <3>; 605 reg = <0xf 0xffe0b000 0 0x1000>; 606 bus-range = <0 255>; 607 ranges = <0x2000000 0x0 0x80000000 0xc 0x00000000 0x0 0x20000000 608 0x1000000 0x0 0x00000000 0xf 0xffc00000 0x0 0x10000>; 609 clock-frequency = <33333333>; 610 interrupts = <16 2>; 611 interrupt-map-mask = <0xf800 0 0 7>; 612 interrupt-map = < 613 /* IDSEL 0x0 */ 614 0000 0 0 1 &mpic 8 1 615 0000 0 0 2 &mpic 9 1 616 0000 0 0 3 &mpic 10 1 617 0000 0 0 4 &mpic 11 1 618 >; 619 pcie@0 { 620 reg = <0x0 0x0 0x0 0x0 0x0>; 621 #size-cells = <2>; 622 #address-cells = <3>; 623 device_type = "pci"; 624 ranges = <0x2000000 0x0 0xe0000000 625 0x2000000 0x0 0xe0000000 626 0x0 0x20000000 627 628 0x1000000 0x0 0x0 629 0x1000000 0x0 0x0 630 0x0 0x100000>; 631 }; 632 }; 633}; 634