1/* 2 * MPC7448HPC2 (Taiga) board Device Tree Source 3 * 4 * Copyright 2006, 2008 Freescale Semiconductor Inc. 5 * 2006 Roy Zang <Roy Zang at freescale.com>. 6 * 7 * This program is free software; you can redistribute it and/or modify it 8 * under the terms of the GNU General Public License as published by the 9 * Free Software Foundation; either version 2 of the License, or (at your 10 * option) any later version. 11 */ 12 13/dts-v1/; 14 15/ { 16 model = "mpc7448hpc2"; 17 compatible = "mpc74xx"; 18 #address-cells = <1>; 19 #size-cells = <1>; 20 21 aliases { 22 ethernet0 = &enet0; 23 ethernet1 = &enet1; 24 25 serial0 = &serial0; 26 serial1 = &serial1; 27 28 pci0 = &pci0; 29 }; 30 31 cpus { 32 #address-cells = <1>; 33 #size-cells =<0>; 34 35 PowerPC,7448@0 { 36 device_type = "cpu"; 37 reg = <0x0>; 38 d-cache-line-size = <32>; // 32 bytes 39 i-cache-line-size = <32>; // 32 bytes 40 d-cache-size = <0x8000>; // L1, 32K bytes 41 i-cache-size = <0x8000>; // L1, 32K bytes 42 timebase-frequency = <0>; // 33 MHz, from uboot 43 clock-frequency = <0>; // From U-Boot 44 bus-frequency = <0>; // From U-Boot 45 }; 46 }; 47 48 memory { 49 device_type = "memory"; 50 reg = <0x0 0x20000000 // DDR2 512M at 0 51 >; 52 }; 53 54 tsi108@c0000000 { 55 #address-cells = <1>; 56 #size-cells = <1>; 57 device_type = "tsi-bridge"; 58 ranges = <0x0 0xc0000000 0x10000>; 59 reg = <0xc0000000 0x10000>; 60 bus-frequency = <0>; 61 62 i2c@7000 { 63 interrupt-parent = <&mpic>; 64 interrupts = <14 0>; 65 reg = <0x7000 0x400>; 66 device_type = "i2c"; 67 compatible = "tsi108-i2c"; 68 }; 69 70 MDIO: mdio@6000 { 71 device_type = "mdio"; 72 compatible = "tsi108-mdio"; 73 reg = <0x6000 0x50>; 74 #address-cells = <1>; 75 #size-cells = <0>; 76 77 phy8: ethernet-phy@8 { 78 interrupt-parent = <&mpic>; 79 interrupts = <2 1>; 80 reg = <0x8>; 81 }; 82 83 phy9: ethernet-phy@9 { 84 interrupt-parent = <&mpic>; 85 interrupts = <2 1>; 86 reg = <0x9>; 87 }; 88 89 }; 90 91 enet0: ethernet@6200 { 92 linux,network-index = <0>; 93 #size-cells = <0>; 94 device_type = "network"; 95 compatible = "tsi108-ethernet"; 96 reg = <0x6000 0x200>; 97 address = [ 00 06 D2 00 00 01 ]; 98 interrupts = <16 2>; 99 interrupt-parent = <&mpic>; 100 mdio-handle = <&MDIO>; 101 phy-handle = <&phy8>; 102 }; 103 104 enet1: ethernet@6600 { 105 linux,network-index = <1>; 106 #address-cells = <1>; 107 #size-cells = <0>; 108 device_type = "network"; 109 compatible = "tsi108-ethernet"; 110 reg = <0x6400 0x200>; 111 address = [ 00 06 D2 00 00 02 ]; 112 interrupts = <17 2>; 113 interrupt-parent = <&mpic>; 114 mdio-handle = <&MDIO>; 115 phy-handle = <&phy9>; 116 }; 117 118 serial0: serial@7808 { 119 device_type = "serial"; 120 compatible = "ns16550"; 121 reg = <0x7808 0x200>; 122 clock-frequency = <1064000000>; 123 interrupts = <12 0>; 124 interrupt-parent = <&mpic>; 125 }; 126 127 serial1: serial@7c08 { 128 device_type = "serial"; 129 compatible = "ns16550"; 130 reg = <0x7c08 0x200>; 131 clock-frequency = <1064000000>; 132 interrupts = <13 0>; 133 interrupt-parent = <&mpic>; 134 }; 135 136 mpic: pic@7400 { 137 interrupt-controller; 138 #address-cells = <0>; 139 #interrupt-cells = <2>; 140 reg = <0x7400 0x400>; 141 compatible = "chrp,open-pic"; 142 device_type = "open-pic"; 143 }; 144 pci0: pci@1000 { 145 compatible = "tsi108-pci"; 146 device_type = "pci"; 147 #interrupt-cells = <1>; 148 #size-cells = <2>; 149 #address-cells = <3>; 150 reg = <0x1000 0x1000>; 151 bus-range = <0 0>; 152 ranges = <0x2000000 0x0 0xe0000000 0xe0000000 0x0 0x1a000000 153 0x1000000 0x0 0x0 0xfa000000 0x0 0x10000>; 154 clock-frequency = <133333332>; 155 interrupt-parent = <&mpic>; 156 interrupts = <23 2>; 157 interrupt-map-mask = <0xf800 0x0 0x0 0x7>; 158 interrupt-map = < 159 160 /* IDSEL 0x11 */ 161 0x800 0x0 0x0 0x1 &RT0 0x24 0x0 162 0x800 0x0 0x0 0x2 &RT0 0x25 0x0 163 0x800 0x0 0x0 0x3 &RT0 0x26 0x0 164 0x800 0x0 0x0 0x4 &RT0 0x27 0x0 165 166 /* IDSEL 0x12 */ 167 0x1000 0x0 0x0 0x1 &RT0 0x25 0x0 168 0x1000 0x0 0x0 0x2 &RT0 0x26 0x0 169 0x1000 0x0 0x0 0x3 &RT0 0x27 0x0 170 0x1000 0x0 0x0 0x4 &RT0 0x24 0x0 171 172 /* IDSEL 0x13 */ 173 0x1800 0x0 0x0 0x1 &RT0 0x26 0x0 174 0x1800 0x0 0x0 0x2 &RT0 0x27 0x0 175 0x1800 0x0 0x0 0x3 &RT0 0x24 0x0 176 0x1800 0x0 0x0 0x4 &RT0 0x25 0x0 177 178 /* IDSEL 0x14 */ 179 0x2000 0x0 0x0 0x1 &RT0 0x27 0x0 180 0x2000 0x0 0x0 0x2 &RT0 0x24 0x0 181 0x2000 0x0 0x0 0x3 &RT0 0x25 0x0 182 0x2000 0x0 0x0 0x4 &RT0 0x26 0x0 183 >; 184 185 RT0: router@1180 { 186 clock-frequency = <0>; 187 interrupt-controller; 188 device_type = "pic-router"; 189 #address-cells = <0>; 190 #interrupt-cells = <2>; 191 big-endian; 192 interrupts = <23 2>; 193 interrupt-parent = <&mpic>; 194 }; 195 }; 196 }; 197}; 198