1/* 2 * The generic setup file for PMC-Sierra MSP processors 3 * 4 * Copyright 2005-2007 PMC-Sierra, Inc, 5 * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net 6 * 7 * This program is free software; you can redistribute it and/or modify it 8 * under the terms of the GNU General Public License as published by the 9 * Free Software Foundation; either version 2 of the License, or (at your 10 * option) any later version. 11 */ 12 13#include <asm/bootinfo.h> 14#include <asm/cacheflush.h> 15#include <asm/r4kcache.h> 16#include <asm/reboot.h> 17#include <asm/time.h> 18 19#include <msp_prom.h> 20#include <msp_regs.h> 21 22#if defined(CONFIG_PMC_MSP7120_GW) 23#include <msp_regops.h> 24#define MSP_BOARD_RESET_GPIO 9 25#endif 26 27extern void msp_serial_setup(void); 28extern void pmctwiled_setup(void); 29 30#if defined(CONFIG_PMC_MSP7120_EVAL) || defined(CONFIG_PMC_MSP7120_GW) || \ 31 defined(CONFIG_PMC_MSP7120_FPGA) 32/* 33 * Performs the reset for MSP7120-based boards 34 */ 35void msp7120_reset(void) 36{ 37 void *start, *end, *iptr; 38 register int i; 39 40 /* Diasble all interrupts */ 41 local_irq_disable(); 42#ifdef CONFIG_SYS_SUPPORTS_MULTITHREADING 43 dvpe(); 44#endif 45 46 /* Cache the reset code of this function */ 47 __asm__ __volatile__ ( 48 " .set push \n" 49 " .set mips3 \n" 50 " la %0,startpoint \n" 51 " la %1,endpoint \n" 52 " .set pop \n" 53 : "=r" (start), "=r" (end) 54 : 55 ); 56 57 for (iptr = (void *)((unsigned int)start & ~(L1_CACHE_BYTES - 1)); 58 iptr < end; iptr += L1_CACHE_BYTES) 59 cache_op(Fill, iptr); 60 61 __asm__ __volatile__ ( 62 "startpoint: \n" 63 ); 64 65 /* Put the DDRC into self-refresh mode */ 66 DDRC_INDIRECT_WRITE(DDRC_CTL(10), 0xb, 1 << 16); 67 68 /* 69 * IMPORTANT! 70 * DO NOT do anything from here on out that might even 71 * think about fetching from RAM - i.e., don't call any 72 * non-inlined functions, and be VERY sure that any inline 73 * functions you do call do NOT access any sort of RAM 74 * anywhere! 75 */ 76 77 /* Wait a bit for the DDRC to settle */ 78 for (i = 0; i < 100000000; i++); 79 80#if defined(CONFIG_PMC_MSP7120_GW) 81 /* 82 * Set GPIO 9 HI, (tied to board reset logic) 83 * GPIO 9 is the 4th GPIO of register 3 84 * 85 * NOTE: We cannot use the higher-level msp_gpio_mode()/out() 86 * as GPIO char driver may not be enabled and it would look up 87 * data inRAM! 88 */ 89 set_value_reg32(GPIO_CFG3_REG, 0xf000, 0x8000); 90 set_reg32(GPIO_DATA3_REG, 8); 91 92 /* 93 * In case GPIO9 doesn't reset the board (jumper configurable!) 94 * fallback to device reset below. 95 */ 96#endif 97 /* Set bit 1 of the MSP7120 reset register */ 98 *RST_SET_REG = 0x00000001; 99 100 __asm__ __volatile__ ( 101 "endpoint: \n" 102 ); 103} 104#endif 105 106void msp_restart(char *command) 107{ 108 printk(KERN_WARNING "Now rebooting .......\n"); 109 110#if defined(CONFIG_PMC_MSP7120_EVAL) || defined(CONFIG_PMC_MSP7120_GW) || \ 111 defined(CONFIG_PMC_MSP7120_FPGA) 112 msp7120_reset(); 113#else 114 /* No chip-specific reset code, just jump to the ROM reset vector */ 115 set_c0_status(ST0_BEV | ST0_ERL); 116 change_c0_config(CONF_CM_CMASK, CONF_CM_UNCACHED); 117 flush_cache_all(); 118 write_c0_wired(0); 119 120 __asm__ __volatile__("jr\t%0"::"r"(0xbfc00000)); 121#endif 122} 123 124void msp_halt(void) 125{ 126 printk(KERN_WARNING "\n** You can safely turn off the power\n"); 127 while (1) 128 /* If possible call official function to get CPU WARs */ 129 if (cpu_wait) 130 (*cpu_wait)(); 131 else 132 __asm__(".set\tmips3\n\t" "wait\n\t" ".set\tmips0"); 133} 134 135void msp_power_off(void) 136{ 137 msp_halt(); 138} 139 140void __init plat_mem_setup(void) 141{ 142 _machine_restart = msp_restart; 143 _machine_halt = msp_halt; 144 pm_power_off = msp_power_off; 145} 146 147void __init prom_init(void) 148{ 149 unsigned long family; 150 unsigned long revision; 151 152 prom_argc = fw_arg0; 153 prom_argv = (char **)fw_arg1; 154 prom_envp = (char **)fw_arg2; 155 156 /* 157 * Someday we can use this with PMON2000 to get a 158 * platform call prom routines for output etc. without 159 * having to use grody hacks. For now it's unused. 160 * 161 * struct callvectors *cv = (struct callvectors *) fw_arg3; 162 */ 163 family = identify_family(); 164 revision = identify_revision(); 165 166 switch (family) { 167 case FAMILY_FPGA: 168 if (FPGA_IS_MSP4200(revision)) { 169 /* Old-style revision ID */ 170 mips_machtype = MACH_MSP4200_FPGA; 171 } else { 172 mips_machtype = MACH_MSP_OTHER; 173 } 174 break; 175 176 case FAMILY_MSP4200: 177#if defined(CONFIG_PMC_MSP4200_EVAL) 178 mips_machtype = MACH_MSP4200_EVAL; 179#elif defined(CONFIG_PMC_MSP4200_GW) 180 mips_machtype = MACH_MSP4200_GW; 181#else 182 mips_machtype = MACH_MSP_OTHER; 183#endif 184 break; 185 186 case FAMILY_MSP4200_FPGA: 187 mips_machtype = MACH_MSP4200_FPGA; 188 break; 189 190 case FAMILY_MSP7100: 191#if defined(CONFIG_PMC_MSP7120_EVAL) 192 mips_machtype = MACH_MSP7120_EVAL; 193#elif defined(CONFIG_PMC_MSP7120_GW) 194 mips_machtype = MACH_MSP7120_GW; 195#else 196 mips_machtype = MACH_MSP_OTHER; 197#endif 198 break; 199 200 case FAMILY_MSP7100_FPGA: 201 mips_machtype = MACH_MSP7120_FPGA; 202 break; 203 204 default: 205 /* we don't recognize the machine */ 206 mips_machtype = MACH_UNKNOWN; 207 panic("***Bogosity factor five***, exiting\n"); 208 break; 209 } 210 211 prom_init_cmdline(); 212 213 prom_meminit(); 214 215 /* 216 * Sub-system setup follows. 217 * Setup functions can either be called here or using the 218 * subsys_initcall mechanism (i.e. see msp_pci_setup). The 219 * order in which they are called can be changed by using the 220 * link order in arch/mips/pmc-sierra/msp71xx/Makefile. 221 * 222 * NOTE: Please keep sub-system specific initialization code 223 * in separate specific files. 224 */ 225 msp_serial_setup(); 226 227#ifdef CONFIG_PMCTWILED 228 /* 229 * Setup LED states before the subsys_initcall loads other 230 * dependant drivers/modules. 231 */ 232 pmctwiled_setup(); 233#endif 234} 235