1/* 2 * This file is subject to the terms and conditions of the GNU General Public 3 * License. See the file "COPYING" in the main directory of this archive 4 * for more details. 5 * 6 * Copyright (C) 1992 Linus Torvalds 7 * Copyright (C) 1994 - 2001, 2003, 07 Ralf Baechle 8 */ 9#include <linux/clockchips.h> 10#include <linux/init.h> 11#include <linux/interrupt.h> 12#include <linux/kernel.h> 13#include <linux/smp.h> 14#include <linux/spinlock.h> 15 16#include <asm/irq_cpu.h> 17#include <asm/i8253.h> 18#include <asm/i8259.h> 19#include <asm/io.h> 20#include <asm/jazz.h> 21#include <asm/pgtable.h> 22 23static DEFINE_RAW_SPINLOCK(r4030_lock); 24 25static void enable_r4030_irq(unsigned int irq) 26{ 27 unsigned int mask = 1 << (irq - JAZZ_IRQ_START); 28 unsigned long flags; 29 30 raw_spin_lock_irqsave(&r4030_lock, flags); 31 mask |= r4030_read_reg16(JAZZ_IO_IRQ_ENABLE); 32 r4030_write_reg16(JAZZ_IO_IRQ_ENABLE, mask); 33 raw_spin_unlock_irqrestore(&r4030_lock, flags); 34} 35 36void disable_r4030_irq(unsigned int irq) 37{ 38 unsigned int mask = ~(1 << (irq - JAZZ_IRQ_START)); 39 unsigned long flags; 40 41 raw_spin_lock_irqsave(&r4030_lock, flags); 42 mask &= r4030_read_reg16(JAZZ_IO_IRQ_ENABLE); 43 r4030_write_reg16(JAZZ_IO_IRQ_ENABLE, mask); 44 raw_spin_unlock_irqrestore(&r4030_lock, flags); 45} 46 47static struct irq_chip r4030_irq_type = { 48 .name = "R4030", 49 .ack = disable_r4030_irq, 50 .mask = disable_r4030_irq, 51 .mask_ack = disable_r4030_irq, 52 .unmask = enable_r4030_irq, 53}; 54 55void __init init_r4030_ints(void) 56{ 57 int i; 58 59 for (i = JAZZ_IRQ_START; i <= JAZZ_IRQ_END; i++) 60 set_irq_chip_and_handler(i, &r4030_irq_type, handle_level_irq); 61 62 r4030_write_reg16(JAZZ_IO_IRQ_ENABLE, 0); 63 r4030_read_reg16(JAZZ_IO_IRQ_SOURCE); /* clear pending IRQs */ 64 r4030_read_reg32(JAZZ_R4030_INVAL_ADDR); /* clear error bits */ 65} 66 67/* 68 * On systems with i8259-style interrupt controllers we assume for 69 * driver compatibility reasons interrupts 0 - 15 to be the i8259 70 * interrupts even if the hardware uses a different interrupt numbering. 71 */ 72void __init arch_init_irq(void) 73{ 74 /* 75 * this is a hack to get back the still needed wired mapping 76 * killed by init_mm() 77 */ 78 79 /* Map 0xe0000000 -> 0x0:800005C0, 0xe0010000 -> 0x1:30000580 */ 80 add_wired_entry(0x02000017, 0x03c00017, 0xe0000000, PM_64K); 81 /* Map 0xe2000000 -> 0x0:900005C0, 0xe3010000 -> 0x0:910005C0 */ 82 add_wired_entry(0x02400017, 0x02440017, 0xe2000000, PM_16M); 83 /* Map 0xe4000000 -> 0x0:600005C0, 0xe4100000 -> 400005C0 */ 84 add_wired_entry(0x01800017, 0x01000017, 0xe4000000, PM_4M); 85 86 init_i8259_irqs(); /* Integrated i8259 */ 87 mips_cpu_irq_init(); 88 init_r4030_ints(); 89 90 change_c0_status(ST0_IM, IE_IRQ2 | IE_IRQ1); 91} 92 93asmlinkage void plat_irq_dispatch(void) 94{ 95 unsigned int pending = read_c0_cause() & read_c0_status(); 96 unsigned int irq; 97 98 if (pending & IE_IRQ4) { 99 r4030_read_reg32(JAZZ_TIMER_REGISTER); 100 do_IRQ(JAZZ_TIMER_IRQ); 101 } else if (pending & IE_IRQ2) { 102 irq = *(volatile u8 *)JAZZ_EISA_IRQ_ACK; 103 do_IRQ(irq); 104 } else if (pending & IE_IRQ1) { 105 irq = *(volatile u8 *)JAZZ_IO_IRQ_SOURCE >> 2; 106 if (likely(irq > 0)) 107 do_IRQ(irq + JAZZ_IRQ_START - 1); 108 else 109 panic("Unimplemented loc_no_irq handler"); 110 } 111} 112 113static void r4030_set_mode(enum clock_event_mode mode, 114 struct clock_event_device *evt) 115{ 116 /* Nothing to do ... */ 117} 118 119struct clock_event_device r4030_clockevent = { 120 .name = "r4030", 121 .features = CLOCK_EVT_FEAT_PERIODIC, 122 .rating = 300, 123 .irq = JAZZ_TIMER_IRQ, 124 .set_mode = r4030_set_mode, 125}; 126 127static irqreturn_t r4030_timer_interrupt(int irq, void *dev_id) 128{ 129 struct clock_event_device *cd = dev_id; 130 131 cd->event_handler(cd); 132 return IRQ_HANDLED; 133} 134 135static struct irqaction r4030_timer_irqaction = { 136 .handler = r4030_timer_interrupt, 137 .flags = IRQF_DISABLED | IRQF_TIMER, 138 .name = "R4030 timer", 139}; 140 141void __init plat_time_init(void) 142{ 143 struct clock_event_device *cd = &r4030_clockevent; 144 struct irqaction *action = &r4030_timer_irqaction; 145 unsigned int cpu = smp_processor_id(); 146 147 BUG_ON(HZ != 100); 148 149 cd->cpumask = cpumask_of(cpu); 150 clockevents_register_device(cd); 151 action->dev_id = cd; 152 setup_irq(JAZZ_TIMER_IRQ, action); 153 154 /* 155 * Set clock to 100Hz. 156 * 157 * The R4030 timer receives an input clock of 1kHz which is divieded by 158 * a programmable 4-bit divider. This makes it fairly inflexible. 159 */ 160 r4030_write_reg32(JAZZ_TIMER_INTERVAL, 9); 161 setup_pit_timer(); 162} 163