1/* 2 * DEC I/O ASIC interrupts. 3 * 4 * Copyright (c) 2002, 2003 Maciej W. Rozycki 5 * 6 * This program is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU General Public License 8 * as published by the Free Software Foundation; either version 9 * 2 of the License, or (at your option) any later version. 10 */ 11 12#include <linux/init.h> 13#include <linux/irq.h> 14#include <linux/types.h> 15 16#include <asm/dec/ioasic.h> 17#include <asm/dec/ioasic_addrs.h> 18#include <asm/dec/ioasic_ints.h> 19 20 21static int ioasic_irq_base; 22 23 24static inline void unmask_ioasic_irq(unsigned int irq) 25{ 26 u32 simr; 27 28 simr = ioasic_read(IO_REG_SIMR); 29 simr |= (1 << (irq - ioasic_irq_base)); 30 ioasic_write(IO_REG_SIMR, simr); 31} 32 33static inline void mask_ioasic_irq(unsigned int irq) 34{ 35 u32 simr; 36 37 simr = ioasic_read(IO_REG_SIMR); 38 simr &= ~(1 << (irq - ioasic_irq_base)); 39 ioasic_write(IO_REG_SIMR, simr); 40} 41 42static inline void clear_ioasic_irq(unsigned int irq) 43{ 44 u32 sir; 45 46 sir = ~(1 << (irq - ioasic_irq_base)); 47 ioasic_write(IO_REG_SIR, sir); 48} 49 50static inline void ack_ioasic_irq(unsigned int irq) 51{ 52 mask_ioasic_irq(irq); 53 fast_iob(); 54} 55 56static inline void end_ioasic_irq(unsigned int irq) 57{ 58 if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) 59 unmask_ioasic_irq(irq); 60} 61 62static struct irq_chip ioasic_irq_type = { 63 .name = "IO-ASIC", 64 .ack = ack_ioasic_irq, 65 .mask = mask_ioasic_irq, 66 .mask_ack = ack_ioasic_irq, 67 .unmask = unmask_ioasic_irq, 68}; 69 70 71#define unmask_ioasic_dma_irq unmask_ioasic_irq 72 73#define mask_ioasic_dma_irq mask_ioasic_irq 74 75#define ack_ioasic_dma_irq ack_ioasic_irq 76 77static inline void end_ioasic_dma_irq(unsigned int irq) 78{ 79 clear_ioasic_irq(irq); 80 fast_iob(); 81 end_ioasic_irq(irq); 82} 83 84static struct irq_chip ioasic_dma_irq_type = { 85 .name = "IO-ASIC-DMA", 86 .ack = ack_ioasic_dma_irq, 87 .mask = mask_ioasic_dma_irq, 88 .mask_ack = ack_ioasic_dma_irq, 89 .unmask = unmask_ioasic_dma_irq, 90 .end = end_ioasic_dma_irq, 91}; 92 93 94void __init init_ioasic_irqs(int base) 95{ 96 int i; 97 98 /* Mask interrupts. */ 99 ioasic_write(IO_REG_SIMR, 0); 100 fast_iob(); 101 102 for (i = base; i < base + IO_INR_DMA; i++) 103 set_irq_chip_and_handler(i, &ioasic_irq_type, 104 handle_level_irq); 105 for (; i < base + IO_IRQ_LINES; i++) 106 set_irq_chip(i, &ioasic_dma_irq_type); 107 108 ioasic_irq_base = base; 109} 110