1#ifndef _ASM_NATIVE_PVCHK_INST_H 2#define _ASM_NATIVE_PVCHK_INST_H 3 4/****************************************************************************** 5 * arch/ia64/include/asm/native/pvchk_inst.h 6 * Checker for paravirtualizations of privileged operations. 7 * 8 * Copyright (C) 2005 Hewlett-Packard Co 9 * Dan Magenheimer <dan.magenheimer@hp.com> 10 * 11 * Copyright (c) 2008 Isaku Yamahata <yamahata at valinux co jp> 12 * VA Linux Systems Japan K.K. 13 * 14 * This program is free software; you can redistribute it and/or modify 15 * it under the terms of the GNU General Public License as published by 16 * the Free Software Foundation; either version 2 of the License, or 17 * (at your option) any later version. 18 * 19 * This program is distributed in the hope that it will be useful, 20 * but WITHOUT ANY WARRANTY; without even the implied warranty of 21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 22 * GNU General Public License for more details. 23 * 24 * You should have received a copy of the GNU General Public License 25 * along with this program; if not, write to the Free Software 26 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 27 * 28 */ 29 30/********************************************** 31 * Instructions paravirtualized for correctness 32 **********************************************/ 33 34/* "fc" and "thash" are privilege-sensitive instructions, meaning they 35 * may have different semantics depending on whether they are executed 36 * at PL0 vs PL!=0. When paravirtualized, these instructions mustn't 37 * be allowed to execute directly, lest incorrect semantics result. 38 */ 39 40#define fc .error "fc should not be used directly." 41#define thash .error "thash should not be used directly." 42 43/* Note that "ttag" and "cover" are also privilege-sensitive; "ttag" 44 * is not currently used (though it may be in a long-format VHPT system!) 45 * and the semantics of cover only change if psr.ic is off which is very 46 * rare (and currently non-existent outside of assembly code 47 */ 48#define ttag .error "ttag should not be used directly." 49#define cover .error "cover should not be used directly." 50 51/* There are also privilege-sensitive registers. These registers are 52 * readable at any privilege level but only writable at PL0. 53 */ 54#define cpuid .error "cpuid should not be used directly." 55#define pmd .error "pmd should not be used directly." 56 57/* 58 * mov ar.eflag = 59 * mov = ar.eflag 60 */ 61 62/********************************************** 63 * Instructions paravirtualized for performance 64 **********************************************/ 65/* 66 * Those instructions include '.' which can't be handled by cpp. 67 * or can't be handled by cpp easily. 68 * They are handled by sed instead of cpp. 69 */ 70 71/* for .S 72 * itc.i 73 * itc.d 74 * 75 * bsw.0 76 * bsw.1 77 * 78 * ssm psr.ic | PSR_DEFAULT_BITS 79 * ssm psr.ic 80 * rsm psr.ic 81 * ssm psr.i 82 * rsm psr.i 83 * rsm psr.i | psr.ic 84 * rsm psr.dt 85 * ssm psr.dt 86 * 87 * mov = cr.ifa 88 * mov = cr.itir 89 * mov = cr.isr 90 * mov = cr.iha 91 * mov = cr.ipsr 92 * mov = cr.iim 93 * mov = cr.iip 94 * mov = cr.ivr 95 * mov = psr 96 * 97 * mov cr.ifa = 98 * mov cr.itir = 99 * mov cr.iha = 100 * mov cr.ipsr = 101 * mov cr.ifs = 102 * mov cr.iip = 103 * mov cr.kr = 104 */ 105 106/* for intrinsics 107 * ssm psr.i 108 * rsm psr.i 109 * mov = psr 110 * mov = ivr 111 * mov = tpr 112 * mov cr.itm = 113 * mov eoi = 114 * mov rr[] = 115 * mov = rr[] 116 * mov = kr 117 * mov kr = 118 * ptc.ga 119 */ 120 121/************************************************************* 122 * define paravirtualized instrcution macros as nop to ingore. 123 * and check whether arguments are appropriate. 124 *************************************************************/ 125 126/* check whether reg is a regular register */ 127.macro is_rreg_in reg 128 .ifc "\reg", "r0" 129 nop 0 130 .exitm 131 .endif 132 ;; 133 mov \reg = r0 134 ;; 135.endm 136#define IS_RREG_IN(reg) is_rreg_in reg ; 137 138#define IS_RREG_OUT(reg) \ 139 ;; \ 140 mov reg = r0 \ 141 ;; 142 143#define IS_RREG_CLOB(reg) IS_RREG_OUT(reg) 144 145/* check whether pred is a predicate register */ 146#define IS_PRED_IN(pred) \ 147 ;; \ 148 (pred) nop 0 \ 149 ;; 150 151#define IS_PRED_OUT(pred) \ 152 ;; \ 153 cmp.eq pred, p0 = r0, r0 \ 154 ;; 155 156#define IS_PRED_CLOB(pred) IS_PRED_OUT(pred) 157 158 159#define DO_SAVE_MIN(__COVER, SAVE_IFS, EXTRA, WORKAROUND) \ 160 nop 0 161#define MOV_FROM_IFA(reg) \ 162 IS_RREG_OUT(reg) 163#define MOV_FROM_ITIR(reg) \ 164 IS_RREG_OUT(reg) 165#define MOV_FROM_ISR(reg) \ 166 IS_RREG_OUT(reg) 167#define MOV_FROM_IHA(reg) \ 168 IS_RREG_OUT(reg) 169#define MOV_FROM_IPSR(pred, reg) \ 170 IS_PRED_IN(pred) \ 171 IS_RREG_OUT(reg) 172#define MOV_FROM_IIM(reg) \ 173 IS_RREG_OUT(reg) 174#define MOV_FROM_IIP(reg) \ 175 IS_RREG_OUT(reg) 176#define MOV_FROM_IVR(reg, clob) \ 177 IS_RREG_OUT(reg) \ 178 IS_RREG_CLOB(clob) 179#define MOV_FROM_PSR(pred, reg, clob) \ 180 IS_PRED_IN(pred) \ 181 IS_RREG_OUT(reg) \ 182 IS_RREG_CLOB(clob) 183#define MOV_FROM_ITC(pred, pred_clob, reg, clob) \ 184 IS_PRED_IN(pred) \ 185 IS_PRED_CLOB(pred_clob) \ 186 IS_RREG_OUT(reg) \ 187 IS_RREG_CLOB(clob) 188#define MOV_TO_IFA(reg, clob) \ 189 IS_RREG_IN(reg) \ 190 IS_RREG_CLOB(clob) 191#define MOV_TO_ITIR(pred, reg, clob) \ 192 IS_PRED_IN(pred) \ 193 IS_RREG_IN(reg) \ 194 IS_RREG_CLOB(clob) 195#define MOV_TO_IHA(pred, reg, clob) \ 196 IS_PRED_IN(pred) \ 197 IS_RREG_IN(reg) \ 198 IS_RREG_CLOB(clob) 199#define MOV_TO_IPSR(pred, reg, clob) \ 200 IS_PRED_IN(pred) \ 201 IS_RREG_IN(reg) \ 202 IS_RREG_CLOB(clob) 203#define MOV_TO_IFS(pred, reg, clob) \ 204 IS_PRED_IN(pred) \ 205 IS_RREG_IN(reg) \ 206 IS_RREG_CLOB(clob) 207#define MOV_TO_IIP(reg, clob) \ 208 IS_RREG_IN(reg) \ 209 IS_RREG_CLOB(clob) 210#define MOV_TO_KR(kr, reg, clob0, clob1) \ 211 IS_RREG_IN(reg) \ 212 IS_RREG_CLOB(clob0) \ 213 IS_RREG_CLOB(clob1) 214#define ITC_I(pred, reg, clob) \ 215 IS_PRED_IN(pred) \ 216 IS_RREG_IN(reg) \ 217 IS_RREG_CLOB(clob) 218#define ITC_D(pred, reg, clob) \ 219 IS_PRED_IN(pred) \ 220 IS_RREG_IN(reg) \ 221 IS_RREG_CLOB(clob) 222#define ITC_I_AND_D(pred_i, pred_d, reg, clob) \ 223 IS_PRED_IN(pred_i) \ 224 IS_PRED_IN(pred_d) \ 225 IS_RREG_IN(reg) \ 226 IS_RREG_CLOB(clob) 227#define THASH(pred, reg0, reg1, clob) \ 228 IS_PRED_IN(pred) \ 229 IS_RREG_OUT(reg0) \ 230 IS_RREG_IN(reg1) \ 231 IS_RREG_CLOB(clob) 232#define SSM_PSR_IC_AND_DEFAULT_BITS_AND_SRLZ_I(clob0, clob1) \ 233 IS_RREG_CLOB(clob0) \ 234 IS_RREG_CLOB(clob1) 235#define SSM_PSR_IC_AND_SRLZ_D(clob0, clob1) \ 236 IS_RREG_CLOB(clob0) \ 237 IS_RREG_CLOB(clob1) 238#define RSM_PSR_IC(clob) \ 239 IS_RREG_CLOB(clob) 240#define SSM_PSR_I(pred, pred_clob, clob) \ 241 IS_PRED_IN(pred) \ 242 IS_PRED_CLOB(pred_clob) \ 243 IS_RREG_CLOB(clob) 244#define RSM_PSR_I(pred, clob0, clob1) \ 245 IS_PRED_IN(pred) \ 246 IS_RREG_CLOB(clob0) \ 247 IS_RREG_CLOB(clob1) 248#define RSM_PSR_I_IC(clob0, clob1, clob2) \ 249 IS_RREG_CLOB(clob0) \ 250 IS_RREG_CLOB(clob1) \ 251 IS_RREG_CLOB(clob2) 252#define RSM_PSR_DT \ 253 nop 0 254#define RSM_PSR_BE_I(clob0, clob1) \ 255 IS_RREG_CLOB(clob0) \ 256 IS_RREG_CLOB(clob1) 257#define SSM_PSR_DT_AND_SRLZ_I \ 258 nop 0 259#define BSW_0(clob0, clob1, clob2) \ 260 IS_RREG_CLOB(clob0) \ 261 IS_RREG_CLOB(clob1) \ 262 IS_RREG_CLOB(clob2) 263#define BSW_1(clob0, clob1) \ 264 IS_RREG_CLOB(clob0) \ 265 IS_RREG_CLOB(clob1) 266#define COVER \ 267 nop 0 268#define RFI \ 269 br.ret.sptk.many rp /* defining nop causes dependency error */ 270 271#endif /* _ASM_NATIVE_PVCHK_INST_H */ 272