1#ifndef _ASM_IA64_DMA_MAPPING_H 2#define _ASM_IA64_DMA_MAPPING_H 3 4/* 5 * Copyright (C) 2003-2004 Hewlett-Packard Co 6 * David Mosberger-Tang <davidm@hpl.hp.com> 7 */ 8#include <asm/machvec.h> 9#include <linux/scatterlist.h> 10#include <asm/swiotlb.h> 11#include <linux/dma-debug.h> 12 13#define ARCH_HAS_DMA_GET_REQUIRED_MASK 14 15extern struct dma_map_ops *dma_ops; 16extern struct ia64_machine_vector ia64_mv; 17extern void set_iommu_machvec(void); 18 19extern void machvec_dma_sync_single(struct device *, dma_addr_t, size_t, 20 enum dma_data_direction); 21extern void machvec_dma_sync_sg(struct device *, struct scatterlist *, int, 22 enum dma_data_direction); 23 24static inline void *dma_alloc_coherent(struct device *dev, size_t size, 25 dma_addr_t *daddr, gfp_t gfp) 26{ 27 struct dma_map_ops *ops = platform_dma_get_ops(dev); 28 void *caddr; 29 30 caddr = ops->alloc_coherent(dev, size, daddr, gfp); 31 debug_dma_alloc_coherent(dev, size, *daddr, caddr); 32 return caddr; 33} 34 35static inline void dma_free_coherent(struct device *dev, size_t size, 36 void *caddr, dma_addr_t daddr) 37{ 38 struct dma_map_ops *ops = platform_dma_get_ops(dev); 39 debug_dma_free_coherent(dev, size, caddr, daddr); 40 ops->free_coherent(dev, size, caddr, daddr); 41} 42 43#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f) 44#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h) 45 46#define get_dma_ops(dev) platform_dma_get_ops(dev) 47 48#include <asm-generic/dma-mapping-common.h> 49 50static inline int dma_mapping_error(struct device *dev, dma_addr_t daddr) 51{ 52 struct dma_map_ops *ops = platform_dma_get_ops(dev); 53 return ops->mapping_error(dev, daddr); 54} 55 56static inline int dma_supported(struct device *dev, u64 mask) 57{ 58 struct dma_map_ops *ops = platform_dma_get_ops(dev); 59 return ops->dma_supported(dev, mask); 60} 61 62static inline int 63dma_set_mask (struct device *dev, u64 mask) 64{ 65 if (!dev->dma_mask || !dma_supported(dev, mask)) 66 return -EIO; 67 *dev->dma_mask = mask; 68 return 0; 69} 70 71static inline bool dma_capable(struct device *dev, dma_addr_t addr, size_t size) 72{ 73 if (!dev->dma_mask) 74 return 0; 75 76 return addr + size - 1 <= *dev->dma_mask; 77} 78 79static inline dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr) 80{ 81 return paddr; 82} 83 84static inline phys_addr_t dma_to_phys(struct device *dev, dma_addr_t daddr) 85{ 86 return daddr; 87} 88 89static inline void 90dma_cache_sync (struct device *dev, void *vaddr, size_t size, 91 enum dma_data_direction dir) 92{ 93 /* 94 * IA-64 is cache-coherent, so this is mostly a no-op. However, we do need to 95 * ensure that dma_cache_sync() enforces order, hence the mb(). 96 */ 97 mb(); 98} 99 100#endif /* _ASM_IA64_DMA_MAPPING_H */ 101