1/* 2 * Head of the kernel - alter with care 3 * 4 * Copyright (C) 2000, 2001 Axis Communications AB 5 * 6 * Authors: Bjorn Wesen (bjornw@axis.com) 7 * 8 */ 9 10#define ASSEMBLER_MACROS_ONLY 11/* The IO_* macros use the ## token concatenation operator, so 12 -traditional must not be used when assembling this file. */ 13#include <arch/sv_addr_ag.h> 14 15#define CRAMFS_MAGIC 0x28cd3d45 16#define RAM_INIT_MAGIC 0x56902387 17#define COMMAND_LINE_MAGIC 0x87109563 18 19#define START_ETHERNET_CLOCK IO_STATE(R_NETWORK_GEN_CONFIG, enable, on) |\ 20 IO_STATE(R_NETWORK_GEN_CONFIG, phy, mii_clk) 21 22 ;; exported symbols 23 24 .globl etrax_irv 25 .globl romfs_start 26 .globl romfs_length 27 .globl romfs_in_flash 28 .globl swapper_pg_dir 29 30 .text 31 32 ;; This is the entry point of the kernel. We are in supervisor mode. 33 ;; 0x00000000 if Flash, 0x40004000 if DRAM 34 ;; since etrax actually starts at address 2 when booting from flash, we 35 ;; put a nop (2 bytes) here first so we dont accidentally skip the di 36 ;; 37 ;; NOTICE! The registers r8 and r9 are used as parameters carrying 38 ;; information from the decompressor (if the kernel was compressed). 39 ;; They should not be used in the code below until read. 40 41 nop 42 di 43 44 ;; First setup the kseg_c mapping from where the kernel is linked 45 ;; to 0x40000000 (where the actual DRAM resides) otherwise 46 ;; we cannot do very much! See arch/cris/README.mm 47 ;; 48 ;; Notice that since we're potentially running at 0x00 or 0x40 right now, 49 ;; we will get a fault as soon as we enable the MMU if we dont 50 ;; temporarily map those segments linearily. 51 ;; 52 ;; Due to a bug in Etrax-100 LX version 1 we need to map the memory 53 ;; slightly different. The bug is that you can't remap bit 31 of 54 ;; an address. Though we can check the version register for 55 ;; whether the bug is present, some constants would then have to 56 ;; be variables, so we don't. The drawback is that you can "only" map 57 ;; 1G per process with CONFIG_CRIS_LOW_MAP. 58 59#ifdef CONFIG_CRIS_LOW_MAP 60 ; kseg mappings, temporary map of 0xc0->0x40 61 move.d IO_FIELD (R_MMU_KBASE_HI, base_c, 4) \ 62 | IO_FIELD (R_MMU_KBASE_HI, base_b, 0xb) \ 63 | IO_FIELD (R_MMU_KBASE_HI, base_9, 9) \ 64 | IO_FIELD (R_MMU_KBASE_HI, base_8, 8), $r0 65 move.d $r0, [R_MMU_KBASE_HI] 66 67 ; temporary map of 0x40->0x40 and 0x60->0x40 68 move.d IO_FIELD (R_MMU_KBASE_LO, base_6, 4) \ 69 | IO_FIELD (R_MMU_KBASE_LO, base_4, 4), $r0 70 move.d $r0, [R_MMU_KBASE_LO] 71 72 ; mmu enable, segs e,c,b,a,6,5,4,0 segment mapped 73 move.d IO_STATE (R_MMU_CONFIG, mmu_enable, enable) \ 74 | IO_STATE (R_MMU_CONFIG, inv_excp, enable) \ 75 | IO_STATE (R_MMU_CONFIG, acc_excp, enable) \ 76 | IO_STATE (R_MMU_CONFIG, we_excp, enable) \ 77 | IO_STATE (R_MMU_CONFIG, seg_f, page) \ 78 | IO_STATE (R_MMU_CONFIG, seg_e, seg) \ 79 | IO_STATE (R_MMU_CONFIG, seg_d, page) \ 80 | IO_STATE (R_MMU_CONFIG, seg_c, seg) \ 81 | IO_STATE (R_MMU_CONFIG, seg_b, seg) \ 82 | IO_STATE (R_MMU_CONFIG, seg_a, seg) \ 83 | IO_STATE (R_MMU_CONFIG, seg_9, page) \ 84 | IO_STATE (R_MMU_CONFIG, seg_8, page) \ 85 | IO_STATE (R_MMU_CONFIG, seg_7, page) \ 86 | IO_STATE (R_MMU_CONFIG, seg_6, seg) \ 87 | IO_STATE (R_MMU_CONFIG, seg_5, seg) \ 88 | IO_STATE (R_MMU_CONFIG, seg_4, seg) \ 89 | IO_STATE (R_MMU_CONFIG, seg_3, page) \ 90 | IO_STATE (R_MMU_CONFIG, seg_2, page) \ 91 | IO_STATE (R_MMU_CONFIG, seg_1, page) \ 92 | IO_STATE (R_MMU_CONFIG, seg_0, seg), $r0 93 move.d $r0, [R_MMU_CONFIG] 94#else 95 ; kseg mappings 96 move.d IO_FIELD (R_MMU_KBASE_HI, base_e, 8) \ 97 | IO_FIELD (R_MMU_KBASE_HI, base_c, 4) \ 98 | IO_FIELD (R_MMU_KBASE_HI, base_b, 0xb), $r0 99 move.d $r0, [R_MMU_KBASE_HI] 100 101 ; temporary map of 0x40->0x40 and 0x00->0x00 102 move.d IO_FIELD (R_MMU_KBASE_LO, base_4, 4), $r0 103 move.d $r0, [R_MMU_KBASE_LO] 104 105 ; mmu enable, segs f,e,c,b,4,0 segment mapped 106 move.d IO_STATE (R_MMU_CONFIG, mmu_enable, enable) \ 107 | IO_STATE (R_MMU_CONFIG, inv_excp, enable) \ 108 | IO_STATE (R_MMU_CONFIG, acc_excp, enable) \ 109 | IO_STATE (R_MMU_CONFIG, we_excp, enable) \ 110 | IO_STATE (R_MMU_CONFIG, seg_f, seg) \ 111 | IO_STATE (R_MMU_CONFIG, seg_e, seg) \ 112 | IO_STATE (R_MMU_CONFIG, seg_d, page) \ 113 | IO_STATE (R_MMU_CONFIG, seg_c, seg) \ 114 | IO_STATE (R_MMU_CONFIG, seg_b, seg) \ 115 | IO_STATE (R_MMU_CONFIG, seg_a, page) \ 116 | IO_STATE (R_MMU_CONFIG, seg_9, page) \ 117 | IO_STATE (R_MMU_CONFIG, seg_8, page) \ 118 | IO_STATE (R_MMU_CONFIG, seg_7, page) \ 119 | IO_STATE (R_MMU_CONFIG, seg_6, page) \ 120 | IO_STATE (R_MMU_CONFIG, seg_5, page) \ 121 | IO_STATE (R_MMU_CONFIG, seg_4, seg) \ 122 | IO_STATE (R_MMU_CONFIG, seg_3, page) \ 123 | IO_STATE (R_MMU_CONFIG, seg_2, page) \ 124 | IO_STATE (R_MMU_CONFIG, seg_1, page) \ 125 | IO_STATE (R_MMU_CONFIG, seg_0, seg), $r0 126 move.d $r0, [R_MMU_CONFIG] 127#endif 128 129 ;; Now we need to sort out the segments and their locations in RAM or 130 ;; Flash. The image in the Flash (or in DRAM) consists of 3 pieces: 131 ;; 1) kernel text, 2) kernel data, 3) ROM filesystem image 132 ;; But the linker has linked the kernel to expect this layout in 133 ;; DRAM memory: 134 ;; 1) kernel text, 2) kernel data, 3) kernel BSS 135 ;; (the location of the ROM filesystem is determined by the krom driver) 136 ;; If we boot this from Flash, we want to keep the ROM filesystem in 137 ;; the flash, we want to copy the text and need to copy the data to DRAM. 138 ;; But if we boot from DRAM, we need to move the ROMFS image 139 ;; from its position after kernel data, to after kernel BSS, BEFORE the 140 ;; kernel starts using the BSS area (since its "overlayed" with the ROMFS) 141 ;; 142 ;; In both cases, we start in un-cached mode, and need to jump into a 143 ;; cached PC after we're done fiddling around with the segments. 144 ;; 145 ;; arch/etrax100/etrax100.ld sets some symbols that define the start 146 ;; and end of each segment. 147 148 ;; Check if we start from DRAM or FLASH by testing PC 149 150 move.d $pc,$r0 151 and.d 0x7fffffff,$r0 ; get rid of the non-cache bit 152 cmp.d 0x10000,$r0 ; arbitrary... just something above this code 153 blo _inflash0 154 nop 155 156 jump _inram ; enter cached ram 157 158 ;; Jumpgate for branches. 159_inflash0: 160 jump _inflash 161 162 ;; Put this in a suitable section where we can reclaim storage 163 ;; after init. 164 .section ".init.text", "ax" 165_inflash: 166#ifdef CONFIG_ETRAX_ETHERNET 167 ;; Start MII clock to make sure it is running when tranceiver is reset 168 move.d START_ETHERNET_CLOCK, $r0 169 move.d $r0, [R_NETWORK_GEN_CONFIG] 170#endif 171 172 ;; Set up waitstates etc according to kernel configuration. 173#ifndef CONFIG_SVINTO_SIM 174 move.d CONFIG_ETRAX_DEF_R_WAITSTATES, $r0 175 move.d $r0, [R_WAITSTATES] 176 177 move.d CONFIG_ETRAX_DEF_R_BUS_CONFIG, $r0 178 move.d $r0, [R_BUS_CONFIG] 179#endif 180 181 ;; We need to initialze DRAM registers before we start using the DRAM 182 183 cmp.d RAM_INIT_MAGIC, $r8 ; Already initialized? 184 beq _dram_init_finished 185 nop 186 187#include "../lib/dram_init.S" 188 189_dram_init_finished: 190 ;; Copy text+data to DRAM 191 ;; This is fragile - the calculation of r4 as the image size depends 192 ;; on that the labels below actually are the first and last positions 193 ;; in the linker-script. 194 ;; 195 ;; Then the locating of the cramfs image depends on the aforementioned 196 ;; image being located in the flash at 0. This is most often not true, 197 ;; thus the following does not work (normally there is a rescue-block 198 ;; between the physical start of the flash and the flash-image start, 199 ;; and when run with compression, the kernel is actually unpacked to 200 ;; DRAM and we never get here in the first place :)) 201 202 moveq 0, $r0 ; source 203 move.d text_start, $r1 ; destination 204 move.d __vmlinux_end, $r2 ; end destination 205 move.d $r2, $r4 206 sub.d $r1, $r4 ; r4=__vmlinux_end in flash, used below 2071: move.w [$r0+], $r3 208 move.w $r3, [$r1+] 209 cmp.d $r2, $r1 210 blo 1b 211 nop 212 213 ;; We keep the cramfs in the flash. 214 ;; There might be none, but that does not matter because 215 ;; we don't do anything than read some bytes here. 216 217 moveq 0, $r0 218 move.d $r0, [romfs_length] ; default if there is no cramfs 219 220 move.d [$r4], $r0 ; cramfs_super.magic 221 cmp.d CRAMFS_MAGIC, $r0 222 bne 1f 223 nop 224 move.d [$r4 + 4], $r0 ; cramfs_super.size 225 move.d $r0, [romfs_length] 226#ifdef CONFIG_CRIS_LOW_MAP 227 add.d 0x50000000, $r4 ; add flash start in virtual memory (cached) 228#else 229 add.d 0xf0000000, $r4 ; add flash start in virtual memory (cached) 230#endif 231 move.d $r4, [romfs_start] 2321: 233 moveq 1, $r0 234 move.d $r0, [romfs_in_flash] 235 236 jump _start_it ; enter code, cached this time 237 238_inram: 239 ;; Move the ROM fs to after BSS end. This assumes that the cramfs 240 ;; second longword contains the length of the cramfs 241 242 moveq 0, $r0 243 move.d $r0, [romfs_length] ; default if there is no cramfs 244 245 ;; The kernel could have been unpacked to DRAM by the loader, but 246 ;; the cramfs image could still be in the Flash directly after the 247 ;; compressed kernel image. The loader passes the address of the 248 ;; byte succeeding the last compressed byte in the flash in the 249 ;; register r9 when starting the kernel. Check if r9 points to a 250 ;; decent cramfs image! 251 ;; (Notice that if this is not booted from the loader, r9 will be 252 ;; garbage but we do sanity checks on it, the chance that it points 253 ;; to a cramfs magic is small.. ) 254 255 cmp.d 0x0ffffff8, $r9 256 bhs _no_romfs_in_flash ; r9 points outside the flash area 257 nop 258 move.d [$r9], $r0 ; cramfs_super.magic 259 cmp.d CRAMFS_MAGIC, $r0 260 bne _no_romfs_in_flash 261 nop 262 move.d [$r9+4], $r0 ; cramfs_super.length 263 move.d $r0, [romfs_length] 264#ifdef CONFIG_CRIS_LOW_MAP 265 add.d 0x50000000, $r9 ; add flash start in virtual memory (cached) 266#else 267 add.d 0xf0000000, $r9 ; add flash start in virtual memory (cached) 268#endif 269 move.d $r9, [romfs_start] 270 271 moveq 1, $r0 272 move.d $r0, [romfs_in_flash] 273 274 jump _start_it ; enter code, cached this time 275 276_no_romfs_in_flash: 277 278 ;; Check if there is a cramfs (magic value). 279 ;; Notice that we check for cramfs magic value - which is 280 ;; the "rom fs" we'll possibly use in 2.4 if not JFFS (which does 281 ;; not need this mechanism anyway) 282 283 move.d __init_end, $r0; the image will be after the end of init 284 move.d [$r0], $r1 ; cramfs assumes same endian on host/target 285 cmp.d CRAMFS_MAGIC, $r1; magic value in cramfs superblock 286 bne 2f 287 nop 288 289 ;; Ok. What is its size ? 290 291 move.d [$r0 + 4], $r2 ; cramfs_super.size (again, no need to swapwb) 292 293 ;; We want to copy it to the end of the BSS 294 295 move.d _end, $r1 296 297 ;; Remember values so cramfs and setup can find this info 298 299 move.d $r1, [romfs_start] ; new romfs location 300 move.d $r2, [romfs_length] 301 302 ;; We need to copy it backwards, since they can be overlapping 303 304 add.d $r2, $r0 305 add.d $r2, $r1 306 307 ;; Go ahead. Make my loop. 308 309 lsrq 1, $r2 ; size is in bytes, we copy words 310 3111: move.w [$r0=$r0-2],$r3 312 move.w $r3,[$r1=$r1-2] 313 subq 1, $r2 314 bne 1b 315 nop 316 3172: 318 ;; Dont worry that the BSS is tainted. It will be cleared later. 319 320 moveq 0, $r0 321 move.d $r0, [romfs_in_flash] 322 323 jump _start_it ; better skip the additional cramfs check below 324 325_start_it: 326 327 ;; Check if kernel command line is supplied 328 cmp.d COMMAND_LINE_MAGIC, $r10 329 bne no_command_line 330 nop 331 332 move.d 256, $r13 333 move.d cris_command_line, $r10 334 or.d 0x80000000, $r11 ; Make it virtual 3351: 336 move.b [$r11+], $r12 337 move.b $r12, [$r10+] 338 subq 1, $r13 339 bne 1b 340 nop 341 342no_command_line: 343 344 ;; the kernel stack is overlayed with the task structure for each 345 ;; task. thus the initial kernel stack is in the same page as the 346 ;; init_task (but starts in the top of the page, size 8192) 347 move.d init_thread_union + 8192, $sp 348 move.d ibr_start,$r0 ; this symbol is set by the linker script 349 move $r0,$ibr 350 move.d $r0,[etrax_irv] ; set the interrupt base register and pointer 351 352 ;; Clear BSS region, from _bss_start to _end 353 354 move.d __bss_start, $r0 355 move.d _end, $r1 3561: clear.d [$r0+] 357 cmp.d $r1, $r0 358 blo 1b 359 nop 360 361#ifdef CONFIG_BLK_DEV_ETRAXIDE 362 ;; disable ATA before enabling it in genconfig below 363 moveq 0,$r0 364 move.d $r0,[R_ATA_CTRL_DATA] 365 move.d $r0,[R_ATA_TRANSFER_CNT] 366 move.d $r0,[R_ATA_CONFIG] 367#endif 368 369#ifdef CONFIG_JULIETTE 370 ;; configure external DMA channel 0 before enabling it in genconfig 371 372 moveq 0,$r0 373 move.d $r0,[R_EXT_DMA_0_ADDR] 374 ; cnt enable, word size, output, stop, size 0 375 move.d IO_STATE (R_EXT_DMA_0_CMD, cnt, enable) \ 376 | IO_STATE (R_EXT_DMA_0_CMD, rqpol, ahigh) \ 377 | IO_STATE (R_EXT_DMA_0_CMD, apol, ahigh) \ 378 | IO_STATE (R_EXT_DMA_0_CMD, rq_ack, burst) \ 379 | IO_STATE (R_EXT_DMA_0_CMD, wid, word) \ 380 | IO_STATE (R_EXT_DMA_0_CMD, dir, output) \ 381 | IO_STATE (R_EXT_DMA_0_CMD, run, stop) \ 382 | IO_FIELD (R_EXT_DMA_0_CMD, trf_count, 0),$r0 383 move.d $r0,[R_EXT_DMA_0_CMD] 384 385 ;; reset dma4 and wait for completion 386 387 moveq IO_STATE (R_DMA_CH4_CMD, cmd, reset),$r0 388 move.b $r0,[R_DMA_CH4_CMD] 3891: move.b [R_DMA_CH4_CMD],$r0 390 and.b IO_MASK (R_DMA_CH4_CMD, cmd),$r0 391 cmp.b IO_STATE (R_DMA_CH4_CMD, cmd, reset),$r0 392 beq 1b 393 nop 394 395 ;; reset dma5 and wait for completion 396 397 moveq IO_STATE (R_DMA_CH5_CMD, cmd, reset),$r0 398 move.b $r0,[R_DMA_CH5_CMD] 3991: move.b [R_DMA_CH5_CMD],$r0 400 and.b IO_MASK (R_DMA_CH5_CMD, cmd),$r0 401 cmp.b IO_STATE (R_DMA_CH5_CMD, cmd, reset),$r0 402 beq 1b 403 nop 404#endif 405 406 ;; Etrax product HW genconfig setup 407 408 moveq 0,$r0 409 410 ;; Select or disable serial port 2 411#ifdef CONFIG_ETRAX_SERIAL_PORT2 412 or.d IO_STATE (R_GEN_CONFIG, ser2, select),$r0 413#else 414 or.d IO_STATE (R_GEN_CONFIG, ser2, disable),$r0 415#endif 416 417 ;; Init interfaces (disable them). 418 or.d IO_STATE (R_GEN_CONFIG, scsi0, disable) \ 419 | IO_STATE (R_GEN_CONFIG, ata, disable) \ 420 | IO_STATE (R_GEN_CONFIG, par0, disable) \ 421 | IO_STATE (R_GEN_CONFIG, mio, disable) \ 422 | IO_STATE (R_GEN_CONFIG, scsi1, disable) \ 423 | IO_STATE (R_GEN_CONFIG, scsi0w, disable) \ 424 | IO_STATE (R_GEN_CONFIG, par1, disable) \ 425 | IO_STATE (R_GEN_CONFIG, ser3, disable) \ 426 | IO_STATE (R_GEN_CONFIG, mio_w, disable) \ 427 | IO_STATE (R_GEN_CONFIG, usb1, disable) \ 428 | IO_STATE (R_GEN_CONFIG, usb2, disable) \ 429 | IO_STATE (R_GEN_CONFIG, par_w, disable),$r0 430 431 ;; Init DMA channel muxing (set to unused clients). 432 or.d IO_STATE (R_GEN_CONFIG, dma2, ata) \ 433 | IO_STATE (R_GEN_CONFIG, dma3, ata) \ 434 | IO_STATE (R_GEN_CONFIG, dma4, scsi1) \ 435 | IO_STATE (R_GEN_CONFIG, dma5, scsi1) \ 436 | IO_STATE (R_GEN_CONFIG, dma6, unused) \ 437 | IO_STATE (R_GEN_CONFIG, dma7, unused) \ 438 | IO_STATE (R_GEN_CONFIG, dma8, usb) \ 439 | IO_STATE (R_GEN_CONFIG, dma9, usb),$r0 440 441 442#if defined(CONFIG_ETRAX_DEF_R_PORT_G0_DIR_OUT) 443 or.d IO_STATE (R_GEN_CONFIG, g0dir, out),$r0 444#endif 445 446#if defined(CONFIG_ETRAX_DEF_R_PORT_G8_15_DIR_OUT) 447 or.d IO_STATE (R_GEN_CONFIG, g8_15dir, out),$r0 448#endif 449#if defined(CONFIG_ETRAX_DEF_R_PORT_G16_23_DIR_OUT) 450 or.d IO_STATE (R_GEN_CONFIG, g16_23dir, out),$r0 451#endif 452 453#if defined(CONFIG_ETRAX_DEF_R_PORT_G24_DIR_OUT) 454 or.d IO_STATE (R_GEN_CONFIG, g24dir, out),$r0 455#endif 456 457 move.d $r0,[genconfig_shadow] ; init a shadow register of R_GEN_CONFIG 458 459#ifndef CONFIG_SVINTO_SIM 460 move.d $r0,[R_GEN_CONFIG] 461 462 463 moveq IO_STATE (R_DMA_CH8_CMD, cmd, reset),$r0 464 move.b $r0,[R_DMA_CH8_CMD] ; reset (ser1 dma out) 465 move.b $r0,[R_DMA_CH9_CMD] ; reset (ser1 dma in) 4661: move.b [R_DMA_CH8_CMD],$r0 ; wait for reset cycle to finish 467 andq IO_MASK (R_DMA_CH8_CMD, cmd),$r0 468 cmpq IO_STATE (R_DMA_CH8_CMD, cmd, reset),$r0 469 beq 1b 470 nop 4711: move.b [R_DMA_CH9_CMD],$r0 ; wait for reset cycle to finish 472 andq IO_MASK (R_DMA_CH9_CMD, cmd),$r0 473 cmpq IO_STATE (R_DMA_CH9_CMD, cmd, reset),$r0 474 beq 1b 475 nop 476 477 ;; setup port PA and PB default initial directions and data 478 ;; including their shadow registers 479 480 move.b CONFIG_ETRAX_DEF_R_PORT_PA_DIR,$r0 481#if defined(CONFIG_BLUETOOTH) && defined(CONFIG_BLUETOOTH_RESET_PA7) 482 or.b IO_STATE (R_PORT_PA_DIR, dir7, output),$r0 483#endif 484 move.b $r0,[port_pa_dir_shadow] 485 move.b $r0,[R_PORT_PA_DIR] 486 move.b CONFIG_ETRAX_DEF_R_PORT_PA_DATA,$r0 487#if defined(CONFIG_BLUETOOTH) && defined(CONFIG_BLUETOOTH_RESET_PA7) 488#if defined(CONFIG_BLUETOOTH_RESET_ACTIVE_HIGH) 489 and.b ~(1 << 7),$r0 490#else 491 or.b (1 << 7),$r0 492#endif 493#endif 494 move.b $r0,[port_pa_data_shadow] 495 move.b $r0,[R_PORT_PA_DATA] 496 497 move.b CONFIG_ETRAX_DEF_R_PORT_PB_CONFIG,$r0 498 move.b $r0,[port_pb_config_shadow] 499 move.b $r0,[R_PORT_PB_CONFIG] 500 move.b CONFIG_ETRAX_DEF_R_PORT_PB_DIR,$r0 501#if defined(CONFIG_BLUETOOTH) && defined(CONFIG_BLUETOOTH_RESET_PB5) 502 or.b IO_STATE (R_PORT_PB_DIR, dir5, output),$r0 503#endif 504 move.b $r0,[port_pb_dir_shadow] 505 move.b $r0,[R_PORT_PB_DIR] 506 move.b CONFIG_ETRAX_DEF_R_PORT_PB_DATA,$r0 507#if defined(CONFIG_BLUETOOTH) && defined(CONFIG_BLUETOOTH_RESET_PB5) 508#if defined(CONFIG_BLUETOOTH_RESET_ACTIVE_HIGH) 509 and.b ~(1 << 5),$r0 510#else 511 or.b (1 << 5),$r0 512#endif 513#endif 514 move.b $r0,[port_pb_data_shadow] 515 move.b $r0,[R_PORT_PB_DATA] 516 517 moveq 0, $r0 518 move.d $r0,[port_pb_i2c_shadow] 519 move.d $r0, [R_PORT_PB_I2C] 520 521 moveq 0,$r0 522#if defined(CONFIG_BLUETOOTH) && defined(CONFIG_BLUETOOTH_RESET_G10) 523#if defined(CONFIG_BLUETOOTH_RESET_ACTIVE_HIGH) 524 and.d ~(1 << 10),$r0 525#else 526 or.d (1 << 10),$r0 527#endif 528#endif 529#if defined(CONFIG_BLUETOOTH) && defined(CONFIG_BLUETOOTH_RESET_G11) 530#if defined(CONFIG_BLUETOOTH_RESET_ACTIVE_HIGH) 531 and.d ~(1 << 11),$r0 532#else 533 or.d (1 << 11),$r0 534#endif 535#endif 536 move.d $r0,[port_g_data_shadow] 537 move.d $r0,[R_PORT_G_DATA] 538 539 ;; setup the serial port 0 at 115200 baud for debug purposes 540 541 moveq IO_STATE (R_SERIAL0_XOFF, tx_stop, enable) \ 542 | IO_STATE (R_SERIAL0_XOFF, auto_xoff, disable) \ 543 | IO_FIELD (R_SERIAL0_XOFF, xoff_char, 0),$r0 544 move.d $r0,[R_SERIAL0_XOFF] 545 546 ; 115.2kbaud for both transmit and receive 547 move.b IO_STATE (R_SERIAL0_BAUD, tr_baud, c115k2Hz) \ 548 | IO_STATE (R_SERIAL0_BAUD, rec_baud, c115k2Hz),$r0 549 move.b $r0,[R_SERIAL0_BAUD] 550 551 ; Set up and enable the serial0 receiver. 552 move.b IO_STATE (R_SERIAL0_REC_CTRL, dma_err, stop) \ 553 | IO_STATE (R_SERIAL0_REC_CTRL, rec_enable, enable) \ 554 | IO_STATE (R_SERIAL0_REC_CTRL, rts_, active) \ 555 | IO_STATE (R_SERIAL0_REC_CTRL, sampling, middle) \ 556 | IO_STATE (R_SERIAL0_REC_CTRL, rec_stick_par, normal) \ 557 | IO_STATE (R_SERIAL0_REC_CTRL, rec_par, even) \ 558 | IO_STATE (R_SERIAL0_REC_CTRL, rec_par_en, disable) \ 559 | IO_STATE (R_SERIAL0_REC_CTRL, rec_bitnr, rec_8bit),$r0 560 move.b $r0,[R_SERIAL0_REC_CTRL] 561 562 ; Set up and enable the serial0 transmitter. 563 move.b IO_FIELD (R_SERIAL0_TR_CTRL, txd, 0) \ 564 | IO_STATE (R_SERIAL0_TR_CTRL, tr_enable, enable) \ 565 | IO_STATE (R_SERIAL0_TR_CTRL, auto_cts, disabled) \ 566 | IO_STATE (R_SERIAL0_TR_CTRL, stop_bits, one_bit) \ 567 | IO_STATE (R_SERIAL0_TR_CTRL, tr_stick_par, normal) \ 568 | IO_STATE (R_SERIAL0_TR_CTRL, tr_par, even) \ 569 | IO_STATE (R_SERIAL0_TR_CTRL, tr_par_en, disable) \ 570 | IO_STATE (R_SERIAL0_TR_CTRL, tr_bitnr, tr_8bit),$r0 571 move.b $r0,[R_SERIAL0_TR_CTRL] 572 573 ;; setup the serial port 1 at 115200 baud for debug purposes 574 575 moveq IO_STATE (R_SERIAL1_XOFF, tx_stop, enable) \ 576 | IO_STATE (R_SERIAL1_XOFF, auto_xoff, disable) \ 577 | IO_FIELD (R_SERIAL1_XOFF, xoff_char, 0),$r0 578 move.d $r0,[R_SERIAL1_XOFF] 579 580 ; 115.2kbaud for both transmit and receive 581 move.b IO_STATE (R_SERIAL1_BAUD, tr_baud, c115k2Hz) \ 582 | IO_STATE (R_SERIAL1_BAUD, rec_baud, c115k2Hz),$r0 583 move.b $r0,[R_SERIAL1_BAUD] 584 585 ; Set up and enable the serial1 receiver. 586 move.b IO_STATE (R_SERIAL1_REC_CTRL, dma_err, stop) \ 587 | IO_STATE (R_SERIAL1_REC_CTRL, rec_enable, enable) \ 588 | IO_STATE (R_SERIAL1_REC_CTRL, rts_, active) \ 589 | IO_STATE (R_SERIAL1_REC_CTRL, sampling, middle) \ 590 | IO_STATE (R_SERIAL1_REC_CTRL, rec_stick_par, normal) \ 591 | IO_STATE (R_SERIAL1_REC_CTRL, rec_par, even) \ 592 | IO_STATE (R_SERIAL1_REC_CTRL, rec_par_en, disable) \ 593 | IO_STATE (R_SERIAL1_REC_CTRL, rec_bitnr, rec_8bit),$r0 594 move.b $r0,[R_SERIAL1_REC_CTRL] 595 596 ; Set up and enable the serial1 transmitter. 597 move.b IO_FIELD (R_SERIAL1_TR_CTRL, txd, 0) \ 598 | IO_STATE (R_SERIAL1_TR_CTRL, tr_enable, enable) \ 599 | IO_STATE (R_SERIAL1_TR_CTRL, auto_cts, disabled) \ 600 | IO_STATE (R_SERIAL1_TR_CTRL, stop_bits, one_bit) \ 601 | IO_STATE (R_SERIAL1_TR_CTRL, tr_stick_par, normal) \ 602 | IO_STATE (R_SERIAL1_TR_CTRL, tr_par, even) \ 603 | IO_STATE (R_SERIAL1_TR_CTRL, tr_par_en, disable) \ 604 | IO_STATE (R_SERIAL1_TR_CTRL, tr_bitnr, tr_8bit),$r0 605 move.b $r0,[R_SERIAL1_TR_CTRL] 606 607#ifdef CONFIG_ETRAX_SERIAL_PORT2 608 ;; setup the serial port 2 at 115200 baud for debug purposes 609 610 moveq IO_STATE (R_SERIAL2_XOFF, tx_stop, enable) \ 611 | IO_STATE (R_SERIAL2_XOFF, auto_xoff, disable) \ 612 | IO_FIELD (R_SERIAL2_XOFF, xoff_char, 0),$r0 613 move.d $r0,[R_SERIAL2_XOFF] 614 615 ; 115.2kbaud for both transmit and receive 616 move.b IO_STATE (R_SERIAL2_BAUD, tr_baud, c115k2Hz) \ 617 | IO_STATE (R_SERIAL2_BAUD, rec_baud, c115k2Hz),$r0 618 move.b $r0,[R_SERIAL2_BAUD] 619 620 ; Set up and enable the serial2 receiver. 621 move.b IO_STATE (R_SERIAL2_REC_CTRL, dma_err, stop) \ 622 | IO_STATE (R_SERIAL2_REC_CTRL, rec_enable, enable) \ 623 | IO_STATE (R_SERIAL2_REC_CTRL, rts_, active) \ 624 | IO_STATE (R_SERIAL2_REC_CTRL, sampling, middle) \ 625 | IO_STATE (R_SERIAL2_REC_CTRL, rec_stick_par, normal) \ 626 | IO_STATE (R_SERIAL2_REC_CTRL, rec_par, even) \ 627 | IO_STATE (R_SERIAL2_REC_CTRL, rec_par_en, disable) \ 628 | IO_STATE (R_SERIAL2_REC_CTRL, rec_bitnr, rec_8bit),$r0 629 move.b $r0,[R_SERIAL2_REC_CTRL] 630 631 ; Set up and enable the serial2 transmitter. 632 move.b IO_FIELD (R_SERIAL2_TR_CTRL, txd, 0) \ 633 | IO_STATE (R_SERIAL2_TR_CTRL, tr_enable, enable) \ 634 | IO_STATE (R_SERIAL2_TR_CTRL, auto_cts, disabled) \ 635 | IO_STATE (R_SERIAL2_TR_CTRL, stop_bits, one_bit) \ 636 | IO_STATE (R_SERIAL2_TR_CTRL, tr_stick_par, normal) \ 637 | IO_STATE (R_SERIAL2_TR_CTRL, tr_par, even) \ 638 | IO_STATE (R_SERIAL2_TR_CTRL, tr_par_en, disable) \ 639 | IO_STATE (R_SERIAL2_TR_CTRL, tr_bitnr, tr_8bit),$r0 640 move.b $r0,[R_SERIAL2_TR_CTRL] 641#endif 642 643#ifdef CONFIG_ETRAX_SERIAL_PORT3 644 ;; setup the serial port 3 at 115200 baud for debug purposes 645 646 moveq IO_STATE (R_SERIAL3_XOFF, tx_stop, enable) \ 647 | IO_STATE (R_SERIAL3_XOFF, auto_xoff, disable) \ 648 | IO_FIELD (R_SERIAL3_XOFF, xoff_char, 0),$r0 649 move.d $r0,[R_SERIAL3_XOFF] 650 651 ; 115.2kbaud for both transmit and receive 652 move.b IO_STATE (R_SERIAL3_BAUD, tr_baud, c115k2Hz) \ 653 | IO_STATE (R_SERIAL3_BAUD, rec_baud, c115k2Hz),$r0 654 move.b $r0,[R_SERIAL3_BAUD] 655 656 ; Set up and enable the serial3 receiver. 657 move.b IO_STATE (R_SERIAL3_REC_CTRL, dma_err, stop) \ 658 | IO_STATE (R_SERIAL3_REC_CTRL, rec_enable, enable) \ 659 | IO_STATE (R_SERIAL3_REC_CTRL, rts_, active) \ 660 | IO_STATE (R_SERIAL3_REC_CTRL, sampling, middle) \ 661 | IO_STATE (R_SERIAL3_REC_CTRL, rec_stick_par, normal) \ 662 | IO_STATE (R_SERIAL3_REC_CTRL, rec_par, even) \ 663 | IO_STATE (R_SERIAL3_REC_CTRL, rec_par_en, disable) \ 664 | IO_STATE (R_SERIAL3_REC_CTRL, rec_bitnr, rec_8bit),$r0 665 move.b $r0,[R_SERIAL3_REC_CTRL] 666 667 ; Set up and enable the serial3 transmitter. 668 move.b IO_FIELD (R_SERIAL3_TR_CTRL, txd, 0) \ 669 | IO_STATE (R_SERIAL3_TR_CTRL, tr_enable, enable) \ 670 | IO_STATE (R_SERIAL3_TR_CTRL, auto_cts, disabled) \ 671 | IO_STATE (R_SERIAL3_TR_CTRL, stop_bits, one_bit) \ 672 | IO_STATE (R_SERIAL3_TR_CTRL, tr_stick_par, normal) \ 673 | IO_STATE (R_SERIAL3_TR_CTRL, tr_par, even) \ 674 | IO_STATE (R_SERIAL3_TR_CTRL, tr_par_en, disable) \ 675 | IO_STATE (R_SERIAL3_TR_CTRL, tr_bitnr, tr_8bit),$r0 676 move.b $r0,[R_SERIAL3_TR_CTRL] 677#endif 678 679#endif /* CONFIG_SVINTO_SIM */ 680 681 jump start_kernel ; jump into the C-function start_kernel in init/main.c 682 683 .data 684etrax_irv: 685 .dword 0 686romfs_start: 687 .dword 0 688romfs_length: 689 .dword 0 690romfs_in_flash: 691 .dword 0 692 693 ;; put some special pages at the beginning of the kernel aligned 694 ;; to page boundaries - the kernel cannot start until after this 695 696#ifdef CONFIG_CRIS_LOW_MAP 697swapper_pg_dir = 0x60002000 698#else 699swapper_pg_dir = 0xc0002000 700#endif 701 702 .section ".init.data", "aw" 703#include "../lib/hw_settings.S" 704