1/*!*************************************************************************** 2*! 3*! FILE NAME : ds1302.c 4*! 5*! DESCRIPTION: Implements an interface for the DS1302 RTC through Etrax I/O 6*! 7*! Functions exported: ds1302_readreg, ds1302_writereg, ds1302_init 8*! 9*! --------------------------------------------------------------------------- 10*! 11*! (C) Copyright 1999-2007 Axis Communications AB, LUND, SWEDEN 12*! 13*!***************************************************************************/ 14 15 16#include <linux/fs.h> 17#include <linux/init.h> 18#include <linux/mm.h> 19#include <linux/module.h> 20#include <linux/miscdevice.h> 21#include <linux/delay.h> 22#include <linux/smp_lock.h> 23#include <linux/bcd.h> 24#include <linux/capability.h> 25 26#include <asm/uaccess.h> 27#include <asm/system.h> 28#include <arch/svinto.h> 29#include <asm/io.h> 30#include <asm/rtc.h> 31#include <arch/io_interface_mux.h> 32 33#include "i2c.h" 34 35#define RTC_MAJOR_NR 121 /* local major, change later */ 36 37static const char ds1302_name[] = "ds1302"; 38 39/* The DS1302 might be connected to different bits on different products. 40 * It has three signals - SDA, SCL and RST. RST and SCL are always outputs, 41 * but SDA can have a selected direction. 42 * For now, only PORT_PB is hardcoded. 43 */ 44 45/* The RST bit may be on either the Generic Port or Port PB. */ 46#ifdef CONFIG_ETRAX_DS1302_RST_ON_GENERIC_PORT 47#define TK_RST_OUT(x) REG_SHADOW_SET(R_PORT_G_DATA, port_g_data_shadow, CONFIG_ETRAX_DS1302_RSTBIT, x) 48#define TK_RST_DIR(x) 49#else 50#define TK_RST_OUT(x) REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, CONFIG_ETRAX_DS1302_RSTBIT, x) 51#define TK_RST_DIR(x) REG_SHADOW_SET(R_PORT_PB_DIR, port_pb_dir_shadow, CONFIG_ETRAX_DS1302_RSTBIT, x) 52#endif 53 54 55#define TK_SDA_OUT(x) REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, CONFIG_ETRAX_DS1302_SDABIT, x) 56#define TK_SCL_OUT(x) REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, CONFIG_ETRAX_DS1302_SCLBIT, x) 57 58#define TK_SDA_IN() ((*R_PORT_PB_READ >> CONFIG_ETRAX_DS1302_SDABIT) & 1) 59/* 1 is out, 0 is in */ 60#define TK_SDA_DIR(x) REG_SHADOW_SET(R_PORT_PB_DIR, port_pb_dir_shadow, CONFIG_ETRAX_DS1302_SDABIT, x) 61#define TK_SCL_DIR(x) REG_SHADOW_SET(R_PORT_PB_DIR, port_pb_dir_shadow, CONFIG_ETRAX_DS1302_SCLBIT, x) 62 63 64/* 65 * The reason for tempudelay and not udelay is that loops_per_usec 66 * (used in udelay) is not set when functions here are called from time.c 67 */ 68 69static void tempudelay(int usecs) 70{ 71 volatile int loops; 72 73 for(loops = usecs * 12; loops > 0; loops--) 74 /* nothing */; 75} 76 77 78/* Send 8 bits. */ 79static void 80out_byte(unsigned char x) 81{ 82 int i; 83 TK_SDA_DIR(1); 84 for (i = 8; i--;) { 85 /* The chip latches incoming bits on the rising edge of SCL. */ 86 TK_SCL_OUT(0); 87 TK_SDA_OUT(x & 1); 88 tempudelay(1); 89 TK_SCL_OUT(1); 90 tempudelay(1); 91 x >>= 1; 92 } 93 TK_SDA_DIR(0); 94} 95 96static unsigned char 97in_byte(void) 98{ 99 unsigned char x = 0; 100 int i; 101 102 /* Read byte. Bits come LSB first, on the falling edge of SCL. 103 * Assume SDA is in input direction already. 104 */ 105 TK_SDA_DIR(0); 106 107 for (i = 8; i--;) { 108 TK_SCL_OUT(0); 109 tempudelay(1); 110 x >>= 1; 111 x |= (TK_SDA_IN() << 7); 112 TK_SCL_OUT(1); 113 tempudelay(1); 114 } 115 116 return x; 117} 118 119/* Prepares for a transaction by de-activating RST (active-low). */ 120 121static void 122start(void) 123{ 124 TK_SCL_OUT(0); 125 tempudelay(1); 126 TK_RST_OUT(0); 127 tempudelay(5); 128 TK_RST_OUT(1); 129} 130 131/* Ends a transaction by taking RST active again. */ 132 133static void 134stop(void) 135{ 136 tempudelay(2); 137 TK_RST_OUT(0); 138} 139 140/* Enable writing. */ 141 142static void 143ds1302_wenable(void) 144{ 145 start(); 146 out_byte(0x8e); /* Write control register */ 147 out_byte(0x00); /* Disable write protect bit 7 = 0 */ 148 stop(); 149} 150 151/* Disable writing. */ 152 153static void 154ds1302_wdisable(void) 155{ 156 start(); 157 out_byte(0x8e); /* Write control register */ 158 out_byte(0x80); /* Disable write protect bit 7 = 0 */ 159 stop(); 160} 161 162 163 164/* Read a byte from the selected register in the DS1302. */ 165 166unsigned char 167ds1302_readreg(int reg) 168{ 169 unsigned char x; 170 171 start(); 172 out_byte(0x81 | (reg << 1)); /* read register */ 173 x = in_byte(); 174 stop(); 175 176 return x; 177} 178 179/* Write a byte to the selected register. */ 180 181void 182ds1302_writereg(int reg, unsigned char val) 183{ 184#ifndef CONFIG_ETRAX_RTC_READONLY 185 int do_writereg = 1; 186#else 187 int do_writereg = 0; 188 189 if (reg == RTC_TRICKLECHARGER) 190 do_writereg = 1; 191#endif 192 193 if (do_writereg) { 194 ds1302_wenable(); 195 start(); 196 out_byte(0x80 | (reg << 1)); /* write register */ 197 out_byte(val); 198 stop(); 199 ds1302_wdisable(); 200 } 201} 202 203void 204get_rtc_time(struct rtc_time *rtc_tm) 205{ 206 unsigned long flags; 207 208 local_irq_save(flags); 209 210 rtc_tm->tm_sec = CMOS_READ(RTC_SECONDS); 211 rtc_tm->tm_min = CMOS_READ(RTC_MINUTES); 212 rtc_tm->tm_hour = CMOS_READ(RTC_HOURS); 213 rtc_tm->tm_mday = CMOS_READ(RTC_DAY_OF_MONTH); 214 rtc_tm->tm_mon = CMOS_READ(RTC_MONTH); 215 rtc_tm->tm_year = CMOS_READ(RTC_YEAR); 216 217 local_irq_restore(flags); 218 219 rtc_tm->tm_sec = bcd2bin(rtc_tm->tm_sec); 220 rtc_tm->tm_min = bcd2bin(rtc_tm->tm_min); 221 rtc_tm->tm_hour = bcd2bin(rtc_tm->tm_hour); 222 rtc_tm->tm_mday = bcd2bin(rtc_tm->tm_mday); 223 rtc_tm->tm_mon = bcd2bin(rtc_tm->tm_mon); 224 rtc_tm->tm_year = bcd2bin(rtc_tm->tm_year); 225 226 /* 227 * Account for differences between how the RTC uses the values 228 * and how they are defined in a struct rtc_time; 229 */ 230 231 if (rtc_tm->tm_year <= 69) 232 rtc_tm->tm_year += 100; 233 234 rtc_tm->tm_mon--; 235} 236 237static unsigned char days_in_mo[] = 238 {0, 31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31}; 239 240/* ioctl that supports RTC_RD_TIME and RTC_SET_TIME (read and set time/date). */ 241 242static int rtc_ioctl(struct file *file, unsigned int cmd, unsigned long arg) 243{ 244 unsigned long flags; 245 246 switch(cmd) { 247 case RTC_RD_TIME: /* read the time/date from RTC */ 248 { 249 struct rtc_time rtc_tm; 250 251 memset(&rtc_tm, 0, sizeof (struct rtc_time)); 252 get_rtc_time(&rtc_tm); 253 if (copy_to_user((struct rtc_time*)arg, &rtc_tm, sizeof(struct rtc_time))) 254 return -EFAULT; 255 return 0; 256 } 257 258 case RTC_SET_TIME: /* set the RTC */ 259 { 260 struct rtc_time rtc_tm; 261 unsigned char mon, day, hrs, min, sec, leap_yr; 262 unsigned int yrs; 263 264 if (!capable(CAP_SYS_TIME)) 265 return -EPERM; 266 267 if (copy_from_user(&rtc_tm, (struct rtc_time*)arg, sizeof(struct rtc_time))) 268 return -EFAULT; 269 270 yrs = rtc_tm.tm_year + 1900; 271 mon = rtc_tm.tm_mon + 1; /* tm_mon starts at zero */ 272 day = rtc_tm.tm_mday; 273 hrs = rtc_tm.tm_hour; 274 min = rtc_tm.tm_min; 275 sec = rtc_tm.tm_sec; 276 277 278 if ((yrs < 1970) || (yrs > 2069)) 279 return -EINVAL; 280 281 leap_yr = ((!(yrs % 4) && (yrs % 100)) || !(yrs % 400)); 282 283 if ((mon > 12) || (day == 0)) 284 return -EINVAL; 285 286 if (day > (days_in_mo[mon] + ((mon == 2) && leap_yr))) 287 return -EINVAL; 288 289 if ((hrs >= 24) || (min >= 60) || (sec >= 60)) 290 return -EINVAL; 291 292 if (yrs >= 2000) 293 yrs -= 2000; /* RTC (0, 1, ... 69) */ 294 else 295 yrs -= 1900; /* RTC (70, 71, ... 99) */ 296 297 sec = bin2bcd(sec); 298 min = bin2bcd(min); 299 hrs = bin2bcd(hrs); 300 day = bin2bcd(day); 301 mon = bin2bcd(mon); 302 yrs = bin2bcd(yrs); 303 304 local_irq_save(flags); 305 CMOS_WRITE(yrs, RTC_YEAR); 306 CMOS_WRITE(mon, RTC_MONTH); 307 CMOS_WRITE(day, RTC_DAY_OF_MONTH); 308 CMOS_WRITE(hrs, RTC_HOURS); 309 CMOS_WRITE(min, RTC_MINUTES); 310 CMOS_WRITE(sec, RTC_SECONDS); 311 local_irq_restore(flags); 312 313 /* Notice that at this point, the RTC is updated but 314 * the kernel is still running with the old time. 315 * You need to set that separately with settimeofday 316 * or adjtimex. 317 */ 318 return 0; 319 } 320 321 case RTC_SET_CHARGE: /* set the RTC TRICKLE CHARGE register */ 322 { 323 int tcs_val; 324 325 if (!capable(CAP_SYS_TIME)) 326 return -EPERM; 327 328 if(copy_from_user(&tcs_val, (int*)arg, sizeof(int))) 329 return -EFAULT; 330 331 tcs_val = RTC_TCR_PATTERN | (tcs_val & 0x0F); 332 ds1302_writereg(RTC_TRICKLECHARGER, tcs_val); 333 return 0; 334 } 335 case RTC_VL_READ: 336 { 337 /* TODO: 338 * Implement voltage low detection support 339 */ 340 printk(KERN_WARNING "DS1302: RTC Voltage Low detection" 341 " is not supported\n"); 342 return 0; 343 } 344 case RTC_VL_CLR: 345 { 346 /* TODO: 347 * Nothing to do since Voltage Low detection is not supported 348 */ 349 return 0; 350 } 351 default: 352 return -ENOIOCTLCMD; 353 } 354} 355 356static long rtc_unlocked_ioctl(struct file *file, unsigned int cmd, unsigned long arg) 357{ 358 int ret; 359 360 lock_kernel(); 361 ret = rtc_ioctl(file, cmd, arg); 362 unlock_kernel(); 363 364 return ret; 365} 366 367static void 368print_rtc_status(void) 369{ 370 struct rtc_time tm; 371 372 get_rtc_time(&tm); 373 374 /* 375 * There is no way to tell if the luser has the RTC set for local 376 * time or for Universal Standard Time (GMT). Probably local though. 377 */ 378 379 printk(KERN_INFO "rtc_time\t: %02d:%02d:%02d\n", 380 tm.tm_hour, tm.tm_min, tm.tm_sec); 381 printk(KERN_INFO "rtc_date\t: %04d-%02d-%02d\n", 382 tm.tm_year + 1900, tm.tm_mon + 1, tm.tm_mday); 383} 384 385/* The various file operations we support. */ 386 387static const struct file_operations rtc_fops = { 388 .owner = THIS_MODULE, 389 .unlocked_ioctl = rtc_unlocked_ioctl, 390}; 391 392/* Probe for the chip by writing something to its RAM and try reading it back. */ 393 394#define MAGIC_PATTERN 0x42 395 396static int __init 397ds1302_probe(void) 398{ 399 int retval, res; 400 401 TK_RST_DIR(1); 402 TK_SCL_DIR(1); 403 TK_SDA_DIR(0); 404 405 /* Try to talk to timekeeper. */ 406 407 ds1302_wenable(); 408 start(); 409 out_byte(0xc0); /* write RAM byte 0 */ 410 out_byte(MAGIC_PATTERN); /* write something magic */ 411 start(); 412 out_byte(0xc1); /* read RAM byte 0 */ 413 414 if((res = in_byte()) == MAGIC_PATTERN) { 415 stop(); 416 ds1302_wdisable(); 417 printk(KERN_INFO "%s: RTC found.\n", ds1302_name); 418 printk(KERN_INFO "%s: SDA, SCL, RST on PB%i, PB%i, %s%i\n", 419 ds1302_name, 420 CONFIG_ETRAX_DS1302_SDABIT, 421 CONFIG_ETRAX_DS1302_SCLBIT, 422#ifdef CONFIG_ETRAX_DS1302_RST_ON_GENERIC_PORT 423 "GENIO", 424#else 425 "PB", 426#endif 427 CONFIG_ETRAX_DS1302_RSTBIT); 428 print_rtc_status(); 429 retval = 1; 430 } else { 431 stop(); 432 retval = 0; 433 } 434 435 return retval; 436} 437 438 439/* Just probe for the RTC and register the device to handle the ioctl needed. */ 440 441int __init 442ds1302_init(void) 443{ 444#ifdef CONFIG_ETRAX_I2C 445 i2c_init(); 446#endif 447 448 if (!ds1302_probe()) { 449#ifdef CONFIG_ETRAX_DS1302_RST_ON_GENERIC_PORT 450#if CONFIG_ETRAX_DS1302_RSTBIT == 27 451 /* 452 * The only way to set g27 to output is to enable ATA. 453 * 454 * Make sure that R_GEN_CONFIG is setup correct. 455 */ 456 /* Allocating the ATA interface will grab almost all 457 * pins in I/O groups a, b, c and d. A consequence of 458 * allocating the ATA interface is that the fixed 459 * interfaces shared RAM, parallel port 0, parallel 460 * port 1, parallel port W, SCSI-8 port 0, SCSI-8 port 461 * 1, SCSI-W, serial port 2, serial port 3, 462 * synchronous serial port 3 and USB port 2 and almost 463 * all GPIO pins on port g cannot be used. 464 */ 465 if (cris_request_io_interface(if_ata, "ds1302/ATA")) { 466 printk(KERN_WARNING "ds1302: Failed to get IO interface\n"); 467 return -1; 468 } 469 470#elif CONFIG_ETRAX_DS1302_RSTBIT == 0 471 if (cris_io_interface_allocate_pins(if_gpio_grp_a, 472 'g', 473 CONFIG_ETRAX_DS1302_RSTBIT, 474 CONFIG_ETRAX_DS1302_RSTBIT)) { 475 printk(KERN_WARNING "ds1302: Failed to get IO interface\n"); 476 return -1; 477 } 478 479 /* Set the direction of this bit to out. */ 480 genconfig_shadow = ((genconfig_shadow & 481 ~IO_MASK(R_GEN_CONFIG, g0dir)) | 482 (IO_STATE(R_GEN_CONFIG, g0dir, out))); 483 *R_GEN_CONFIG = genconfig_shadow; 484#endif 485 if (!ds1302_probe()) { 486 printk(KERN_WARNING "%s: RTC not found.\n", ds1302_name); 487 return -1; 488 } 489#else 490 printk(KERN_WARNING "%s: RTC not found.\n", ds1302_name); 491 return -1; 492#endif 493 } 494 /* Initialise trickle charger */ 495 ds1302_writereg(RTC_TRICKLECHARGER, 496 RTC_TCR_PATTERN |(CONFIG_ETRAX_DS1302_TRICKLE_CHARGE & 0x0F)); 497 /* Start clock by resetting CLOCK_HALT */ 498 ds1302_writereg(RTC_SECONDS, (ds1302_readreg(RTC_SECONDS) & 0x7F)); 499 return 0; 500} 501 502static int __init ds1302_register(void) 503{ 504 ds1302_init(); 505 if (register_chrdev(RTC_MAJOR_NR, ds1302_name, &rtc_fops)) { 506 printk(KERN_INFO "%s: unable to get major %d for rtc\n", 507 ds1302_name, RTC_MAJOR_NR); 508 return -1; 509 } 510 return 0; 511 512} 513 514module_init(ds1302_register); 515