1/* mach/dma.h - arch-specific DMA defines 2 * 3 * Copyright 2004-2008 Analog Devices Inc. 4 * 5 * Licensed under the GPL-2 or later. 6 */ 7 8#ifndef _MACH_DMA_H_ 9#define _MACH_DMA_H_ 10 11#define CH_SPORT0_RX 0 12#define CH_SPORT0_TX 1 13#define CH_SPORT1_RX 2 14#define CH_SPORT1_TX 3 15#define CH_SPI0 4 16#define CH_SPI1 5 17#define CH_UART0_RX 6 18#define CH_UART0_TX 7 19#define CH_UART1_RX 8 20#define CH_UART1_TX 9 21#define CH_ATAPI_RX 10 22#define CH_ATAPI_TX 11 23#define CH_EPPI0 12 24#define CH_EPPI1 13 25#define CH_EPPI2 14 26#define CH_PIXC_IMAGE 15 27#define CH_PIXC_OVERLAY 16 28#define CH_PIXC_OUTPUT 17 29#define CH_SPORT2_RX 18 30#define CH_UART2_RX 18 31#define CH_SPORT2_TX 19 32#define CH_UART2_TX 19 33#define CH_SPORT3_RX 20 34#define CH_UART3_RX 20 35#define CH_SPORT3_TX 21 36#define CH_UART3_TX 21 37#define CH_SDH 22 38#define CH_NFC 22 39#define CH_SPI2 23 40 41#define CH_MEM_STREAM0_DEST 24 42#define CH_MEM_STREAM0_SRC 25 43#define CH_MEM_STREAM1_DEST 26 44#define CH_MEM_STREAM1_SRC 27 45#define CH_MEM_STREAM2_DEST 28 46#define CH_MEM_STREAM2_SRC 29 47#define CH_MEM_STREAM3_DEST 30 48#define CH_MEM_STREAM3_SRC 31 49 50#define MAX_DMA_CHANNELS 32 51 52#endif 53