1/* 2 * Copyright 2004-2009 Analog Devices Inc. 3 * 2007 David Rowe 4 * 2006 Intratrade Ltd. 5 * Ivan Danov <idanov@gmail.com> 6 * 2005 National ICT Australia (NICTA) 7 * Aidan Williams <aidan@nicta.com.au> 8 * 9 * Licensed under the GPL-2 or later. 10 */ 11 12#include <linux/device.h> 13#include <linux/platform_device.h> 14#include <linux/mtd/mtd.h> 15#include <linux/mtd/partitions.h> 16#include <linux/spi/spi.h> 17#include <linux/spi/flash.h> 18#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) 19#include <linux/usb/isp1362.h> 20#endif 21#include <asm/irq.h> 22#include <asm/dma.h> 23#include <asm/bfin5xx_spi.h> 24#include <asm/portmux.h> 25 26/* 27 * Name the Board for the /proc/cpuinfo 28 */ 29const char bfin_board_name[] = "IP04/IP08"; 30 31/* 32 * Driver needs to know address, irq and flag pin. 33 */ 34#if defined(CONFIG_BFIN532_IP0X) 35#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE) 36 37#include <linux/dm9000.h> 38 39static struct resource dm9000_resource1[] = { 40 { 41 .start = 0x20100000, 42 .end = 0x20100000 + 1, 43 .flags = IORESOURCE_MEM 44 },{ 45 .start = 0x20100000 + 2, 46 .end = 0x20100000 + 3, 47 .flags = IORESOURCE_MEM 48 },{ 49 .start = IRQ_PF15, 50 .end = IRQ_PF15, 51 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE 52 } 53}; 54 55static struct resource dm9000_resource2[] = { 56 { 57 .start = 0x20200000, 58 .end = 0x20200000 + 1, 59 .flags = IORESOURCE_MEM 60 },{ 61 .start = 0x20200000 + 2, 62 .end = 0x20200000 + 3, 63 .flags = IORESOURCE_MEM 64 },{ 65 .start = IRQ_PF14, 66 .end = IRQ_PF14, 67 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE 68 } 69}; 70 71/* 72* for the moment we limit ourselves to 16bit IO until some 73* better IO routines can be written and tested 74*/ 75static struct dm9000_plat_data dm9000_platdata1 = { 76 .flags = DM9000_PLATF_16BITONLY, 77}; 78 79static struct platform_device dm9000_device1 = { 80 .name = "dm9000", 81 .id = 0, 82 .num_resources = ARRAY_SIZE(dm9000_resource1), 83 .resource = dm9000_resource1, 84 .dev = { 85 .platform_data = &dm9000_platdata1, 86 } 87}; 88 89static struct dm9000_plat_data dm9000_platdata2 = { 90 .flags = DM9000_PLATF_16BITONLY, 91}; 92 93static struct platform_device dm9000_device2 = { 94 .name = "dm9000", 95 .id = 1, 96 .num_resources = ARRAY_SIZE(dm9000_resource2), 97 .resource = dm9000_resource2, 98 .dev = { 99 .platform_data = &dm9000_platdata2, 100 } 101}; 102 103#endif 104#endif 105 106 107#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) 108/* all SPI peripherals info goes here */ 109 110#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) 111static struct bfin5xx_spi_chip mmc_spi_chip_info = { 112 .enable_dma = 0, /* if 1 - block!!! */ 113 .bits_per_word = 8, 114}; 115#endif 116 117/* Notice: for blackfin, the speed_hz is the value of register 118 * SPI_BAUD, not the real baudrate */ 119static struct spi_board_info bfin_spi_board_info[] __initdata = { 120#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) 121 { 122 .modalias = "mmc_spi", 123 .max_speed_hz = 2, 124 .bus_num = 1, 125 .chip_select = 5, 126 .controller_data = &mmc_spi_chip_info, 127 }, 128#endif 129}; 130 131/* SPI controller data */ 132static struct bfin5xx_spi_master spi_bfin_master_info = { 133 .num_chipselect = 8, 134 .enable_dma = 1, /* master has the ability to do dma transfer */ 135}; 136 137static struct platform_device spi_bfin_master_device = { 138 .name = "bfin-spi-master", 139 .id = 1, /* Bus number */ 140 .dev = { 141 .platform_data = &spi_bfin_master_info, /* Passed to driver */ 142 }, 143}; 144#endif /* spi master and devices */ 145 146#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) 147#ifdef CONFIG_SERIAL_BFIN_UART0 148static struct resource bfin_uart0_resources[] = { 149 { 150 .start = BFIN_UART_THR, 151 .end = BFIN_UART_GCTL+2, 152 .flags = IORESOURCE_MEM, 153 }, 154 { 155 .start = IRQ_UART0_RX, 156 .end = IRQ_UART0_RX + 1, 157 .flags = IORESOURCE_IRQ, 158 }, 159 { 160 .start = IRQ_UART0_ERROR, 161 .end = IRQ_UART0_ERROR, 162 .flags = IORESOURCE_IRQ, 163 }, 164 { 165 .start = CH_UART0_TX, 166 .end = CH_UART0_TX, 167 .flags = IORESOURCE_DMA, 168 }, 169 { 170 .start = CH_UART0_RX, 171 .end = CH_UART0_RX, 172 .flags = IORESOURCE_DMA, 173 }, 174}; 175 176unsigned short bfin_uart0_peripherals[] = { 177 P_UART0_TX, P_UART0_RX, 0 178}; 179 180static struct platform_device bfin_uart0_device = { 181 .name = "bfin-uart", 182 .id = 0, 183 .num_resources = ARRAY_SIZE(bfin_uart0_resources), 184 .resource = bfin_uart0_resources, 185 .dev = { 186 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */ 187 }, 188}; 189#endif 190#endif 191 192#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE) 193#ifdef CONFIG_BFIN_SIR0 194static struct resource bfin_sir0_resources[] = { 195 { 196 .start = 0xFFC00400, 197 .end = 0xFFC004FF, 198 .flags = IORESOURCE_MEM, 199 }, 200 { 201 .start = IRQ_UART0_RX, 202 .end = IRQ_UART0_RX+1, 203 .flags = IORESOURCE_IRQ, 204 }, 205 { 206 .start = CH_UART0_RX, 207 .end = CH_UART0_RX+1, 208 .flags = IORESOURCE_DMA, 209 }, 210}; 211 212static struct platform_device bfin_sir0_device = { 213 .name = "bfin_sir", 214 .id = 0, 215 .num_resources = ARRAY_SIZE(bfin_sir0_resources), 216 .resource = bfin_sir0_resources, 217}; 218#endif 219#endif 220 221#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) 222static struct resource isp1362_hcd_resources[] = { 223 { 224 .start = 0x20300000, 225 .end = 0x20300000 + 1, 226 .flags = IORESOURCE_MEM, 227 },{ 228 .start = 0x20300000 + 2, 229 .end = 0x20300000 + 3, 230 .flags = IORESOURCE_MEM, 231 },{ 232 .start = IRQ_PF11, 233 .end = IRQ_PF11, 234 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, 235 }, 236}; 237 238static struct isp1362_platform_data isp1362_priv = { 239 .sel15Kres = 1, 240 .clknotstop = 0, 241 .oc_enable = 0, /* external OC */ 242 .int_act_high = 0, 243 .int_edge_triggered = 0, 244 .remote_wakeup_connected = 0, 245 .no_power_switching = 1, 246 .power_switching_mode = 0, 247}; 248 249static struct platform_device isp1362_hcd_device = { 250 .name = "isp1362-hcd", 251 .id = 0, 252 .dev = { 253 .platform_data = &isp1362_priv, 254 }, 255 .num_resources = ARRAY_SIZE(isp1362_hcd_resources), 256 .resource = isp1362_hcd_resources, 257}; 258#endif 259 260 261static struct platform_device *ip0x_devices[] __initdata = { 262#if defined(CONFIG_BFIN532_IP0X) 263#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE) 264 &dm9000_device1, 265 &dm9000_device2, 266#endif 267#endif 268 269#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) 270 &spi_bfin_master_device, 271#endif 272 273#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) 274#ifdef CONFIG_SERIAL_BFIN_UART0 275 &bfin_uart0_device, 276#endif 277#endif 278 279#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE) 280#ifdef CONFIG_BFIN_SIR0 281 &bfin_sir0_device, 282#endif 283#endif 284 285#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) 286 &isp1362_hcd_device, 287#endif 288}; 289 290static int __init ip0x_init(void) 291{ 292 int i; 293 294 printk(KERN_INFO "%s(): registering device resources\n", __func__); 295 platform_add_devices(ip0x_devices, ARRAY_SIZE(ip0x_devices)); 296 297#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) 298 for (i = 0; i < ARRAY_SIZE(bfin_spi_board_info); ++i) { 299 int j = 1 << bfin_spi_board_info[i].chip_select; 300 /* set spi cs to 1 */ 301 bfin_write_FIO_DIR(bfin_read_FIO_DIR() | j); 302 bfin_write_FIO_FLAG_S(j); 303 } 304 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info)); 305#endif 306 307 return 0; 308} 309 310arch_initcall(ip0x_init); 311 312static struct platform_device *ip0x_early_devices[] __initdata = { 313#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK) 314#ifdef CONFIG_SERIAL_BFIN_UART0 315 &bfin_uart0_device, 316#endif 317#endif 318}; 319 320void __init native_machine_early_platform_add_devices(void) 321{ 322 printk(KERN_INFO "register early platform devices\n"); 323 early_platform_add_devices(ip0x_early_devices, 324 ARRAY_SIZE(ip0x_early_devices)); 325} 326