1/* 2 * Copyright 2004-2009 Analog Devices Inc. 3 * 2008-2009 Bluetechnix 4 * 2005 National ICT Australia (NICTA) 5 * Aidan Williams <aidan@nicta.com.au> 6 * 7 * Licensed under the GPL-2 or later. 8 */ 9 10#include <linux/device.h> 11#include <linux/platform_device.h> 12#include <linux/mtd/mtd.h> 13#include <linux/mtd/partitions.h> 14#include <linux/mtd/physmap.h> 15#include <linux/spi/spi.h> 16#include <linux/spi/flash.h> 17#include <linux/spi/mmc_spi.h> 18#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) 19#include <linux/usb/isp1362.h> 20#endif 21#include <linux/irq.h> 22#include <asm/dma.h> 23#include <asm/bfin5xx_spi.h> 24#include <asm/portmux.h> 25#include <asm/dpmc.h> 26 27/* 28 * Name the Board for the /proc/cpuinfo 29 */ 30const char bfin_board_name[] = "Bluetechnix CM BF533"; 31 32#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) 33/* all SPI peripherals info goes here */ 34#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE) 35static struct mtd_partition bfin_spi_flash_partitions[] = { 36 { 37 .name = "bootloader(spi)", 38 .size = 0x00020000, 39 .offset = 0, 40 .mask_flags = MTD_CAP_ROM 41 }, { 42 .name = "linux kernel(spi)", 43 .size = 0xe0000, 44 .offset = 0x20000 45 }, { 46 .name = "file system(spi)", 47 .size = 0x700000, 48 .offset = 0x00100000, 49 } 50}; 51 52static struct flash_platform_data bfin_spi_flash_data = { 53 .name = "m25p80", 54 .parts = bfin_spi_flash_partitions, 55 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions), 56 .type = "m25p64", 57}; 58 59/* SPI flash chip (m25p64) */ 60static struct bfin5xx_spi_chip spi_flash_chip_info = { 61 .enable_dma = 0, /* use dma transfer with this chip*/ 62 .bits_per_word = 8, 63}; 64#endif 65 66/* SPI ADC chip */ 67#if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE) 68static struct bfin5xx_spi_chip spi_adc_chip_info = { 69 .enable_dma = 1, /* use dma transfer with this chip*/ 70 .bits_per_word = 16, 71}; 72#endif 73 74#if defined(CONFIG_SND_BLACKFIN_AD183X) || defined(CONFIG_SND_BLACKFIN_AD183X_MODULE) 75static struct bfin5xx_spi_chip ad1836_spi_chip_info = { 76 .enable_dma = 0, 77 .bits_per_word = 16, 78}; 79#endif 80 81#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) 82static struct bfin5xx_spi_chip mmc_spi_chip_info = { 83 .enable_dma = 0, 84 .bits_per_word = 8, 85}; 86#endif 87 88static struct spi_board_info bfin_spi_board_info[] __initdata = { 89#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE) 90 { 91 /* the modalias must be the same as spi device driver name */ 92 .modalias = "m25p80", /* Name of spi_driver for this device */ 93 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ 94 .bus_num = 0, /* Framework bus number */ 95 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/ 96 .platform_data = &bfin_spi_flash_data, 97 .controller_data = &spi_flash_chip_info, 98 .mode = SPI_MODE_3, 99 }, 100#endif 101 102#if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE) 103 { 104 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */ 105 .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */ 106 .bus_num = 0, /* Framework bus number */ 107 .chip_select = 2, /* Framework chip select. */ 108 .platform_data = NULL, /* No spi_driver specific config */ 109 .controller_data = &spi_adc_chip_info, 110 }, 111#endif 112 113#if defined(CONFIG_SND_BLACKFIN_AD183X) || defined(CONFIG_SND_BLACKFIN_AD183X_MODULE) 114 { 115 .modalias = "ad1836", 116 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ 117 .bus_num = 0, 118 .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT, 119 .controller_data = &ad1836_spi_chip_info, 120 }, 121#endif 122 123#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) 124 { 125 .modalias = "mmc_spi", 126 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */ 127 .bus_num = 0, 128 .chip_select = 1, 129 .controller_data = &mmc_spi_chip_info, 130 .mode = SPI_MODE_3, 131 }, 132#endif 133}; 134 135/* SPI (0) */ 136static struct resource bfin_spi0_resource[] = { 137 [0] = { 138 .start = SPI0_REGBASE, 139 .end = SPI0_REGBASE + 0xFF, 140 .flags = IORESOURCE_MEM, 141 }, 142 [1] = { 143 .start = CH_SPI, 144 .end = CH_SPI, 145 .flags = IORESOURCE_DMA, 146 }, 147 [2] = { 148 .start = IRQ_SPI, 149 .end = IRQ_SPI, 150 .flags = IORESOURCE_IRQ, 151 } 152}; 153 154/* SPI controller data */ 155static struct bfin5xx_spi_master bfin_spi0_info = { 156 .num_chipselect = 8, 157 .enable_dma = 1, /* master has the ability to do dma transfer */ 158 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0}, 159}; 160 161static struct platform_device bfin_spi0_device = { 162 .name = "bfin-spi", 163 .id = 0, /* Bus number */ 164 .num_resources = ARRAY_SIZE(bfin_spi0_resource), 165 .resource = bfin_spi0_resource, 166 .dev = { 167 .platform_data = &bfin_spi0_info, /* Passed to driver */ 168 }, 169}; 170#endif /* spi master and devices */ 171 172#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE) 173static struct platform_device rtc_device = { 174 .name = "rtc-bfin", 175 .id = -1, 176}; 177#endif 178 179#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) 180#include <linux/smc91x.h> 181 182static struct smc91x_platdata smc91x_info = { 183 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT, 184 .leda = RPC_LED_100_10, 185 .ledb = RPC_LED_TX_RX, 186}; 187 188static struct resource smc91x_resources[] = { 189 { 190 .start = 0x20200300, 191 .end = 0x20200300 + 16, 192 .flags = IORESOURCE_MEM, 193 }, { 194 .start = IRQ_PF0, 195 .end = IRQ_PF0, 196 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, 197 }, 198}; 199static struct platform_device smc91x_device = { 200 .name = "smc91x", 201 .id = 0, 202 .num_resources = ARRAY_SIZE(smc91x_resources), 203 .resource = smc91x_resources, 204 .dev = { 205 .platform_data = &smc91x_info, 206 }, 207}; 208#endif 209 210#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE) 211#include <linux/smsc911x.h> 212 213static struct resource smsc911x_resources[] = { 214 { 215 .name = "smsc911x-memory", 216 .start = 0x20308000, 217 .end = 0x20308000 + 0xFF, 218 .flags = IORESOURCE_MEM, 219 }, { 220 .start = IRQ_PF8, 221 .end = IRQ_PF8, 222 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL, 223 }, 224}; 225 226static struct smsc911x_platform_config smsc911x_config = { 227 .flags = SMSC911X_USE_16BIT, 228 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW, 229 .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN, 230 .phy_interface = PHY_INTERFACE_MODE_MII, 231}; 232 233static struct platform_device smsc911x_device = { 234 .name = "smsc911x", 235 .id = 0, 236 .num_resources = ARRAY_SIZE(smsc911x_resources), 237 .resource = smsc911x_resources, 238 .dev = { 239 .platform_data = &smsc911x_config, 240 }, 241}; 242#endif 243 244#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) 245#ifdef CONFIG_SERIAL_BFIN_UART0 246static struct resource bfin_uart0_resources[] = { 247 { 248 .start = BFIN_UART_THR, 249 .end = BFIN_UART_GCTL+2, 250 .flags = IORESOURCE_MEM, 251 }, 252 { 253 .start = IRQ_UART0_RX, 254 .end = IRQ_UART0_RX + 1, 255 .flags = IORESOURCE_IRQ, 256 }, 257 { 258 .start = IRQ_UART0_ERROR, 259 .end = IRQ_UART0_ERROR, 260 .flags = IORESOURCE_IRQ, 261 }, 262 { 263 .start = CH_UART0_TX, 264 .end = CH_UART0_TX, 265 .flags = IORESOURCE_DMA, 266 }, 267 { 268 .start = CH_UART0_RX, 269 .end = CH_UART0_RX, 270 .flags = IORESOURCE_DMA, 271 }, 272}; 273 274unsigned short bfin_uart0_peripherals[] = { 275 P_UART0_TX, P_UART0_RX, 0 276}; 277 278static struct platform_device bfin_uart0_device = { 279 .name = "bfin-uart", 280 .id = 0, 281 .num_resources = ARRAY_SIZE(bfin_uart0_resources), 282 .resource = bfin_uart0_resources, 283 .dev = { 284 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */ 285 }, 286}; 287#endif 288#endif 289 290#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE) 291#ifdef CONFIG_BFIN_SIR0 292static struct resource bfin_sir0_resources[] = { 293 { 294 .start = 0xFFC00400, 295 .end = 0xFFC004FF, 296 .flags = IORESOURCE_MEM, 297 }, 298 { 299 .start = IRQ_UART0_RX, 300 .end = IRQ_UART0_RX+1, 301 .flags = IORESOURCE_IRQ, 302 }, 303 { 304 .start = CH_UART0_RX, 305 .end = CH_UART0_RX+1, 306 .flags = IORESOURCE_DMA, 307 }, 308}; 309 310static struct platform_device bfin_sir0_device = { 311 .name = "bfin_sir", 312 .id = 0, 313 .num_resources = ARRAY_SIZE(bfin_sir0_resources), 314 .resource = bfin_sir0_resources, 315}; 316#endif 317#endif 318 319#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) 320#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART 321static struct resource bfin_sport0_uart_resources[] = { 322 { 323 .start = SPORT0_TCR1, 324 .end = SPORT0_MRCS3+4, 325 .flags = IORESOURCE_MEM, 326 }, 327 { 328 .start = IRQ_SPORT0_RX, 329 .end = IRQ_SPORT0_RX+1, 330 .flags = IORESOURCE_IRQ, 331 }, 332 { 333 .start = IRQ_SPORT0_ERROR, 334 .end = IRQ_SPORT0_ERROR, 335 .flags = IORESOURCE_IRQ, 336 }, 337}; 338 339unsigned short bfin_sport0_peripherals[] = { 340 P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS, 341 P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0 342}; 343 344static struct platform_device bfin_sport0_uart_device = { 345 .name = "bfin-sport-uart", 346 .id = 0, 347 .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources), 348 .resource = bfin_sport0_uart_resources, 349 .dev = { 350 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */ 351 }, 352}; 353#endif 354#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART 355static struct resource bfin_sport1_uart_resources[] = { 356 { 357 .start = SPORT1_TCR1, 358 .end = SPORT1_MRCS3+4, 359 .flags = IORESOURCE_MEM, 360 }, 361 { 362 .start = IRQ_SPORT1_RX, 363 .end = IRQ_SPORT1_RX+1, 364 .flags = IORESOURCE_IRQ, 365 }, 366 { 367 .start = IRQ_SPORT1_ERROR, 368 .end = IRQ_SPORT1_ERROR, 369 .flags = IORESOURCE_IRQ, 370 }, 371}; 372 373unsigned short bfin_sport1_peripherals[] = { 374 P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS, 375 P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_DRSEC, P_SPORT1_DTSEC, 0 376}; 377 378static struct platform_device bfin_sport1_uart_device = { 379 .name = "bfin-sport-uart", 380 .id = 1, 381 .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources), 382 .resource = bfin_sport1_uart_resources, 383 .dev = { 384 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */ 385 }, 386}; 387#endif 388#endif 389 390#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) 391static struct resource isp1362_hcd_resources[] = { 392 { 393 .start = 0x20308000, 394 .end = 0x20308000, 395 .flags = IORESOURCE_MEM, 396 }, { 397 .start = 0x20308004, 398 .end = 0x20308004, 399 .flags = IORESOURCE_MEM, 400 }, { 401 .start = IRQ_PF4, 402 .end = IRQ_PF4, 403 .flags = IORESOURCE_IRQ, 404 }, 405}; 406 407static struct isp1362_platform_data isp1362_priv = { 408 .sel15Kres = 1, 409 .clknotstop = 0, 410 .oc_enable = 0, 411 .int_act_high = 0, 412 .int_edge_triggered = 0, 413 .remote_wakeup_connected = 0, 414 .no_power_switching = 1, 415 .power_switching_mode = 0, 416}; 417 418static struct platform_device isp1362_hcd_device = { 419 .name = "isp1362-hcd", 420 .id = 0, 421 .dev = { 422 .platform_data = &isp1362_priv, 423 }, 424 .num_resources = ARRAY_SIZE(isp1362_hcd_resources), 425 .resource = isp1362_hcd_resources, 426}; 427#endif 428 429 430#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE) 431static struct resource net2272_bfin_resources[] = { 432 { 433 .start = 0x20300000, 434 .end = 0x20300000 + 0x100, 435 .flags = IORESOURCE_MEM, 436 }, { 437 .start = IRQ_PF6, 438 .end = IRQ_PF6, 439 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, 440 }, 441}; 442 443static struct platform_device net2272_bfin_device = { 444 .name = "net2272", 445 .id = -1, 446 .num_resources = ARRAY_SIZE(net2272_bfin_resources), 447 .resource = net2272_bfin_resources, 448}; 449#endif 450 451 452 453#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE) 454static struct mtd_partition para_partitions[] = { 455 { 456 .name = "bootloader(nor)", 457 .size = 0x40000, 458 .offset = 0, 459 }, { 460 .name = "linux+rootfs(nor)", 461 .size = MTDPART_SIZ_FULL, 462 .offset = MTDPART_OFS_APPEND, 463 }, 464}; 465 466static struct physmap_flash_data para_flash_data = { 467 .width = 2, 468 .parts = para_partitions, 469 .nr_parts = ARRAY_SIZE(para_partitions), 470}; 471 472static struct resource para_flash_resource = { 473 .start = 0x20000000, 474 .end = 0x201fffff, 475 .flags = IORESOURCE_MEM, 476}; 477 478static struct platform_device para_flash_device = { 479 .name = "physmap-flash", 480 .id = 0, 481 .dev = { 482 .platform_data = ¶_flash_data, 483 }, 484 .num_resources = 1, 485 .resource = ¶_flash_resource, 486}; 487#endif 488 489 490 491static const unsigned int cclk_vlev_datasheet[] = 492{ 493 VRPAIR(VLEV_085, 250000000), 494 VRPAIR(VLEV_090, 376000000), 495 VRPAIR(VLEV_095, 426000000), 496 VRPAIR(VLEV_100, 426000000), 497 VRPAIR(VLEV_105, 476000000), 498 VRPAIR(VLEV_110, 476000000), 499 VRPAIR(VLEV_115, 476000000), 500 VRPAIR(VLEV_120, 600000000), 501 VRPAIR(VLEV_125, 600000000), 502 VRPAIR(VLEV_130, 600000000), 503}; 504 505static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = { 506 .tuple_tab = cclk_vlev_datasheet, 507 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet), 508 .vr_settling_time = 25 /* us */, 509}; 510 511static struct platform_device bfin_dpmc = { 512 .name = "bfin dpmc", 513 .dev = { 514 .platform_data = &bfin_dmpc_vreg_data, 515 }, 516}; 517 518static struct platform_device *cm_bf533_devices[] __initdata = { 519 520 &bfin_dpmc, 521 522#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) 523#ifdef CONFIG_SERIAL_BFIN_UART0 524 &bfin_uart0_device, 525#endif 526#endif 527 528#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE) 529#ifdef CONFIG_BFIN_SIR0 530 &bfin_sir0_device, 531#endif 532#endif 533 534#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) 535#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART 536 &bfin_sport0_uart_device, 537#endif 538#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART 539 &bfin_sport1_uart_device, 540#endif 541#endif 542 543#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE) 544 &rtc_device, 545#endif 546 547#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) 548 &isp1362_hcd_device, 549#endif 550 551#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) 552 &smc91x_device, 553#endif 554 555#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE) 556 &smsc911x_device, 557#endif 558 559#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE) 560 &net2272_bfin_device, 561#endif 562 563#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) 564 &bfin_spi0_device, 565#endif 566 567#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE) 568 ¶_flash_device, 569#endif 570}; 571 572static int __init cm_bf533_init(void) 573{ 574 printk(KERN_INFO "%s(): registering device resources\n", __func__); 575 platform_add_devices(cm_bf533_devices, ARRAY_SIZE(cm_bf533_devices)); 576#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) 577 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info)); 578#endif 579 return 0; 580} 581 582arch_initcall(cm_bf533_init); 583 584static struct platform_device *cm_bf533_early_devices[] __initdata = { 585#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK) 586#ifdef CONFIG_SERIAL_BFIN_UART0 587 &bfin_uart0_device, 588#endif 589#endif 590 591#if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE) 592#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART 593 &bfin_sport0_uart_device, 594#endif 595#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART 596 &bfin_sport1_uart_device, 597#endif 598#endif 599}; 600 601void __init native_machine_early_platform_add_devices(void) 602{ 603 printk(KERN_INFO "register early platform devices\n"); 604 early_platform_add_devices(cm_bf533_early_devices, 605 ARRAY_SIZE(cm_bf533_early_devices)); 606} 607