1/* 2 * Common Blackfin memory map 3 * 4 * Copyright 2004-2009 Analog Devices Inc. 5 * Licensed under the GPL-2 or later. 6 */ 7 8#ifndef __BFIN_MEM_MAP_H__ 9#define __BFIN_MEM_MAP_H__ 10 11#include <mach/mem_map.h> 12 13/* Every Blackfin so far has MMRs like this */ 14#ifndef COREMMR_BASE 15# define COREMMR_BASE 0xFFE00000 16#endif 17#ifndef SYSMMR_BASE 18# define SYSMMR_BASE 0xFFC00000 19#endif 20 21/* Every Blackfin so far has on-chip Scratch Pad SRAM like this */ 22#ifndef L1_SCRATCH_START 23# define L1_SCRATCH_START 0xFFB00000 24# define L1_SCRATCH_LENGTH 0x1000 25#endif 26 27/* Most parts lack on-chip L2 SRAM */ 28#ifndef L2_START 29# define L2_START 0 30# define L2_LENGTH 0 31#endif 32 33/* Most parts lack on-chip L1 ROM */ 34#ifndef L1_ROM_START 35# define L1_ROM_START 0 36# define L1_ROM_LENGTH 0 37#endif 38 39/* Allow wonky SMP ports to override this */ 40#ifndef GET_PDA_SAFE 41# define GET_PDA_SAFE(preg) \ 42 preg.l = _cpu_pda; \ 43 preg.h = _cpu_pda; 44# define GET_PDA(preg, dreg) GET_PDA_SAFE(preg) 45 46# ifndef __ASSEMBLY__ 47 48static inline unsigned long get_l1_scratch_start_cpu(int cpu) 49{ 50 return L1_SCRATCH_START; 51} 52static inline unsigned long get_l1_code_start_cpu(int cpu) 53{ 54 return L1_CODE_START; 55} 56static inline unsigned long get_l1_data_a_start_cpu(int cpu) 57{ 58 return L1_DATA_A_START; 59} 60static inline unsigned long get_l1_data_b_start_cpu(int cpu) 61{ 62 return L1_DATA_B_START; 63} 64static inline unsigned long get_l1_scratch_start(void) 65{ 66 return get_l1_scratch_start_cpu(0); 67} 68static inline unsigned long get_l1_code_start(void) 69{ 70 return get_l1_code_start_cpu(0); 71} 72static inline unsigned long get_l1_data_a_start(void) 73{ 74 return get_l1_data_a_start_cpu(0); 75} 76static inline unsigned long get_l1_data_b_start(void) 77{ 78 return get_l1_data_b_start_cpu(0); 79} 80 81# endif /* __ASSEMBLY__ */ 82#endif /* !GET_PDA_SAFE */ 83 84#endif 85