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  • only in /netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/avr32/include/asm/
1/*
2 * Copyright (C) 2004-2006 Atmel Corporation
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8#ifndef __ASM_AVR32_PGTABLE_H
9#define __ASM_AVR32_PGTABLE_H
10
11#include <asm/addrspace.h>
12
13#ifndef __ASSEMBLY__
14#include <linux/sched.h>
15
16#endif /* !__ASSEMBLY__ */
17
18/*
19 * Use two-level page tables just as the i386 (without PAE)
20 */
21#include <asm/pgtable-2level.h>
22
23/*
24 * The following code might need some cleanup when the values are
25 * final...
26 */
27#define PMD_SIZE	(1UL << PMD_SHIFT)
28#define PMD_MASK	(~(PMD_SIZE-1))
29#define PGDIR_SIZE	(1UL << PGDIR_SHIFT)
30#define PGDIR_MASK	(~(PGDIR_SIZE-1))
31
32#define USER_PTRS_PER_PGD	(TASK_SIZE / PGDIR_SIZE)
33#define FIRST_USER_ADDRESS	0
34
35#ifndef __ASSEMBLY__
36extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
37extern void paging_init(void);
38
39/*
40 * ZERO_PAGE is a global shared page that is always zero: used for
41 * zero-mapped memory areas etc.
42 */
43extern struct page *empty_zero_page;
44#define ZERO_PAGE(vaddr) (empty_zero_page)
45
46/*
47 * Just any arbitrary offset to the start of the vmalloc VM area: the
48 * current 8 MiB value just means that there will be a 8 MiB "hole"
49 * after the uncached physical memory (P2 segment) until the vmalloc
50 * area starts. That means that any out-of-bounds memory accesses will
51 * hopefully be caught; we don't know if the end of the P1/P2 segments
52 * are actually used for anything, but it is anyway safer to let the
53 * MMU catch these kinds of errors than to rely on the memory bus.
54 *
55 * A "hole" of the same size is added to the end of the P3 segment as
56 * well. It might seem wasteful to use 16 MiB of virtual address space
57 * on this, but we do have 512 MiB of it...
58 *
59 * The vmalloc() routines leave a hole of 4 KiB between each vmalloced
60 * area for the same reason.
61 */
62#define VMALLOC_OFFSET	(8 * 1024 * 1024)
63#define VMALLOC_START	(P3SEG + VMALLOC_OFFSET)
64#define VMALLOC_END	(P4SEG - VMALLOC_OFFSET)
65#endif /* !__ASSEMBLY__ */
66
67/*
68 * Page flags. Some of these flags are not directly supported by
69 * hardware, so we have to emulate them.
70 */
71#define _TLBEHI_BIT_VALID	9
72#define _TLBEHI_VALID		(1 << _TLBEHI_BIT_VALID)
73
74#define _PAGE_BIT_WT		0  /* W-bit   : write-through */
75#define _PAGE_BIT_DIRTY		1  /* D-bit   : page changed */
76#define _PAGE_BIT_SZ0		2  /* SZ0-bit : Size of page */
77#define _PAGE_BIT_SZ1		3  /* SZ1-bit : Size of page */
78#define _PAGE_BIT_EXECUTE	4  /* X-bit   : execute access allowed */
79#define _PAGE_BIT_RW		5  /* AP0-bit : write access allowed */
80#define _PAGE_BIT_USER		6  /* AP1-bit : user space access allowed */
81#define _PAGE_BIT_BUFFER	7  /* B-bit   : bufferable */
82#define _PAGE_BIT_GLOBAL	8  /* G-bit   : global (ignore ASID) */
83#define _PAGE_BIT_CACHABLE	9  /* C-bit   : cachable */
84
85/* If we drop support for 1K pages, we get two extra bits */
86#define _PAGE_BIT_PRESENT	10
87#define _PAGE_BIT_ACCESSED	11 /* software: page was accessed */
88
89/* The following flags are only valid when !PRESENT */
90#define _PAGE_BIT_FILE		0 /* software: pagecache or swap? */
91
92#define _PAGE_WT		(1 << _PAGE_BIT_WT)
93#define _PAGE_DIRTY		(1 << _PAGE_BIT_DIRTY)
94#define _PAGE_EXECUTE		(1 << _PAGE_BIT_EXECUTE)
95#define _PAGE_RW		(1 << _PAGE_BIT_RW)
96#define _PAGE_USER		(1 << _PAGE_BIT_USER)
97#define _PAGE_BUFFER		(1 << _PAGE_BIT_BUFFER)
98#define _PAGE_GLOBAL		(1 << _PAGE_BIT_GLOBAL)
99#define _PAGE_CACHABLE		(1 << _PAGE_BIT_CACHABLE)
100
101/* Software flags */
102#define _PAGE_ACCESSED		(1 << _PAGE_BIT_ACCESSED)
103#define _PAGE_PRESENT		(1 << _PAGE_BIT_PRESENT)
104#define _PAGE_FILE		(1 << _PAGE_BIT_FILE)
105
106#define _PAGE_TYPE_MASK		((1 << _PAGE_BIT_SZ0) | (1 << _PAGE_BIT_SZ1))
107#define _PAGE_TYPE_NONE		(0 << _PAGE_BIT_SZ0)
108#define _PAGE_TYPE_SMALL	(1 << _PAGE_BIT_SZ0)
109#define _PAGE_TYPE_MEDIUM	(2 << _PAGE_BIT_SZ0)
110#define _PAGE_TYPE_LARGE	(3 << _PAGE_BIT_SZ0)
111
112/*
113 * Mask which drop software flags. We currently can't handle more than
114 * 512 MiB of physical memory, so we can use bits 29-31 for other
115 * stuff.  With a fixed 4K page size, we can use bits 10-11 as well as
116 * bits 2-3 (SZ)
117 */
118#define _PAGE_FLAGS_HARDWARE_MASK	0xfffff3ff
119
120#define _PAGE_FLAGS_CACHE_MASK	(_PAGE_CACHABLE | _PAGE_BUFFER | _PAGE_WT)
121
122/* Flags that may be modified by software */
123#define _PAGE_CHG_MASK		(PTE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY \
124				 | _PAGE_FLAGS_CACHE_MASK)
125
126#define _PAGE_FLAGS_READ	(_PAGE_CACHABLE	| _PAGE_BUFFER)
127#define _PAGE_FLAGS_WRITE	(_PAGE_FLAGS_READ | _PAGE_RW | _PAGE_DIRTY)
128
129#define _PAGE_NORMAL(x)	__pgprot((x) | _PAGE_PRESENT | _PAGE_TYPE_SMALL	\
130				 | _PAGE_ACCESSED)
131
132#define PAGE_NONE	(_PAGE_ACCESSED | _PAGE_TYPE_NONE)
133#define PAGE_READ	(_PAGE_FLAGS_READ | _PAGE_USER)
134#define PAGE_EXEC	(_PAGE_FLAGS_READ | _PAGE_EXECUTE | _PAGE_USER)
135#define PAGE_WRITE	(_PAGE_FLAGS_WRITE | _PAGE_USER)
136#define PAGE_KERNEL	_PAGE_NORMAL(_PAGE_FLAGS_WRITE | _PAGE_EXECUTE | _PAGE_GLOBAL)
137#define PAGE_KERNEL_RO	_PAGE_NORMAL(_PAGE_FLAGS_READ | _PAGE_EXECUTE | _PAGE_GLOBAL)
138
139#define _PAGE_P(x)	_PAGE_NORMAL((x) & ~(_PAGE_RW | _PAGE_DIRTY))
140#define _PAGE_S(x)	_PAGE_NORMAL(x)
141
142#define PAGE_COPY	_PAGE_P(PAGE_WRITE | PAGE_READ)
143#define PAGE_SHARED	_PAGE_S(PAGE_WRITE | PAGE_READ)
144
145#ifndef __ASSEMBLY__
146/*
147 * The hardware supports flags for write- and execute access. Read is
148 * always allowed if the page is loaded into the TLB, so the "-w-",
149 * "--x" and "-wx" mappings are implemented as "rw-", "r-x" and "rwx",
150 * respectively.
151 *
152 * The "---" case is handled by software; the page will simply not be
153 * loaded into the TLB if the page type is _PAGE_TYPE_NONE.
154 */
155
156#define __P000	__pgprot(PAGE_NONE)
157#define __P001	_PAGE_P(PAGE_READ)
158#define __P010	_PAGE_P(PAGE_WRITE)
159#define __P011	_PAGE_P(PAGE_WRITE | PAGE_READ)
160#define __P100	_PAGE_P(PAGE_EXEC)
161#define __P101	_PAGE_P(PAGE_EXEC | PAGE_READ)
162#define __P110	_PAGE_P(PAGE_EXEC | PAGE_WRITE)
163#define __P111	_PAGE_P(PAGE_EXEC | PAGE_WRITE | PAGE_READ)
164
165#define __S000	__pgprot(PAGE_NONE)
166#define __S001	_PAGE_S(PAGE_READ)
167#define __S010	_PAGE_S(PAGE_WRITE)
168#define __S011	_PAGE_S(PAGE_WRITE | PAGE_READ)
169#define __S100	_PAGE_S(PAGE_EXEC)
170#define __S101	_PAGE_S(PAGE_EXEC | PAGE_READ)
171#define __S110	_PAGE_S(PAGE_EXEC | PAGE_WRITE)
172#define __S111	_PAGE_S(PAGE_EXEC | PAGE_WRITE | PAGE_READ)
173
174#define pte_none(x)	(!pte_val(x))
175#define pte_present(x)	(pte_val(x) & _PAGE_PRESENT)
176
177#define pte_clear(mm,addr,xp)					\
178	do {							\
179		set_pte_at(mm, addr, xp, __pte(0));		\
180	} while (0)
181
182/*
183 * The following only work if pte_present() is true.
184 * Undefined behaviour if not..
185 */
186static inline int pte_write(pte_t pte)
187{
188	return pte_val(pte) & _PAGE_RW;
189}
190static inline int pte_dirty(pte_t pte)
191{
192	return pte_val(pte) & _PAGE_DIRTY;
193}
194static inline int pte_young(pte_t pte)
195{
196	return pte_val(pte) & _PAGE_ACCESSED;
197}
198static inline int pte_special(pte_t pte)
199{
200	return 0;
201}
202
203/*
204 * The following only work if pte_present() is not true.
205 */
206static inline int pte_file(pte_t pte)
207{
208	return pte_val(pte) & _PAGE_FILE;
209}
210
211/* Mutator functions for PTE bits */
212static inline pte_t pte_wrprotect(pte_t pte)
213{
214	set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_RW));
215	return pte;
216}
217static inline pte_t pte_mkclean(pte_t pte)
218{
219	set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_DIRTY));
220	return pte;
221}
222static inline pte_t pte_mkold(pte_t pte)
223{
224	set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_ACCESSED));
225	return pte;
226}
227static inline pte_t pte_mkwrite(pte_t pte)
228{
229	set_pte(&pte, __pte(pte_val(pte) | _PAGE_RW));
230	return pte;
231}
232static inline pte_t pte_mkdirty(pte_t pte)
233{
234	set_pte(&pte, __pte(pte_val(pte) | _PAGE_DIRTY));
235	return pte;
236}
237static inline pte_t pte_mkyoung(pte_t pte)
238{
239	set_pte(&pte, __pte(pte_val(pte) | _PAGE_ACCESSED));
240	return pte;
241}
242static inline pte_t pte_mkspecial(pte_t pte)
243{
244	return pte;
245}
246
247#define pmd_none(x)	(!pmd_val(x))
248#define pmd_present(x)	(pmd_val(x))
249
250static inline void pmd_clear(pmd_t *pmdp)
251{
252	set_pmd(pmdp, __pmd(0));
253}
254
255#define	pmd_bad(x)	(pmd_val(x) & ~PAGE_MASK)
256
257/*
258 * Permanent address of a page. We don't support highmem, so this is
259 * trivial.
260 */
261#define pages_to_mb(x)	((x) >> (20-PAGE_SHIFT))
262#define pte_page(x)	(pfn_to_page(pte_pfn(x)))
263
264/*
265 * Mark the prot value as uncacheable and unbufferable
266 */
267#define pgprot_noncached(prot)						\
268	__pgprot(pgprot_val(prot) & ~(_PAGE_BUFFER | _PAGE_CACHABLE))
269
270/*
271 * Mark the prot value as uncacheable but bufferable
272 */
273#define pgprot_writecombine(prot)					\
274	__pgprot((pgprot_val(prot) & ~_PAGE_CACHABLE) | _PAGE_BUFFER)
275
276/*
277 * Conversion functions: convert a page and protection to a page entry,
278 * and a page entry and page directory to the page they refer to.
279 *
280 * extern pte_t mk_pte(struct page *page, pgprot_t pgprot)
281 */
282#define mk_pte(page, pgprot)	pfn_pte(page_to_pfn(page), (pgprot))
283
284static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
285{
286	set_pte(&pte, __pte((pte_val(pte) & _PAGE_CHG_MASK)
287			    | pgprot_val(newprot)));
288	return pte;
289}
290
291#define page_pte(page)	page_pte_prot(page, __pgprot(0))
292
293#define pmd_page_vaddr(pmd)	pmd_val(pmd)
294#define pmd_page(pmd)		(virt_to_page(pmd_val(pmd)))
295
296/* to find an entry in a page-table-directory. */
297#define pgd_index(address)	(((address) >> PGDIR_SHIFT)	\
298				 & (PTRS_PER_PGD - 1))
299#define pgd_offset(mm, address)	((mm)->pgd + pgd_index(address))
300
301/* to find an entry in a kernel page-table-directory */
302#define pgd_offset_k(address)	pgd_offset(&init_mm, address)
303
304/* Find an entry in the third-level page table.. */
305#define pte_index(address)				\
306	((address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
307#define pte_offset(dir, address)					\
308	((pte_t *) pmd_page_vaddr(*(dir)) + pte_index(address))
309#define pte_offset_kernel(dir, address)					\
310	((pte_t *) pmd_page_vaddr(*(dir)) + pte_index(address))
311#define pte_offset_map(dir, address) pte_offset_kernel(dir, address)
312#define pte_offset_map_nested(dir, address) pte_offset_kernel(dir, address)
313#define pte_unmap(pte)		do { } while (0)
314#define pte_unmap_nested(pte)	do { } while (0)
315
316struct vm_area_struct;
317extern void update_mmu_cache(struct vm_area_struct * vma,
318			     unsigned long address, pte_t *ptep);
319
320/*
321 * Encode and decode a swap entry
322 *
323 * Constraints:
324 *   _PAGE_FILE at bit 0
325 *   _PAGE_TYPE_* at bits 2-3 (for emulating _PAGE_PROTNONE)
326 *   _PAGE_PRESENT at bit 10
327 *
328 * We encode the type into bits 4-9 and offset into bits 11-31. This
329 * gives us a 21 bits offset, or 2**21 * 4K = 8G usable swap space per
330 * device, and 64 possible types.
331 *
332 * NOTE: We should set ZEROs at the position of _PAGE_PRESENT
333 *       and _PAGE_PROTNONE bits
334 */
335#define __swp_type(x)		(((x).val >> 4) & 0x3f)
336#define __swp_offset(x)		((x).val >> 11)
337#define __swp_entry(type, offset) ((swp_entry_t) { ((type) << 4) | ((offset) << 11) })
338#define __pte_to_swp_entry(pte)	((swp_entry_t) { pte_val(pte) })
339#define __swp_entry_to_pte(x)	((pte_t) { (x).val })
340
341/*
342 * Encode and decode a nonlinear file mapping entry. We have to
343 * preserve _PAGE_FILE and _PAGE_PRESENT here. _PAGE_TYPE_* isn't
344 * necessary, since _PAGE_FILE implies !_PAGE_PROTNONE (?)
345 */
346#define PTE_FILE_MAX_BITS	30
347#define pte_to_pgoff(pte)	(((pte_val(pte) >> 1) & 0x1ff)		\
348				 | ((pte_val(pte) >> 11) << 9))
349#define pgoff_to_pte(off)	((pte_t) { ((((off) & 0x1ff) << 1)	\
350					    | (((off) >> 9) << 11)	\
351					    | _PAGE_FILE) })
352
353typedef pte_t *pte_addr_t;
354
355#define kern_addr_valid(addr)	(1)
356
357#define io_remap_pfn_range(vma, vaddr, pfn, size, prot)	\
358	remap_pfn_range(vma, vaddr, pfn, size, prot)
359
360/* No page table caches to initialize (?) */
361#define pgtable_cache_init()	do { } while(0)
362
363#include <asm-generic/pgtable.h>
364
365#endif /* !__ASSEMBLY__ */
366
367#endif /* __ASM_AVR32_PGTABLE_H */
368