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  • only in /netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/plat-omap/include/plat/
1/*
2 * arch/arm/plat-omap/include/mach/sram.h
3 *
4 * Interface for functions that need to be run in internal SRAM
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef __ARCH_ARM_OMAP_SRAM_H
12#define __ARCH_ARM_OMAP_SRAM_H
13
14extern int __init omap_sram_init(void);
15extern void * omap_sram_push(void * start, unsigned long size);
16extern void omap_sram_reprogram_clock(u32 dpllctl, u32 ckctl);
17
18extern void omap2_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl,
19				u32 base_cs, u32 force_unlock);
20extern void omap2_sram_reprogram_sdrc(u32 perf_level, u32 dll_val,
21				      u32 mem_type);
22extern u32 omap2_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass);
23
24extern u32 omap3_configure_core_dpll(
25			u32 m2, u32 unlock_dll, u32 f, u32 inc,
26			u32 sdrc_rfr_ctrl_0, u32 sdrc_actim_ctrl_a_0,
27			u32 sdrc_actim_ctrl_b_0, u32 sdrc_mr_0,
28			u32 sdrc_rfr_ctrl_1, u32 sdrc_actim_ctrl_a_1,
29			u32 sdrc_actim_ctrl_b_1, u32 sdrc_mr_1);
30extern void omap3_sram_restore_context(void);
31
32/* Do not use these */
33extern void omap1_sram_reprogram_clock(u32 ckctl, u32 dpllctl);
34extern unsigned long omap1_sram_reprogram_clock_sz;
35
36extern void omap24xx_sram_reprogram_clock(u32 ckctl, u32 dpllctl);
37extern unsigned long omap24xx_sram_reprogram_clock_sz;
38
39extern void omap242x_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl,
40						u32 base_cs, u32 force_unlock);
41extern unsigned long omap242x_sram_ddr_init_sz;
42
43extern u32 omap242x_sram_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val,
44						int bypass);
45extern unsigned long omap242x_sram_set_prcm_sz;
46
47extern void omap242x_sram_reprogram_sdrc(u32 perf_level, u32 dll_val,
48						u32 mem_type);
49extern unsigned long omap242x_sram_reprogram_sdrc_sz;
50
51
52extern void omap243x_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl,
53						u32 base_cs, u32 force_unlock);
54extern unsigned long omap243x_sram_ddr_init_sz;
55
56extern u32 omap243x_sram_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val,
57						int bypass);
58extern unsigned long omap243x_sram_set_prcm_sz;
59
60extern void omap243x_sram_reprogram_sdrc(u32 perf_level, u32 dll_val,
61						u32 mem_type);
62extern unsigned long omap243x_sram_reprogram_sdrc_sz;
63
64extern u32 omap3_sram_configure_core_dpll(
65			u32 m2, u32 unlock_dll, u32 f, u32 inc,
66			u32 sdrc_rfr_ctrl_0, u32 sdrc_actim_ctrl_a_0,
67			u32 sdrc_actim_ctrl_b_0, u32 sdrc_mr_0,
68			u32 sdrc_rfr_ctrl_1, u32 sdrc_actim_ctrl_a_1,
69			u32 sdrc_actim_ctrl_b_1, u32 sdrc_mr_1);
70extern unsigned long omap3_sram_configure_core_dpll_sz;
71
72#ifdef CONFIG_PM
73extern void omap_push_sram_idle(void);
74#else
75static inline void omap_push_sram_idle(void) {}
76#endif /* CONFIG_PM */
77
78#endif
79