1/* 2 * stmp378x: LRADC register definitions 3 * 4 * Copyright (c) 2008 Freescale Semiconductor 5 * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License as published by 9 * the Free Software Foundation; either version 2 of the License, or 10 * (at your option) any later version. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * GNU General Public License for more details. 16 * 17 * You should have received a copy of the GNU General Public License 18 * along with this program; if not, write to the Free Software 19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 20 */ 21#define REGS_LRADC_BASE (STMP3XXX_REGS_BASE + 0x50000) 22#define REGS_LRADC_PHYS 0x80050000 23#define REGS_LRADC_SIZE 0x2000 24 25#define HW_LRADC_CTRL0 0x0 26#define BM_LRADC_CTRL0_SCHEDULE 0x000000FF 27#define BP_LRADC_CTRL0_SCHEDULE 0 28#define BM_LRADC_CTRL0_XPLUS_ENABLE 0x00010000 29#define BM_LRADC_CTRL0_YPLUS_ENABLE 0x00020000 30#define BM_LRADC_CTRL0_XMINUS_ENABLE 0x00040000 31#define BM_LRADC_CTRL0_YMINUS_ENABLE 0x00080000 32#define BM_LRADC_CTRL0_TOUCH_DETECT_ENABLE 0x00100000 33#define BM_LRADC_CTRL0_ONCHIP_GROUNDREF 0x00200000 34#define BM_LRADC_CTRL0_CLKGATE 0x40000000 35#define BM_LRADC_CTRL0_SFTRST 0x80000000 36 37#define HW_LRADC_CTRL1 0x10 38#define BM_LRADC_CTRL1_LRADC0_IRQ 0x00000001 39#define BP_LRADC_CTRL1_LRADC0_IRQ 0 40#define BM_LRADC_CTRL1_LRADC5_IRQ 0x00000020 41#define BM_LRADC_CTRL1_LRADC6_IRQ 0x00000040 42#define BM_LRADC_CTRL1_TOUCH_DETECT_IRQ 0x00000100 43#define BM_LRADC_CTRL1_LRADC0_IRQ_EN 0x00010000 44#define BM_LRADC_CTRL1_LRADC5_IRQ_EN 0x00200000 45#define BM_LRADC_CTRL1_TOUCH_DETECT_IRQ_EN 0x01000000 46 47#define HW_LRADC_CTRL2 0x20 48#define BM_LRADC_CTRL2_BL_BRIGHTNESS 0x001F0000 49#define BP_LRADC_CTRL2_BL_BRIGHTNESS 16 50#define BM_LRADC_CTRL2_BL_MUX_SELECT 0x00200000 51#define BM_LRADC_CTRL2_BL_ENABLE 0x00400000 52#define BM_LRADC_CTRL2_DIVIDE_BY_TWO 0xFF000000 53#define BP_LRADC_CTRL2_DIVIDE_BY_TWO 24 54 55#define HW_LRADC_CTRL3 0x30 56#define BM_LRADC_CTRL3_CYCLE_TIME 0x00000300 57#define BP_LRADC_CTRL3_CYCLE_TIME 8 58 59#define HW_LRADC_STATUS 0x40 60#define BM_LRADC_STATUS_TOUCH_DETECT_RAW 0x00000001 61#define BP_LRADC_STATUS_TOUCH_DETECT_RAW 0 62 63#define HW_LRADC_CH0 (0x50 + 0 * 0x10) 64#define HW_LRADC_CH1 (0x50 + 1 * 0x10) 65#define HW_LRADC_CH2 (0x50 + 2 * 0x10) 66#define HW_LRADC_CH3 (0x50 + 3 * 0x10) 67#define HW_LRADC_CH4 (0x50 + 4 * 0x10) 68#define HW_LRADC_CH5 (0x50 + 5 * 0x10) 69#define HW_LRADC_CH6 (0x50 + 6 * 0x10) 70#define HW_LRADC_CH7 (0x50 + 7 * 0x10) 71 72#define HW_LRADC_CHn 0x50 73#define BM_LRADC_CHn_VALUE 0x0003FFFF 74#define BP_LRADC_CHn_VALUE 0 75#define BM_LRADC_CHn_NUM_SAMPLES 0x1F000000 76#define BP_LRADC_CHn_NUM_SAMPLES 24 77#define BM_LRADC_CHn_ACCUMULATE 0x20000000 78 79#define HW_LRADC_DELAY0 (0xD0 + 0 * 0x10) 80#define HW_LRADC_DELAY1 (0xD0 + 1 * 0x10) 81#define HW_LRADC_DELAY2 (0xD0 + 2 * 0x10) 82#define HW_LRADC_DELAY3 (0xD0 + 3 * 0x10) 83 84#define HW_LRADC_DELAYn 0xD0 85#define BM_LRADC_DELAYn_DELAY 0x000007FF 86#define BP_LRADC_DELAYn_DELAY 0 87#define BM_LRADC_DELAYn_LOOP_COUNT 0x0000F800 88#define BP_LRADC_DELAYn_LOOP_COUNT 11 89#define BM_LRADC_DELAYn_TRIGGER_DELAYS 0x000F0000 90#define BP_LRADC_DELAYn_TRIGGER_DELAYS 16 91#define BM_LRADC_DELAYn_KICK 0x00100000 92#define BM_LRADC_DELAYn_TRIGGER_LRADCS 0xFF000000 93#define BP_LRADC_DELAYn_TRIGGER_LRADCS 24 94 95#define HW_LRADC_CTRL4 0x140 96#define BM_LRADC_CTRL4_LRADC6SELECT 0x0F000000 97#define BP_LRADC_CTRL4_LRADC6SELECT 24 98#define BM_LRADC_CTRL4_LRADC7SELECT 0xF0000000 99#define BP_LRADC_CTRL4_LRADC7SELECT 28 100