1/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-c.h 2 * 3 * Copyright 2008 Openmoko, Inc. 4 * Copyright 2008 Simtec Electronics 5 * Ben Dooks <ben@simtec.co.uk> 6 * http://armlinux.simtec.co.uk/ 7 * 8 * GPIO Bank C register and configuration definitions 9 * 10 * This program is free software; you can redistribute it and/or modify 11 * it under the terms of the GNU General Public License version 2 as 12 * published by the Free Software Foundation. 13*/ 14 15#define S3C64XX_GPCCON (S3C64XX_GPC_BASE + 0x00) 16#define S3C64XX_GPCDAT (S3C64XX_GPC_BASE + 0x04) 17#define S3C64XX_GPCPUD (S3C64XX_GPC_BASE + 0x08) 18#define S3C64XX_GPCCONSLP (S3C64XX_GPC_BASE + 0x0c) 19#define S3C64XX_GPCPUDSLP (S3C64XX_GPC_BASE + 0x10) 20 21#define S3C64XX_GPC_CONMASK(__gpio) (0xf << ((__gpio) * 4)) 22#define S3C64XX_GPC_INPUT(__gpio) (0x0 << ((__gpio) * 4)) 23#define S3C64XX_GPC_OUTPUT(__gpio) (0x1 << ((__gpio) * 4)) 24 25#define S3C64XX_GPC0_SPI_MISO0 (0x02 << 0) 26#define S3C64XX_GPC0_EINT_G2_0 (0x07 << 0) 27 28#define S3C64XX_GPC1_SPI_CLKO (0x02 << 4) 29#define S3C64XX_GPC1_EINT_G2_1 (0x07 << 4) 30 31#define S3C64XX_GPC2_SPI_MOSIO (0x02 << 8) 32#define S3C64XX_GPC2_EINT_G2_2 (0x07 << 8) 33 34#define S3C64XX_GPC3_SPI_nCSO (0x02 << 12) 35#define S3C64XX_GPC3_EINT_G2_3 (0x07 << 12) 36 37#define S3C64XX_GPC4_SPI_MISO1 (0x02 << 16) 38#define S3C64XX_GPC4_MMC2_CMD (0x03 << 16) 39#define S3C64XX_GPC4_I2S_V40_DO0 (0x05 << 16) 40#define S3C64XX_GPC4_EINT_G2_4 (0x07 << 16) 41 42#define S3C64XX_GPC5_SPI_CLK1 (0x02 << 20) 43#define S3C64XX_GPC5_MMC2_CLK (0x03 << 20) 44#define S3C64XX_GPC5_I2S_V40_DO1 (0x05 << 20) 45#define S3C64XX_GPC5_EINT_G2_5 (0x07 << 20) 46 47#define S3C64XX_GPC6_SPI_MOSI1 (0x02 << 24) 48#define S3C64XX_GPC6_EINT_G2_6 (0x07 << 24) 49 50#define S3C64XX_GPC7_SPI_nCS1 (0x02 << 28) 51#define S3C64XX_GPC7_I2S_V40_DO2 (0x05 << 28) 52#define S3C64XX_GPC7_EINT_G2_7 (0x07 << 28) 53