1/* linux/arch/arm/plat-s3c24xx/s3c244x-irq.c 2 * 3 * Copyright (c) 2003-2004 Simtec Electronics 4 * Ben Dooks <ben@simtec.co.uk> 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, write to the Free Software 18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 19 * 20*/ 21 22#include <linux/init.h> 23#include <linux/module.h> 24#include <linux/interrupt.h> 25#include <linux/ioport.h> 26#include <linux/sysdev.h> 27#include <linux/io.h> 28 29#include <mach/hardware.h> 30#include <asm/irq.h> 31 32#include <asm/mach/irq.h> 33 34#include <mach/regs-irq.h> 35#include <mach/regs-gpio.h> 36 37#include <plat/cpu.h> 38#include <plat/pm.h> 39#include <plat/irq.h> 40 41/* camera irq */ 42 43static void s3c_irq_demux_cam(unsigned int irq, 44 struct irq_desc *desc) 45{ 46 unsigned int subsrc, submsk; 47 48 /* read the current pending interrupts, and the mask 49 * for what it is available */ 50 51 subsrc = __raw_readl(S3C2410_SUBSRCPND); 52 submsk = __raw_readl(S3C2410_INTSUBMSK); 53 54 subsrc &= ~submsk; 55 subsrc >>= 11; 56 subsrc &= 3; 57 58 if (subsrc != 0) { 59 if (subsrc & 1) { 60 generic_handle_irq(IRQ_S3C2440_CAM_C); 61 } 62 if (subsrc & 2) { 63 generic_handle_irq(IRQ_S3C2440_CAM_P); 64 } 65 } 66} 67 68#define INTMSK_CAM (1UL << (IRQ_CAM - IRQ_EINT0)) 69 70static void 71s3c_irq_cam_mask(unsigned int irqno) 72{ 73 s3c_irqsub_mask(irqno, INTMSK_CAM, 3<<11); 74} 75 76static void 77s3c_irq_cam_unmask(unsigned int irqno) 78{ 79 s3c_irqsub_unmask(irqno, INTMSK_CAM); 80} 81 82static void 83s3c_irq_cam_ack(unsigned int irqno) 84{ 85 s3c_irqsub_maskack(irqno, INTMSK_CAM, 3<<11); 86} 87 88static struct irq_chip s3c_irq_cam = { 89 .mask = s3c_irq_cam_mask, 90 .unmask = s3c_irq_cam_unmask, 91 .ack = s3c_irq_cam_ack, 92}; 93 94static int s3c244x_irq_add(struct sys_device *sysdev) 95{ 96 unsigned int irqno; 97 98 set_irq_chip(IRQ_NFCON, &s3c_irq_level_chip); 99 set_irq_handler(IRQ_NFCON, handle_level_irq); 100 set_irq_flags(IRQ_NFCON, IRQF_VALID); 101 102 /* add chained handler for camera */ 103 104 set_irq_chip(IRQ_CAM, &s3c_irq_level_chip); 105 set_irq_handler(IRQ_CAM, handle_level_irq); 106 set_irq_chained_handler(IRQ_CAM, s3c_irq_demux_cam); 107 108 for (irqno = IRQ_S3C2440_CAM_C; irqno <= IRQ_S3C2440_CAM_P; irqno++) { 109 set_irq_chip(irqno, &s3c_irq_cam); 110 set_irq_handler(irqno, handle_level_irq); 111 set_irq_flags(irqno, IRQF_VALID); 112 } 113 114 return 0; 115} 116 117static struct sysdev_driver s3c2440_irq_driver = { 118 .add = s3c244x_irq_add, 119 .suspend = s3c24xx_irq_suspend, 120 .resume = s3c24xx_irq_resume, 121}; 122 123static int s3c2440_irq_init(void) 124{ 125 return sysdev_driver_register(&s3c2440_sysclass, &s3c2440_irq_driver); 126} 127 128arch_initcall(s3c2440_irq_init); 129 130static struct sysdev_driver s3c2442_irq_driver = { 131 .add = s3c244x_irq_add, 132 .suspend = s3c24xx_irq_suspend, 133 .resume = s3c24xx_irq_resume, 134}; 135 136 137static int s3c2442_irq_init(void) 138{ 139 return sysdev_driver_register(&s3c2442_sysclass, &s3c2442_irq_driver); 140} 141 142arch_initcall(s3c2442_irq_init); 143