1/* 2 * arch/arm/mach-orion5x/include/mach/orion5x.h 3 * 4 * Generic definitions of Orion SoC flavors: 5 * Orion-1, Orion-VoIP, Orion-NAS, Orion-2, and Orion-1-90. 6 * 7 * Maintainer: Tzachi Perelstein <tzachi@marvell.com> 8 * 9 * This file is licensed under the terms of the GNU General Public 10 * License version 2. This program is licensed "as is" without any 11 * warranty of any kind, whether express or implied. 12 */ 13 14#ifndef __ASM_ARCH_ORION5X_H 15#define __ASM_ARCH_ORION5X_H 16 17/***************************************************************************** 18 * Orion Address Maps 19 * 20 * phys 21 * e0000000 PCIe MEM space 22 * e8000000 PCI MEM space 23 * f0000000 PCIe WA space (Orion-1/Orion-NAS only) 24 * f1000000 on-chip peripheral registers 25 * f2000000 PCIe I/O space 26 * f2100000 PCI I/O space 27 * f2200000 SRAM dedicated for the crypto unit 28 * f4000000 device bus mappings (boot) 29 * fa000000 device bus mappings (cs0) 30 * fa800000 device bus mappings (cs2) 31 * fc000000 device bus mappings (cs0/cs1) 32 * 33 * virt phys size 34 * fdd00000 f1000000 1M on-chip peripheral registers 35 * fde00000 f2000000 1M PCIe I/O space 36 * fdf00000 f2100000 1M PCI I/O space 37 * fe000000 f0000000 16M PCIe WA space (Orion-1/Orion-NAS only) 38 ****************************************************************************/ 39#define ORION5X_REGS_PHYS_BASE 0xf1000000 40#define ORION5X_REGS_VIRT_BASE 0xfdd00000 41#define ORION5X_REGS_SIZE SZ_1M 42 43#define ORION5X_PCIE_IO_PHYS_BASE 0xf2000000 44#define ORION5X_PCIE_IO_VIRT_BASE 0xfde00000 45#define ORION5X_PCIE_IO_BUS_BASE 0x00000000 46#define ORION5X_PCIE_IO_SIZE SZ_1M 47 48#define ORION5X_PCI_IO_PHYS_BASE 0xf2100000 49#define ORION5X_PCI_IO_VIRT_BASE 0xfdf00000 50#define ORION5X_PCI_IO_BUS_BASE 0x00100000 51#define ORION5X_PCI_IO_SIZE SZ_1M 52 53#define ORION5X_SRAM_PHYS_BASE (0xf2200000) 54#define ORION5X_SRAM_SIZE SZ_8K 55 56/* Relevant only for Orion-1/Orion-NAS */ 57#define ORION5X_PCIE_WA_PHYS_BASE 0xf0000000 58#define ORION5X_PCIE_WA_VIRT_BASE 0xfe000000 59#define ORION5X_PCIE_WA_SIZE SZ_16M 60 61#define ORION5X_PCIE_MEM_PHYS_BASE 0xe0000000 62#define ORION5X_PCIE_MEM_SIZE SZ_128M 63 64#define ORION5X_PCI_MEM_PHYS_BASE 0xe8000000 65#define ORION5X_PCI_MEM_SIZE SZ_128M 66 67/******************************************************************************* 68 * Orion Registers Map 69 ******************************************************************************/ 70 71#define ORION5X_DDR_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0x00000) 72 73#define ORION5X_DEV_BUS_PHYS_BASE (ORION5X_REGS_PHYS_BASE | 0x10000) 74#define ORION5X_DEV_BUS_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0x10000) 75#define ORION5X_DEV_BUS_REG(x) (ORION5X_DEV_BUS_VIRT_BASE | (x)) 76#define SPI_PHYS_BASE (ORION5X_DEV_BUS_PHYS_BASE | 0x0600) 77#define I2C_PHYS_BASE (ORION5X_DEV_BUS_PHYS_BASE | 0x1000) 78#define UART0_PHYS_BASE (ORION5X_DEV_BUS_PHYS_BASE | 0x2000) 79#define UART0_VIRT_BASE (ORION5X_DEV_BUS_VIRT_BASE | 0x2000) 80#define UART1_PHYS_BASE (ORION5X_DEV_BUS_PHYS_BASE | 0x2100) 81#define UART1_VIRT_BASE (ORION5X_DEV_BUS_VIRT_BASE | 0x2100) 82 83#define ORION5X_BRIDGE_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0x20000) 84 85#define ORION5X_PCI_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0x30000) 86 87#define ORION5X_PCIE_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0x40000) 88 89#define ORION5X_USB0_PHYS_BASE (ORION5X_REGS_PHYS_BASE | 0x50000) 90#define ORION5X_USB0_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0x50000) 91 92#define ORION5X_XOR_PHYS_BASE (ORION5X_REGS_PHYS_BASE | 0x60900) 93#define ORION5X_XOR_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0x60900) 94 95#define ORION5X_ETH_PHYS_BASE (ORION5X_REGS_PHYS_BASE | 0x70000) 96#define ORION5X_ETH_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0x70000) 97 98#define ORION5X_SATA_PHYS_BASE (ORION5X_REGS_PHYS_BASE | 0x80000) 99#define ORION5X_SATA_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0x80000) 100 101#define ORION5X_CRYPTO_PHYS_BASE (ORION5X_REGS_PHYS_BASE | 0x90000) 102 103#define ORION5X_USB1_PHYS_BASE (ORION5X_REGS_PHYS_BASE | 0xa0000) 104#define ORION5X_USB1_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0xa0000) 105 106/******************************************************************************* 107 * Device Bus Registers 108 ******************************************************************************/ 109#define MPP_0_7_CTRL ORION5X_DEV_BUS_REG(0x000) 110#define MPP_8_15_CTRL ORION5X_DEV_BUS_REG(0x004) 111#define MPP_16_19_CTRL ORION5X_DEV_BUS_REG(0x050) 112#define MPP_DEV_CTRL ORION5X_DEV_BUS_REG(0x008) 113#define MPP_RESET_SAMPLE ORION5X_DEV_BUS_REG(0x010) 114#define DEV_BANK_0_PARAM ORION5X_DEV_BUS_REG(0x45c) 115#define DEV_BANK_1_PARAM ORION5X_DEV_BUS_REG(0x460) 116#define DEV_BANK_2_PARAM ORION5X_DEV_BUS_REG(0x464) 117#define DEV_BANK_BOOT_PARAM ORION5X_DEV_BUS_REG(0x46c) 118#define DEV_BUS_CTRL ORION5X_DEV_BUS_REG(0x4c0) 119#define DEV_BUS_INT_CAUSE ORION5X_DEV_BUS_REG(0x4d0) 120#define DEV_BUS_INT_MASK ORION5X_DEV_BUS_REG(0x4d4) 121 122/******************************************************************************* 123 * Supported Devices & Revisions 124 ******************************************************************************/ 125/* Orion-1 (88F5181) and Orion-VoIP (88F5181L) */ 126#define MV88F5181_DEV_ID 0x5181 127#define MV88F5181_REV_B1 3 128#define MV88F5181L_REV_A0 8 129#define MV88F5181L_REV_A1 9 130/* Orion-NAS (88F5182) */ 131#define MV88F5182_DEV_ID 0x5182 132#define MV88F5182_REV_A2 2 133/* Orion-2 (88F5281) */ 134#define MV88F5281_DEV_ID 0x5281 135#define MV88F5281_REV_D0 4 136#define MV88F5281_REV_D1 5 137#define MV88F5281_REV_D2 6 138/* Orion-1-90 (88F6183) */ 139#define MV88F6183_DEV_ID 0x6183 140#define MV88F6183_REV_B0 3 141 142#endif 143