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  • only in /netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/mach-omap1/
1/*
2 * linux/arch/arm/mach-omap1/fpga.c
3 *
4 * Interrupt handler for OMAP-1510 Innovator FPGA
5 *
6 * Copyright (C) 2001 RidgeRun, Inc.
7 * Author: Greg Lonnon <glonnon@ridgerun.com>
8 *
9 * Copyright (C) 2002 MontaVista Software, Inc.
10 *
11 * Separated FPGA interrupts from innovator1510.c and cleaned up for 2.6
12 * Copyright (C) 2004 Nokia Corporation by Tony Lindrgen <tony@atomide.com>
13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License version 2 as
16 * published by the Free Software Foundation.
17 */
18
19#include <linux/types.h>
20#include <linux/init.h>
21#include <linux/kernel.h>
22#include <linux/device.h>
23#include <linux/errno.h>
24#include <linux/io.h>
25
26#include <mach/hardware.h>
27#include <asm/irq.h>
28#include <asm/mach/irq.h>
29
30#include <plat/fpga.h>
31#include <mach/gpio.h>
32
33static void fpga_mask_irq(unsigned int irq)
34{
35	irq -= OMAP_FPGA_IRQ_BASE;
36
37	if (irq < 8)
38		__raw_writeb((__raw_readb(OMAP1510_FPGA_IMR_LO)
39			      & ~(1 << irq)), OMAP1510_FPGA_IMR_LO);
40	else if (irq < 16)
41		__raw_writeb((__raw_readb(OMAP1510_FPGA_IMR_HI)
42			      & ~(1 << (irq - 8))), OMAP1510_FPGA_IMR_HI);
43	else
44		__raw_writeb((__raw_readb(INNOVATOR_FPGA_IMR2)
45			      & ~(1 << (irq - 16))), INNOVATOR_FPGA_IMR2);
46}
47
48
49static inline u32 get_fpga_unmasked_irqs(void)
50{
51	return
52		((__raw_readb(OMAP1510_FPGA_ISR_LO) &
53		  __raw_readb(OMAP1510_FPGA_IMR_LO))) |
54		((__raw_readb(OMAP1510_FPGA_ISR_HI) &
55		  __raw_readb(OMAP1510_FPGA_IMR_HI)) << 8) |
56		((__raw_readb(INNOVATOR_FPGA_ISR2) &
57		  __raw_readb(INNOVATOR_FPGA_IMR2)) << 16);
58}
59
60
61static void fpga_ack_irq(unsigned int irq)
62{
63	/* Don't need to explicitly ACK FPGA interrupts */
64}
65
66static void fpga_unmask_irq(unsigned int irq)
67{
68	irq -= OMAP_FPGA_IRQ_BASE;
69
70	if (irq < 8)
71		__raw_writeb((__raw_readb(OMAP1510_FPGA_IMR_LO) | (1 << irq)),
72		     OMAP1510_FPGA_IMR_LO);
73	else if (irq < 16)
74		__raw_writeb((__raw_readb(OMAP1510_FPGA_IMR_HI)
75			      | (1 << (irq - 8))), OMAP1510_FPGA_IMR_HI);
76	else
77		__raw_writeb((__raw_readb(INNOVATOR_FPGA_IMR2)
78			      | (1 << (irq - 16))), INNOVATOR_FPGA_IMR2);
79}
80
81static void fpga_mask_ack_irq(unsigned int irq)
82{
83	fpga_mask_irq(irq);
84	fpga_ack_irq(irq);
85}
86
87void innovator_fpga_IRQ_demux(unsigned int irq, struct irq_desc *desc)
88{
89	u32 stat;
90	int fpga_irq;
91
92	stat = get_fpga_unmasked_irqs();
93
94	if (!stat)
95		return;
96
97	for (fpga_irq = OMAP_FPGA_IRQ_BASE;
98	     (fpga_irq < OMAP_FPGA_IRQ_END) && stat;
99	     fpga_irq++, stat >>= 1) {
100		if (stat & 1) {
101			generic_handle_irq(fpga_irq);
102		}
103	}
104}
105
106static struct irq_chip omap_fpga_irq_ack = {
107	.name		= "FPGA-ack",
108	.ack		= fpga_mask_ack_irq,
109	.mask		= fpga_mask_irq,
110	.unmask		= fpga_unmask_irq,
111};
112
113
114static struct irq_chip omap_fpga_irq = {
115	.name		= "FPGA",
116	.ack		= fpga_ack_irq,
117	.mask		= fpga_mask_irq,
118	.unmask		= fpga_unmask_irq,
119};
120
121void omap1510_fpga_init_irq(void)
122{
123	int i;
124
125	__raw_writeb(0, OMAP1510_FPGA_IMR_LO);
126	__raw_writeb(0, OMAP1510_FPGA_IMR_HI);
127	__raw_writeb(0, INNOVATOR_FPGA_IMR2);
128
129	for (i = OMAP_FPGA_IRQ_BASE; i < OMAP_FPGA_IRQ_END; i++) {
130
131		if (i == OMAP1510_INT_FPGA_TS) {
132			/*
133			 * The touchscreen interrupt is level-sensitive, so
134			 * we'll use the regular mask_ack routine for it.
135			 */
136			set_irq_chip(i, &omap_fpga_irq_ack);
137		}
138		else {
139			/*
140			 * All FPGA interrupts except the touchscreen are
141			 * edge-sensitive, so we won't mask them.
142			 */
143			set_irq_chip(i, &omap_fpga_irq);
144		}
145
146		set_irq_handler(i, handle_edge_irq);
147		set_irq_flags(i, IRQF_VALID);
148	}
149
150	/*
151	 * The FPGA interrupt line is connected to GPIO13. Claim this pin for
152	 * the ARM.
153	 *
154	 * NOTE: For general GPIO/MPUIO access and interrupts, please see
155	 * gpio.[ch]
156	 */
157	gpio_request(13, "FPGA irq");
158	gpio_direction_input(13);
159	set_irq_type(gpio_to_irq(13), IRQ_TYPE_EDGE_RISING);
160	set_irq_chained_handler(OMAP1510_INT_FPGA, innovator_fpga_IRQ_demux);
161}
162
163EXPORT_SYMBOL(omap1510_fpga_init_irq);
164